mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2026-03-14 21:10:27 +01:00
imx: mx6ul select SYS_L2CACHE_OFF
i.MX6UL features an Cortex-A7 core, it does not have PL310 as other i.MX6 chips. To Cortex-A7 core, If D-Cache is enabled, L2 Cache is enabled. There is on specific switch for on/off L2 Cache, so default select SYS_L2CACHE_OFF. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
This commit is contained in:
parent
43cb127b75
commit
a2c74aaf51
1 changed files with 4 additions and 0 deletions
|
|
@ -25,6 +25,10 @@ config MX6SL
|
|||
config MX6SX
|
||||
bool
|
||||
|
||||
config MX6UL
|
||||
select SYS_L2CACHE_OFF
|
||||
bool
|
||||
|
||||
choice
|
||||
prompt "MX6 board select"
|
||||
optional
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue