diff --git a/board/qca/arm/ipq5332/ipq5332.c b/board/qca/arm/ipq5332/ipq5332.c
index 6ebac5cc78..f54acc777f 100644
--- a/board/qca/arm/ipq5332/ipq5332.c
+++ b/board/qca/arm/ipq5332/ipq5332.c
@@ -712,10 +712,10 @@ static void usb_init_hsphy(void __iomem *phybase, int ssphy)
 	writel(XCFG_COARSE_TUNE_NUM | XCFG_FINE_TUNE_NUM,
 		phybase + USB2PHY_USB_PHY_M31_XCFGI_11);
 
-	/* Adjust HSTX slew rate to 565 ps*/
+	/* Adjust HSTX slew rate to 400 ps*/
 	/* Adjust PLL lock Time counter for release clock to 35uA */
 	/* Adjust Manual control ODT value to 38.02 Ohm */
-	writel(HSTX_SLEW_RATE_565PS | PLL_CHARGING_PUMP_CURRENT_35UA |
+	writel(HSTX_SLEW_RATE_400PS | PLL_CHARGING_PUMP_CURRENT_35UA |
 		ODT_VALUE_38_02_OHM, phybase + USB2PHY_USB_PHY_M31_XCFGI_4);
 
 	/*
@@ -724,11 +724,18 @@ static void usb_init_hsphy(void __iomem *phybase, int ssphy)
 	*/
 	writel(USB2_0_TX_ENABLE, phybase + USB2PHY_USB_PHY_M31_XCFGI_1);
 
-	/* Adjust Manual control ODT value to 45.02 Ohm */
 	/* Adjust HSTX Pre-emphasis level to 0.55mA */
-	writel(ODT_VALUE_45_02_OHM | HSTX_PRE_EMPHASIS_LEVEL_0_55MA,
+	writel(HSTX_PRE_EMPHASIS_LEVEL_0_55MA,
 		phybase + USB2PHY_USB_PHY_M31_XCFGI_5);
 
+	/*
+	* Adjust HSTX Current of current-mode driver,
+	* default 18.5mA * 22.5ohm = 416mV
+	* 17.1mA * 22.5ohm = 385mV
+	*/
+	writel(HSTX_CURRENT_17_1MA_385MV,
+		phybase + USB2PHY_USB_PHY_M31_XCFGI_9);
+
 	udelay(10);
 
 	writel(0, phybase + USB_PHY_UTMI_CTRL5);
diff --git a/board/qca/arm/ipq5332/ipq5332.h b/board/qca/arm/ipq5332/ipq5332.h
index 22ef3d1b2d..1c05b9410a 100644
--- a/board/qca/arm/ipq5332/ipq5332.h
+++ b/board/qca/arm/ipq5332/ipq5332.h
@@ -87,14 +87,15 @@ extern const add_node_t add_fdt_node[];
 #define USB2PHY_USB_PHY_M31_XCFGI_1		0xBC
 #define USB2PHY_USB_PHY_M31_XCFGI_4		0xC8
 #define USB2PHY_USB_PHY_M31_XCFGI_5		0xCC
+#define USB2PHY_USB_PHY_M31_XCFGI_9		0xDC
 #define USB2PHY_USB_PHY_M31_XCFGI_11		0xE4
 
 #define USB2_0_TX_ENABLE			BIT(2)
-#define HSTX_SLEW_RATE_565PS			3
+#define HSTX_SLEW_RATE_400PS			7
 #define PLL_CHARGING_PUMP_CURRENT_35UA		(3 << 3)
 #define ODT_VALUE_38_02_OHM			(3 << 6)
-#define ODT_VALUE_45_02_OHM			BIT(2)
 #define HSTX_PRE_EMPHASIS_LEVEL_0_55MA		(1)
+#define HSTX_CURRENT_17_1MA_385MV		BIT(1)
 
 #define UTMI_PHY_OVERRIDE_EN			BIT(1)
 #define SLEEPM					BIT(1)