From 94d2909503ce2cb7f30085e65d2bed7bf5567fdc Mon Sep 17 00:00:00 2001 From: Manoharan Vijaya Raghavan Date: Mon, 19 Mar 2018 18:23:29 +0530 Subject: [PATCH] ipq807x: scm: Make SCM calls dcache aware U-Boot now has dcache turned on. This requires cache flushing to be performed before executing smc instrution. There are calls which are made to TZ with huge buffer (such as kernel image for authentication). Flushing and invalidating by address for such huge buffer will have a performance impact, as the size of buffer is vastly bigger than the cache size itself. Hence performing a flush of the entire cache as opposed to performing cache flush with a start and end address. Change-Id: If90a49d240ecf021ac9714025b6de0cce3fb9fc8 Signed-off-by: Manoharan Vijaya Raghavan --- arch/arm/cpu/armv7/cache_v7.c | 8 ++++++-- arch/arm/cpu/armv7/qca/common/scm.c | 4 ++++ 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index 872d2832e2..2c45cbbfd6 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -274,9 +274,13 @@ void invalidate_dcache_all(void) */ void flush_dcache_all(void) { - v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL); + int dstatus = dcache_status(); - v7_outer_cache_flush_all(); + if (dstatus) + { + v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL); + v7_outer_cache_flush_all(); + } } /* diff --git a/arch/arm/cpu/armv7/qca/common/scm.c b/arch/arm/cpu/armv7/qca/common/scm.c index cda0c50ee0..26a451e233 100644 --- a/arch/arm/cpu/armv7/qca/common/scm.c +++ b/arch/arm/cpu/armv7/qca/common/scm.c @@ -287,12 +287,14 @@ static int scm_call_64(u32 svc_id, u32 cmd_id, struct qca_scm_desc *desc) desc->ret[0] = desc->ret[1] = desc->ret[2] = 0; + flush_dcache_all(); ret = __qca_scm_call_armv8_32(fn_id, desc->arginfo, desc->args[0], desc->args[1], desc->args[2], desc->x5, &desc->ret[0], &desc->ret[1], &desc->ret[2]); + invalidate_dcache_all(); return ret; } @@ -320,8 +322,10 @@ bool is_scm_armv8(void) x0 = QCA_SCM_SIP_FNID(SCM_SVC_INFO, QCA_IS_CALL_AVAIL_CMD) | QCA_SMC_ATOMIC_MASK; + flush_dcache_all(); ret = __qca_scm_call_armv8_32(x0, QCA_SCM_ARGS(1), x0, 0, 0, 0, &ret1, NULL, NULL); + invalidate_dcache_all(); if (ret || !ret1) scm_version = SCM_LEGACY; else