From 9400a0787435a0d2b89c2718836def0dc4aec09a Mon Sep 17 00:00:00 2001 From: Sasirekaa Madhesu Date: Mon, 19 Mar 2018 16:21:32 +0530 Subject: [PATCH] ipq40xx: spi: Add support for 4Gb Toshiba-TC58CVG2S0F SPI NAND flash Change-Id: I6c7427fec4bd486c572547a844f22d941f777bf5 Signed-off-by: Sasirekaa Madhesu --- drivers/mtd/spi/spi_nand.c | 41 +++++++++++++++++++++++++++++++++- drivers/mtd/spi/spi_nand_dev.h | 1 + 2 files changed, 41 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi_nand.c b/drivers/mtd/spi/spi_nand.c index 2620fa2c98..278989b466 100644 --- a/drivers/mtd/spi/spi_nand.c +++ b/drivers/mtd/spi/spi_nand.c @@ -25,6 +25,8 @@ #define TIMEOUT 5000 #define MFID_GIGA 0xc8 #define MFID_ATO 0x9b +#define TOSHIBA_NORM_READ_MASK 0x1F + /* Macronix Specific Defines */ #define MFID_MACRONIX 0xc2 #define MACRONIX_WRAP ((0 & 0x3) << 6) @@ -38,9 +40,11 @@ struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE]; int verify_3bit_ecc(int status); int verify_2bit_ecc(int status); int verify_dummy_ecc(int status); +int verify_2bit_toshiba_ecc(int status); void gigadevice_norm_read_cmd(u8 *cmd, int column); void macronix_norm_read_cmd(u8 *cmd, int column); void winbond_norm_read_cmd(u8 *cmd, int column); +void toshiba_norm_read_cmd(u8 *cmd, int column); int spi_nand_die_select(struct mtd_info *mtd, struct spi_flash *flash, int die_id); @@ -143,7 +147,22 @@ static struct spi_nand_flash_params spi_nand_flash_tbl[] = { .die_select = spi_nand_die_select, .name = "W25M02GV", }, - + { + .id = { 0x00, 0x98, 0xcd, 0x98 }, + .page_size = 4096, + .erase_size = 0x00040000, + .no_of_dies = 1, + .prev_die_id = INT_MAX, + .pages_per_die = 0x20000, + .pages_per_sector = 64, + .nr_sectors = 2048, + .oob_size = 128, + .protec_bpx = 0xC7, + .norm_read_cmd = toshiba_norm_read_cmd, + .verify_ecc = verify_2bit_toshiba_ecc, + .die_select = NULL, + .name = "TC58CVG2S0F", + }, }; struct spi_nand_flash_params *params; @@ -173,6 +192,14 @@ void winbond_norm_read_cmd(u8 *cmd, int column) cmd[3] = 0; } +void toshiba_norm_read_cmd(u8 *cmd, int column) +{ + cmd[0] = IPQ40XX_SPINAND_CMD_NORM_READ; + cmd[1] = ((u8)(column >> 8) & TOSHIBA_NORM_READ_MASK); + cmd[2] = (u8)(column); + cmd[3] = 0; +} + int spi_nand_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout, u8 cmd, u8 poll_bit, u8 *status) { @@ -576,6 +603,18 @@ int verify_2bit_ecc(int status) return 0; } +int verify_2bit_toshiba_ecc(int status) +{ + int ecc_status = (status & SPINAND_2BIT_ECC_MASK); + + if (ecc_status == SPINAND_2BIT_ECC_ERROR) + return ECC_ERR; + else if (ecc_status == SPINAND_2BIT_ECC_CORRECTED_TOSHIBA) + return ECC_CORRECTED; + else + return 0; +} + int verify_dummy_ecc(int status) { return 0; diff --git a/drivers/mtd/spi/spi_nand_dev.h b/drivers/mtd/spi/spi_nand_dev.h index 13193e1a87..0b2418469c 100644 --- a/drivers/mtd/spi/spi_nand_dev.h +++ b/drivers/mtd/spi/spi_nand_dev.h @@ -109,4 +109,5 @@ struct ipq40xx_spinand_info { #define SPINAND_2BIT_ECC_MASK 0x30 #define SPINAND_2BIT_ECC_ERROR 0x20 #define SPINAND_2BIT_ECC_CORRECTED 0x10 +#define SPINAND_2BIT_ECC_CORRECTED_TOSHIBA 0x30 #endif