From 9202734083cb363cc4c7a3cb235e06d5f032deac Mon Sep 17 00:00:00 2001
From: Sham Muthayyan <smuthayy@codeaurora.org>
Date: Thu, 22 Sep 2016 11:43:20 +0530
Subject: [PATCH] ipq40xx: Add PCIE device entries

Change-Id: Iae02b5812655b7ff4d2a82687dc066eb98afd0df
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
---
 arch/arm/dts/ipq40xx-dk04-c1.dts |  4 ++++
 arch/arm/dts/ipq40xx-dk04.dtsi   | 41 ++++++++++++++++++++++++++++++++
 arch/arm/dts/ipq40xx-soc.dtsi    | 15 ++++++++++++
 3 files changed, 60 insertions(+)

diff --git a/arch/arm/dts/ipq40xx-dk04-c1.dts b/arch/arm/dts/ipq40xx-dk04-c1.dts
index 0cffc811ed..a54fe56308 100644
--- a/arch/arm/dts/ipq40xx-dk04-c1.dts
+++ b/arch/arm/dts/ipq40xx-dk04-c1.dts
@@ -58,4 +58,8 @@
 			};
 		};
 	};
+
+	pci@40000000 {
+		status = "ok";
+	};
 };
diff --git a/arch/arm/dts/ipq40xx-dk04.dtsi b/arch/arm/dts/ipq40xx-dk04.dtsi
index 9a35b0f255..7c8011f84b 100644
--- a/arch/arm/dts/ipq40xx-dk04.dtsi
+++ b/arch/arm/dts/ipq40xx-dk04.dtsi
@@ -22,6 +22,7 @@
 		xhci0 = "/xhci@8a00000";
 		xhci1 = "/xhci@6000000";
 		i2c0 = "/i2c@78b7000";
+		pci0 = "/pci@40000000";
 	};
 
 	serial@78af000 {
@@ -414,5 +415,45 @@
 		phy = <13>;
 		phy_name = "IPQ MDIO0";
 	};
+
+	pci@40000000 {
+		pci_gpio {
+			gpio1 {
+				gpio = <38>;
+				func = <0>;
+				out = <GPIO_OUT_HIGH>;
+				pull = <GPIO_PULL_DOWN>;
+				drvstr = <GPIO_2MA>;
+				oe = <GPIO_OE_ENABLE>;
+				vm = <GPIO_VM_ENABLE>;
+				od_en = <GPIO_OD_DISABLE>;
+				pu_res = <GPIO_PULL_RES2>;
+			};
+
+			gpio2 {
+				gpio = <40>;
+				func = <0>;
+				out = <GPIO_OUT_LOW>;
+				pull = <GPIO_PULL_UP>;
+				drvstr = <GPIO_2MA>;
+				oe = <GPIO_OE_DISABLE>;
+				vm = <GPIO_VM_ENABLE>;
+				od_en = <GPIO_OD_DISABLE>;
+				pu_res = <GPIO_PULL_RES2>;
+			};
+
+			gpio3 {
+				gpio = <39>;
+				func = <0>;
+				out = <GPIO_OUT_HIGH>;
+				pull = <GPIO_PULL_UP>;
+				drvstr = <GPIO_2MA>;
+				oe = <GPIO_OE_ENABLE>;
+				vm = <GPIO_VM_ENABLE>;
+				od_en = <GPIO_OD_DISABLE>;
+				pu_res = <GPIO_PULL_RES2>;
+			};
+		};
+	};
 };
 
diff --git a/arch/arm/dts/ipq40xx-soc.dtsi b/arch/arm/dts/ipq40xx-soc.dtsi
index 06f177cabc..d77cb7fab0 100644
--- a/arch/arm/dts/ipq40xx-soc.dtsi
+++ b/arch/arm/dts/ipq40xx-soc.dtsi
@@ -68,5 +68,20 @@
 		#size-cells = <0>;
 		reg = <0x78b7000 0x600>;
 	};
+
+	pci@40000000 {
+		compatible = "qcom,ipq40xx-pcie";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0x40000000 0xf1d
+			0x80000 0x2000
+			0x40000f20 0xa8
+			0x40300000 0xd00000
+			0x40100000 0x100000
+			0x0181D010 0x4>;
+		reg-names = "pci_dbi", "parf", "elbi", "axi_bars",
+				"axi_conf", "pci_rst";
+		perst_gpio = <38>;
+	};
 };