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sunxi: Add missing macros to configure the NAND controller clk

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We need some macros to manipulate the NAND controller clock.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
This commit is contained in:
Boris Brezillon 2016-06-15 21:09:21 +02:00 • committed by Scott Wood
parent 2dc3c483a9
commit 8df375b445
1 changed files with 5 additions and 0 deletions
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5
arch/arm/include/asm/arch-sunxi/clock_sun4i.h
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@ -269,6 +269,11 @@ struct sunxi_ccm_reg {
#define CCM_MBUS_CTRL_CLK_SRC_PLL5 0x2
#define CCM_MBUS_CTRL_GATE (0x1 << 31)
#define CCM_NAND_CTRL_M(x) ((x) - 1)
#define CCM_NAND_CTRL_N(x) ((x) << 16)
#define CCM_NAND_CTRL_OSCM24 (0x0 << 24)
#define CCM_NAND_CTRL_PLL6 (0x1 << 24)
#define CCM_NAND_CTRL_PLL5 (0x2 << 24)
#define CCM_NAND_CTRL_ENABLE (0x1 << 31)
#define CCM_MMC_CTRL_M(x) ((x) - 1)