From 88f81ffcede1b84598570dd78c5fb36a934b6c1f Mon Sep 17 00:00:00 2001 From: Ram Kumar D Date: Fri, 6 May 2022 10:55:45 +0530 Subject: [PATCH] drivers: i2c: qup: add multi I2C support for all IPQ chipsets This change adds support to enable multiple I2C bus on all IPQ platforms. Removed the device specific changes and updated in a generic way to support multiple I2C on all the IPQ platforms. Change-Id: Ie13dd744c6317fc9245bc88781e79a9fb3621a62 Signed-off-by: Ram Kumar D --- arch/arm/include/asm/arch-ipq5018/clk.h | 16 ---- arch/arm/include/asm/arch-ipq6018/clk.h | 17 ----- arch/arm/include/asm/arch-ipq807x/clk.h | 5 -- arch/arm/include/asm/arch-ipq9574/clk.h | 32 -------- arch/arm/include/asm/arch-qca-common/clk.h | 73 +++++++++++++++++++ .../include/asm/arch-qca-common/qca_common.h | 1 + board/ipq5018/Kconfig | 4 +- board/ipq807x/Kconfig | 4 +- board/qca/arm/common/Makefile | 1 + board/qca/arm/common/clk.c | 59 +++++++++++++++ board/qca/arm/ipq5018/clock.c | 19 ----- board/qca/arm/ipq6018/clock.c | 19 ----- board/qca/arm/ipq807x/clock.c | 8 -- board/qca/arm/ipq9574/clock.c | 35 --------- configs/ipq5018_defconfig | 2 +- configs/ipq5018_tiny_debug_defconfig | 2 +- configs/ipq5018_tiny_defconfig | 2 +- configs/ipq807x_defconfig | 2 +- configs/ipq807x_tiny_defconfig | 2 +- include/configs/ipq5018.h | 2 +- include/configs/ipq6018.h | 4 +- include/configs/ipq807x.h | 3 +- include/configs/ipq9574.h | 4 +- 23 files changed, 150 insertions(+), 166 deletions(-) create mode 100644 arch/arm/include/asm/arch-qca-common/clk.h create mode 100644 board/qca/arm/common/clk.c diff --git a/arch/arm/include/asm/arch-ipq5018/clk.h b/arch/arm/include/asm/arch-ipq5018/clk.h index 4e553d4900..16e97ff92e 100644 --- a/arch/arm/include/asm/arch-ipq5018/clk.h +++ b/arch/arm/include/asm/arch-ipq5018/clk.h @@ -15,22 +15,6 @@ #define IPQ5018_CLK_H #define CLK_ENABLE 0x1 -/* I2C clocks configuration */ -#ifdef CONFIG_IPQ5018_I2C - -#define GCC_BLSP1_QUP3_I2C_APPS_CFG_RCGR 0x1804004 -#define GCC_BLSP1_QUP3_I2C_APPS_CFG_RCGR_SRC_SEL (1 << 8) -#define GCC_BLSP1_QUP3_I2C_APPS_CFG_RCGR_SRC_DIV (0x1F << 0) - -#define GCC_BLSP1_QUP3_I2C_APPS_CMD_RCGR 0x1804000 -#define GCC_BLSP1_QUP3_I2C_APPS_CBCR 0x1804010 - -#define CMD_UPDATE 0x1 -#define ROOT_EN 0x2 - - -void i2c_clock_config(void); -#endif #ifdef CONFIG_IPQ_BT_SUPPORT #define GCC_BTSS_LPO_CBCR 0x181C004 diff --git a/arch/arm/include/asm/arch-ipq6018/clk.h b/arch/arm/include/asm/arch-ipq6018/clk.h index e33a06481c..f1d7dc88d2 100644 --- a/arch/arm/include/asm/arch-ipq6018/clk.h +++ b/arch/arm/include/asm/arch-ipq6018/clk.h @@ -16,23 +16,6 @@ #include -/* I2C clocks configuration */ -#ifdef CONFIG_IPQ6018_I2C - -#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR 0x1802010 -#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_SEL (1 << 8) -#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_DIV (0x1F << 0) - -#define GCC_BLSP1_QUP1_I2C_APPS_CMD_RCGR 0x180200C -#define GCC_BLSP1_QUP1_I2C_APPS_CBCR 0x1802008 - -#define CMD_UPDATE 0x1 -#define ROOT_EN 0x2 -#define CLK_ENABLE 0x1 - -void i2c_clock_config(void); -#endif - #define GCC_BLSP1_UART1_BCR 0x1802038 #define GCC_BLSP1_UART2_BCR 0x1803028 #define GCC_BLSP1_UART3_BCR 0x1804028 diff --git a/arch/arm/include/asm/arch-ipq807x/clk.h b/arch/arm/include/asm/arch-ipq807x/clk.h index e430e84157..258ada64fb 100644 --- a/arch/arm/include/asm/arch-ipq807x/clk.h +++ b/arch/arm/include/asm/arch-ipq807x/clk.h @@ -14,9 +14,4 @@ #ifndef IPQ807X_CLK_H #define IPQ807X_CLK_H -/* I2C clocks configuration */ -#ifdef CONFIG_IPQ807x_I2C -void i2c_clock_config(void); -#endif - #endif /*IPQ807X_CLK_H*/ diff --git a/arch/arm/include/asm/arch-ipq9574/clk.h b/arch/arm/include/asm/arch-ipq9574/clk.h index 9339f01852..13963bdde5 100644 --- a/arch/arm/include/asm/arch-ipq9574/clk.h +++ b/arch/arm/include/asm/arch-ipq9574/clk.h @@ -16,38 +16,6 @@ #include -/* I2C clocks configuration */ -#ifdef CONFIG_IPQ9574_I2C - -#define BLSP1_QUP_BASE 0x078B5000 -#define GCC_BLSP1_QUP1_I2C_APPS_CMD_RCGR 0x1802018 -#define GCC_BLSP1_QUP1_I2C_APPS_CBCR 0x1802024 -#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR 0x180201C -#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_SEL (1 << 8) -#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_DIV (0x1F << 0) -#define GCC_BLSP1_QUP_I2C_OFFSET_INC 0x1000 - -#define GCC_BLSP1_QUP_I2C_APPS_CFG_RCGR(id) ((id < 1) ? \ - (GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR):\ - (GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR + (GCC_BLSP1_QUP_I2C_OFFSET_INC * id))) - -#define GCC_BLSP1_QUP_I2C_APPS_CMD_RCGR(id) ((id < 1) ? \ - (GCC_BLSP1_QUP1_I2C_APPS_CMD_RCGR):\ - (GCC_BLSP1_QUP1_I2C_APPS_CMD_RCGR + (GCC_BLSP1_QUP_I2C_OFFSET_INC * id))) - -#define GCC_BLSP1_QUP_I2C_APPS_CBCR(id) ((id < 1) ? \ - (GCC_BLSP1_QUP1_I2C_APPS_CBCR):\ - (GCC_BLSP1_QUP1_I2C_APPS_CBCR + (GCC_BLSP1_QUP_I2C_OFFSET_INC * id))) - -#define I2C_PORT_ID(reg) ((reg - BLSP1_QUP_BASE) / GCC_BLSP1_QUP_I2C_OFFSET_INC) - -#define CMD_UPDATE 0x1 -#define ROOT_EN 0x2 -#define CLK_ENABLE 0x1 - -void i2c_clock_config(void); -#endif - #define GCC_BLSP1_UART1_BCR 0x1802028 #define GCC_BLSP1_UART2_BCR 0x1803028 #define GCC_BLSP1_UART3_BCR 0x1804028 diff --git a/arch/arm/include/asm/arch-qca-common/clk.h b/arch/arm/include/asm/arch-qca-common/clk.h new file mode 100644 index 0000000000..ce3633d226 --- /dev/null +++ b/arch/arm/include/asm/arch-qca-common/clk.h @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2015-2016, 2018-2021 The Linux Foundation. All rights reserved. + * + * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef CLK_H +#define CLK_H + +/* I2C clocks configuration */ +#ifdef CONFIG_IPQ_I2C + +// IPQ5018, IPQ6018, IPQ807X +#if defined(CONFIG_IPQ5018) || defined(CONFIG_IPQ6018) || defined(CONFIG_IPQ807x) + +#define GCC_BLSP1_QUP1_I2C_APPS_CBCR 0x1802008 +#define GCC_BLSP1_QUP1_I2C_APPS_CMD_RCGR 0x180200C +#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR 0x1802010 + +#define GCC_BLSP1_QUP2_I2C_APPS_CMD_RCGR 0x1803000 +#define GCC_BLSP1_QUP2_I2C_APPS_CFG_RCGR 0x1803004 +#define GCC_BLSP1_QUP2_I2C_APPS_CBCR 0x1803010 + +#else // IPQ9574, devsoc + +#define GCC_BLSP1_QUP1_I2C_APPS_CMD_RCGR 0x1802018 +#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR 0x180201C +#define GCC_BLSP1_QUP1_I2C_APPS_CBCR 0x1802024 + +#define GCC_BLSP1_QUP2_I2C_APPS_CMD_RCGR 0x1803018 +#define GCC_BLSP1_QUP2_I2C_APPS_CFG_RCGR 0x180301C +#define GCC_BLSP1_QUP2_I2C_APPS_CBCR 0x1803024 + +#endif + + +#define BLSP1_QUP_BASE 0x078B5000 +#define I2C_PORT_ID(reg) ((reg - BLSP1_QUP_BASE) / GCC_BLSP1_QUP_I2C_OFFSET_INC) +#define GCC_BLSP1_QUP_I2C_OFFSET_INC 0x1000 +#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_SEL (1 << 8) +#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_DIV (0x1F << 0) + +#define GCC_BLSP1_QUP_I2C_APPS_CMD_RCGR(id) ((id < 1) ? \ + (GCC_BLSP1_QUP1_I2C_APPS_CMD_RCGR):\ + (GCC_BLSP1_QUP2_I2C_APPS_CMD_RCGR + (GCC_BLSP1_QUP_I2C_OFFSET_INC * (id-1)))) + +#define GCC_BLSP1_QUP_I2C_APPS_CFG_RCGR(id) ((id < 1) ? \ + (GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR):\ + (GCC_BLSP1_QUP2_I2C_APPS_CFG_RCGR + (GCC_BLSP1_QUP_I2C_OFFSET_INC * (id-1)))) + +#define GCC_BLSP1_QUP_I2C_APPS_CBCR(id) ((id < 1) ? \ + (GCC_BLSP1_QUP1_I2C_APPS_CBCR):\ + (GCC_BLSP1_QUP2_I2C_APPS_CBCR + (GCC_BLSP1_QUP_I2C_OFFSET_INC * (id-1)))) + +#define CMD_UPDATE 0x1 +#define ROOT_EN 0x2 +#define CLK_ENABLE 0x1 + +void i2c_clock_config(void); +#endif + + +#endif /*CLK_H*/ + diff --git a/arch/arm/include/asm/arch-qca-common/qca_common.h b/arch/arm/include/asm/arch-qca-common/qca_common.h index b6cc9d4267..f7818aa9ee 100644 --- a/arch/arm/include/asm/arch-qca-common/qca_common.h +++ b/arch/arm/include/asm/arch-qca-common/qca_common.h @@ -16,6 +16,7 @@ #include #include #include +#include #ifdef CONFIG_ARCH_IPQ5018 #include diff --git a/board/ipq5018/Kconfig b/board/ipq5018/Kconfig index e1a56bc2db..92c280dc44 100644 --- a/board/ipq5018/Kconfig +++ b/board/ipq5018/Kconfig @@ -12,8 +12,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "ipq5018" -config IPQ5018_I2C - bool "Enable i2c support for ipq5018" +config IPQ_I2C + bool "Enable i2c support on IPQ platform" config USB_XHCI_IPQ bool "Enable usb support for ipq5018" diff --git a/board/ipq807x/Kconfig b/board/ipq807x/Kconfig index f801bb1180..db6c88cec8 100644 --- a/board/ipq807x/Kconfig +++ b/board/ipq807x/Kconfig @@ -10,8 +10,8 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "ipq807x" -config IPQ807x_I2C - bool "Enable i2c support for ipq807x" +config IPQ_I2C + bool "Enable i2c support on IPQ platform" config USB_XHCI_IPQ bool "ipq807x usb support for ipq807x" diff --git a/board/qca/arm/common/Makefile b/board/qca/arm/common/Makefile index aeb5dc0e72..4a6304b99a 100644 --- a/board/qca/arm/common/Makefile +++ b/board/qca/arm/common/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_IPQ_TZT) += cmd_tzt.o obj-$(CONFIG_SMP_CMD_SUPPORT) += cmd_runmulticore.o obj-y += fdt_info.o obj-y += board_init.o +obj-y += clk.o ifndef CONFIG_ENV_IS_NOWHERE obj-y += env.o endif diff --git a/board/qca/arm/common/clk.c b/board/qca/arm/common/clk.c new file mode 100644 index 0000000000..da81c8600b --- /dev/null +++ b/board/qca/arm/common/clk.c @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2015-2016, 2018-2020 The Linux Foundation. All rights reserved. + * + * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_IPQ_I2C +void i2c_clock_config(void) +{ + int cfg, i2c_id; + int i2c_node; + const u32 *i2c_base; + int i; + char alias[6]; + + for (i = 0; i < CONFIG_IPQ_MAX_BLSP_QUPS; i++) { + memset(alias, 0, 6); + snprintf(alias, 5, "i2c%d", i); + + i2c_node = fdt_path_offset(gd->fdt_blob, alias); + if (i2c_node >= 0) { + i2c_base = fdt_getprop(gd->fdt_blob, i2c_node, "reg", NULL); + if (i2c_base) { + i2c_id = I2C_PORT_ID(fdt32_to_cpu(i2c_base[0])); + + /* Configure qup1_i2c_apps_clk_src */ + cfg = (GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_SEL | + GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_DIV); + writel(cfg, GCC_BLSP1_QUP_I2C_APPS_CFG_RCGR(i2c_id)); + + writel(CMD_UPDATE, GCC_BLSP1_QUP_I2C_APPS_CMD_RCGR(i2c_id)); + mdelay(100); + writel(ROOT_EN, GCC_BLSP1_QUP_I2C_APPS_CMD_RCGR(i2c_id)); + + /* Configure CBCR */ + writel(CLK_ENABLE, GCC_BLSP1_QUP_I2C_APPS_CBCR(i2c_id)); + } + } + } +} +#endif diff --git a/board/qca/arm/ipq5018/clock.c b/board/qca/arm/ipq5018/clock.c index 247dc798f6..3c46d4d37c 100644 --- a/board/qca/arm/ipq5018/clock.c +++ b/board/qca/arm/ipq5018/clock.c @@ -16,25 +16,6 @@ #include #include -#ifdef CONFIG_IPQ5018_I2C -void i2c_clock_config(void) -{ - int cfg; - - /* Configure qup1_i2c_apps_clk_src */ - cfg = (GCC_BLSP1_QUP3_I2C_APPS_CFG_RCGR_SRC_SEL | - GCC_BLSP1_QUP3_I2C_APPS_CFG_RCGR_SRC_DIV); - writel(cfg, GCC_BLSP1_QUP3_I2C_APPS_CFG_RCGR); - - writel(CMD_UPDATE, GCC_BLSP1_QUP3_I2C_APPS_CMD_RCGR); - mdelay(100); - writel(ROOT_EN, GCC_BLSP1_QUP3_I2C_APPS_CMD_RCGR); - - /* Configure CBCR */ - writel(CLK_ENABLE, GCC_BLSP1_QUP3_I2C_APPS_CBCR); -} -#endif - #ifdef CONFIG_IPQ_BT_SUPPORT void enable_btss_lpo_clk(void) { diff --git a/board/qca/arm/ipq6018/clock.c b/board/qca/arm/ipq6018/clock.c index 71497fd7b0..cb1d019de3 100644 --- a/board/qca/arm/ipq6018/clock.c +++ b/board/qca/arm/ipq6018/clock.c @@ -16,25 +16,6 @@ #include #include -#ifdef CONFIG_IPQ6018_I2C -void i2c_clock_config(void) -{ - int cfg; - - /* Configure qup1_i2c_apps_clk_src */ - cfg = (GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_SEL | - GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_DIV); - writel(cfg, GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR); - - writel(CMD_UPDATE, GCC_BLSP1_QUP1_I2C_APPS_CMD_RCGR); - mdelay(100); - writel(ROOT_EN, GCC_BLSP1_QUP1_I2C_APPS_CMD_RCGR); - - /* Configure CBCR */ - writel(CLK_ENABLE, GCC_BLSP1_QUP1_I2C_APPS_CBCR); -} -#endif - static void uart_configure_mux(u8 id) { unsigned long cfg_rcgr; diff --git a/board/qca/arm/ipq807x/clock.c b/board/qca/arm/ipq807x/clock.c index dea9011762..0b11e3ce07 100644 --- a/board/qca/arm/ipq807x/clock.c +++ b/board/qca/arm/ipq807x/clock.c @@ -13,11 +13,3 @@ #include #include - -#ifdef CONFIG_IPQ807x_I2C -void i2c_clock_config(void) -{ - return; -} -#endif - diff --git a/board/qca/arm/ipq9574/clock.c b/board/qca/arm/ipq9574/clock.c index 0eb99a5485..185b52054a 100644 --- a/board/qca/arm/ipq9574/clock.c +++ b/board/qca/arm/ipq9574/clock.c @@ -20,41 +20,6 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_IPQ9574_I2C -void i2c_clock_config() -{ - int cfg, i2c_id; - int i2c_node; - const u32 *i2c_base; - int i; - char alias[6]; - - for (i = 0; i < CONFIG_IPQ_MAX_BLSP_QUPS; i++) { - memset(alias, 0, 6); - snprintf(alias, 5, "i2c%d", i); - - i2c_node = fdt_path_offset(gd->fdt_blob, alias); - if (i2c_node >= 0) { - i2c_base = fdt_getprop(gd->fdt_blob, i2c_node, "reg", NULL); - if (i2c_base) { - i2c_id = I2C_PORT_ID(fdt32_to_cpu(i2c_base[0])); - /* Configure qup1_i2c_apps_clk_src */ - cfg = (GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_SEL | - GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_DIV); - writel(cfg, GCC_BLSP1_QUP_I2C_APPS_CFG_RCGR(i2c_id)); - - writel(CMD_UPDATE, GCC_BLSP1_QUP_I2C_APPS_CMD_RCGR(i2c_id)); - mdelay(100); - writel(ROOT_EN, GCC_BLSP1_QUP_I2C_APPS_CMD_RCGR(i2c_id)); - - /* Configure CBCR */ - writel(CLK_ENABLE, GCC_BLSP1_QUP_I2C_APPS_CBCR(i2c_id)); - } - } - } -} -#endif - static void uart_configure_mux(u8 id) { unsigned long cfg_rcgr; diff --git a/configs/ipq5018_defconfig b/configs/ipq5018_defconfig index 115261b1ae..865f5b63e7 100644 --- a/configs/ipq5018_defconfig +++ b/configs/ipq5018_defconfig @@ -185,7 +185,7 @@ CONFIG_SIMPLE_BUS=y # # CONFIG_DM_I2C_COMPAT is not set # CONFIG_CROS_EC_KEYB is not set -CONFIG_IPQ5018_I2C=y +CONFIG_IPQ_I2C=y # # LED Support diff --git a/configs/ipq5018_tiny_debug_defconfig b/configs/ipq5018_tiny_debug_defconfig index f699473199..06c068c839 100644 --- a/configs/ipq5018_tiny_debug_defconfig +++ b/configs/ipq5018_tiny_debug_defconfig @@ -178,7 +178,7 @@ CONFIG_SIMPLE_BUS=y # # CONFIG_DM_I2C_COMPAT is not set # CONFIG_CROS_EC_KEYB is not set -# CONFIG_IPQ5018_I2C is not set +# CONFIG_IPQ_I2C is not set # # LED Support diff --git a/configs/ipq5018_tiny_defconfig b/configs/ipq5018_tiny_defconfig index 67602d62d7..e03c2bd820 100644 --- a/configs/ipq5018_tiny_defconfig +++ b/configs/ipq5018_tiny_defconfig @@ -179,7 +179,7 @@ CONFIG_SIMPLE_BUS=y # # CONFIG_DM_I2C_COMPAT is not set # CONFIG_CROS_EC_KEYB is not set -# CONFIG_IPQ5018_I2C is not set +# CONFIG_IPQ_I2C is not set # # LED Support diff --git a/configs/ipq807x_defconfig b/configs/ipq807x_defconfig index fe3be64a6c..37ce77c8ff 100644 --- a/configs/ipq807x_defconfig +++ b/configs/ipq807x_defconfig @@ -186,7 +186,7 @@ CONFIG_SIMPLE_BUS=y # # CONFIG_DM_I2C_COMPAT is not set # CONFIG_CROS_EC_KEYB is not set -CONFIG_IPQ807x_I2C=y +CONFIG_IPQ_I2C=y # # LED Support diff --git a/configs/ipq807x_tiny_defconfig b/configs/ipq807x_tiny_defconfig index 50665a730a..d33860a5ec 100644 --- a/configs/ipq807x_tiny_defconfig +++ b/configs/ipq807x_tiny_defconfig @@ -186,7 +186,7 @@ CONFIG_SIMPLE_BUS=y # # CONFIG_DM_I2C_COMPAT is not set # CONFIG_CROS_EC_KEYB is not set -# CONFIG_IPQ807x_I2C is not set +# CONFIG_IPQ_I2C is not set # # LED Support diff --git a/include/configs/ipq5018.h b/include/configs/ipq5018.h index f623bfad6c..7c584ea8a7 100644 --- a/include/configs/ipq5018.h +++ b/include/configs/ipq5018.h @@ -219,7 +219,7 @@ extern loff_t board_env_size; /* * I2C Enable */ -#ifdef CONFIG_IPQ5018_I2C +#ifdef CONFIG_IPQ_I2C #define CONFIG_SYS_I2C_QUP #define CONFIG_CMD_I2C #define CONFIG_DM_I2C diff --git a/include/configs/ipq6018.h b/include/configs/ipq6018.h index 3ca25cb773..3cc2da8725 100644 --- a/include/configs/ipq6018.h +++ b/include/configs/ipq6018.h @@ -69,8 +69,8 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE -\ CONFIG_SYS_MALLOC_LEN - CONFIG_ENV_SIZE -\ GENERATED_BD_INFO_SIZE) -#define CONFIG_IPQ6018_I2C 1 -#ifdef CONFIG_IPQ6018_I2C +#define CONFIG_IPQ_I2C 1 +#ifdef CONFIG_IPQ_I2C #define CONFIG_SYS_I2C_QUP #define CONFIG_CMD_I2C #define CONFIG_DM_I2C diff --git a/include/configs/ipq807x.h b/include/configs/ipq807x.h index 90be28e1d3..8123180d7d 100644 --- a/include/configs/ipq807x.h +++ b/include/configs/ipq807x.h @@ -22,6 +22,7 @@ * Support for IPQ807X RUMI */ #define CONFIG_IPQ_RUMI +#define CONFIG_IPQ807x /* * Disabled for actual chip. @@ -75,7 +76,7 @@ text_base --> |------------| */ -#ifdef CONFIG_IPQ807x_I2C +#ifdef CONFIG_IPQ_I2C #define CONFIG_SYS_I2C_QUP #define CONFIG_CMD_I2C #define CONFIG_DM_I2C diff --git a/include/configs/ipq9574.h b/include/configs/ipq9574.h index 5dd0e4cbbb..b35430563f 100644 --- a/include/configs/ipq9574.h +++ b/include/configs/ipq9574.h @@ -150,8 +150,8 @@ extern loff_t board_env_size; #define HAVE_BLOCK_DEVICE #define CONFIG_DOS_PARTITION -#define CONFIG_IPQ9574_I2C 1 -#ifdef CONFIG_IPQ9574_I2C +#define CONFIG_IPQ_I2C 1 +#ifdef CONFIG_IPQ_I2C #define CONFIG_SYS_I2C_QUP #define CONFIG_CMD_I2C #define CONFIG_DM_I2C