mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2026-03-11 19:48:59 +01:00
ipq: tzt: add xpu config test support
Change-Id: Ia981f59ea3dd52f23a4c757ff424cb0656e4435c Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
This commit is contained in:
parent
fd7d21dd13
commit
84c8701aa4
5 changed files with 229 additions and 20 deletions
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@ -262,6 +262,41 @@ int __qca_scm_call_armv8_32(u32 x0, u32 x1, u32 x2, u32 x3, u32 x4, u32 x5,
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return r0;
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}
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/**
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* __scm_call_64() - Invoke a syscall in the secure world
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* <at> svc_id: service identifier
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* <at> cmd_id: command identifier
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* <at> ownr_id: owner identifier
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* <at> fn_id: The function ID for this syscall
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* <at> desc: Descriptor structure containing arguments and return values
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*
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* Sends a command to the SCM and waits for the command to finish processing.
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*
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*/
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static int __scm_call_64(u32 svc_id, u32 cmd_id, u32 ownr_id, struct qca_scm_desc *desc)
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{
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int arglen = desc->arginfo & 0xf;
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int ret;
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u32 fn_id = QCA_SCM_FNID(svc_id, cmd_id, ownr_id);
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if (arglen > QCA_MAX_ARG_LEN) {
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printf("Error Extra args not supported\n");
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hang();
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}
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desc->ret[0] = desc->ret[1] = desc->ret[2] = 0;
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flush_dcache_all();
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ret = __qca_scm_call_armv8_32(fn_id, desc->arginfo,
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desc->args[0], desc->args[1],
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desc->args[2], desc->x5,
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&desc->ret[0], &desc->ret[1],
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&desc->ret[2]);
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return ret;
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}
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/**
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* scm_call_64() - Invoke a syscall in the secure world
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@ -275,26 +310,7 @@ int __qca_scm_call_armv8_32(u32 x0, u32 x1, u32 x2, u32 x3, u32 x4, u32 x5,
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*/
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static int scm_call_64(u32 svc_id, u32 cmd_id, struct qca_scm_desc *desc)
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{
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int arglen = desc->arginfo & 0xf;
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int ret;
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u32 fn_id = QCA_SCM_SIP_FNID(svc_id, cmd_id);
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if (arglen > QCA_MAX_ARG_LEN) {
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printf("Error Extra args not supported\n");
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hang();
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}
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desc->ret[0] = desc->ret[1] = desc->ret[2] = 0;
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flush_dcache_all();
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ret = __qca_scm_call_armv8_32(fn_id, desc->arginfo,
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desc->args[0], desc->args[1],
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desc->args[2], desc->x5,
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&desc->ret[0], &desc->ret[1],
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&desc->ret[2]);
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return ret;
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return __scm_call_64(svc_id, cmd_id, SCM_OWNR_SIP, desc);
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}
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static enum scm_interface_version {
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@ -663,3 +679,12 @@ int qca_scm_usb_mode_write(u32 arg1, u32 arg2)
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return ret;
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}
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#ifdef CONFIG_IPQ_TZT
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int qca_scm(u32 svc_id, u32 cmd_id, u32 ownr_id, u32 *addr, u32 val)
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{
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struct qca_scm_desc desc = {0};
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memcpy(&desc, addr, sizeof(u32)*val);
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return __scm_call_64(svc_id, cmd_id, ownr_id, &desc);
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}
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#endif
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@ -48,6 +48,19 @@
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#define SCM_ERROR -1
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#define SCM_INTERRUPTED 1
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/* OWNER IDs */
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#define SCM_OWNR_SIP 2
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#define SCM_OWNR_QSEE_OS 50
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#define SCM_OWNR_TEE_HLOS 51
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/* SVC IDs */
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#define SCM_SVC_APP_MGR 1 /* Application service manager */
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#define SCM_SVC_LISTENER 2 /* Listener service manager */
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#define SCM_SVC_EXTERNAL 3 /* External Image loading */
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#define SCM_SVC_MON_SAT 252 /* Monitor SAT test calls */
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#define SCM_SVC_TEST_1 253 /* TZ test calls (continued). */
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#define SCM_SVC_TEST_0 254 /* TZ test calls */
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/* to align the pointer to the (next) page boundary */
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#define PAGE_ALIGN(addr) ALIGN(addr, PAGE_SIZE)
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@ -112,6 +125,9 @@ int qca_scm_secure_authenticate(void *cmd_buf, size_t cmd_len);
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s32 qca_scm_call_atomic_ver2_32(u32 svc, u32 cmd, u32 arg1, u32 arg2);
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int qca_scm_auth_kernel(void *cmd_buf, size_t cmd_len);
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int is_scm_sec_auth_available(u32 svc_id, u32 cmd_id);
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#ifdef CONFIG_IPQ_TZT
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int qca_scm(u32 svc_id, u32 cmd_id, u32 ownr_id, u32 *addr, u32 len);
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#endif
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#define MAX_QCA_SCM_RETS 3
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#define MAX_QCA_SCM_ARGS 10
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#define SCM_READ_OP 1
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@ -155,6 +171,9 @@ struct qca_scm_desc {
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#define QCA_SCM_SIP_FNID(s, c) (((((s) & 0xFF) << 8) | \
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((c) & 0xFF)) | 0x02000000)
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#define QCA_SCM_FNID(s, c, o) (((((s) & 0xFF) << 8) | \
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((c) & 0xFF)) | (((o) & 0xFF) << 24))
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#define QCA_SMC_ATOMIC_MASK 0x80000000
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#define QCA_MAX_ARG_LEN 5
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@ -2,6 +2,7 @@ obj-y := cmd_bootqca.o
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obj-y += cmd_blowsecfuse.o
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obj-y += cmd_sec_auth.o
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obj-y += cmd_exectzt.o
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obj-$(CONFIG_IPQ_TZT) += cmd_tzt.o
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obj-$(CONFIG_SMP_CMD_SUPPORT) += cmd_runmulticore.o
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obj-y += fdt_info.o
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obj-y += board_init.o
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163
board/qca/arm/common/cmd_tzt.c
Normal file
163
board/qca/arm/common/cmd_tzt.c
Normal file
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@ -0,0 +1,163 @@
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/*
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* Copyright (c) 2015-2019 The Linux Foundation. All rights reserved.
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/arch-qca-common/scm.h>
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#define PRINT_BUF_LEN 0x400
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#define MDT_SIZE 0x1B88
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/* Region for loading test application */
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#define TZT_LOAD_ADDR 0x49B00000
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/* Reserved size for application */
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#define TZT_LOAD_SIZE 0x00200000
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#define LOAD_TZTESTEXEC_IMG_ID 0x0
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#define REGION_NOTIFICATION_ID 0x5
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#define REGISTER_LOG_BUFFER_ID 0x6
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#define SEC_TEST_ID 0x2C
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#define XPU_TEST_ID 0x80100004
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static int tzt_loaded;
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struct xpu_tzt {
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u64 test_id;
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u64 num_param;
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u64 param1;
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u64 param2;
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u64 param3;
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u64 param4;
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u64 param5;
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u64 param6;
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u64 param7;
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u64 param8;
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u64 param9;
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u64 param10;
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};
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struct resp {
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u64 status;
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u64 index;
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u64 total_tests;
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};
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struct log_buff {
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u16 wrap;
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u16 log_pos;
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char buffer[PRINT_BUF_LEN];
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};
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static int run_xpu_config_tst(void)
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{
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int i = 0;
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struct xpu_tzt xputzt = {0};
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struct resp resp_buf __aligned(CONFIG_SYS_CACHELINE_SIZE);
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u32 passed = 0, failed = 0;
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u32 args_log[MAX_QCA_SCM_ARGS + 1];
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u32 args[MAX_QCA_SCM_ARGS + 1];
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struct log_buff logbuff;
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xputzt.test_id = XPU_TEST_ID;
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xputzt.num_param = 0x3;
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xputzt.param1 = 0;
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xputzt.param2 = 0;
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xputzt.param3 = (u64)((u32)&resp_buf);
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args_log[0] = QCA_SCM_ARGS(2, SCM_IO_WRITE);
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args_log[1] = (u32)&logbuff;
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args_log[2] = PRINT_BUF_LEN;
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args[0] = QCA_SCM_ARGS(2, SCM_IO_WRITE);
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args[1] = (u32)&xputzt;
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args[2] = sizeof(struct xpu_tzt);
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printf("****** xPU Configuration Validation Test Begin ******\n");
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do {
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qca_scm(SCM_SVC_APP_MGR, REGISTER_LOG_BUFFER_ID,
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SCM_OWNR_QSEE_OS, args_log, 3);
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xputzt.param2 = i++;
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qca_scm(SCM_SVC_TEST_1, SEC_TEST_ID, SCM_OWNR_SIP, args, 3);
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invalidate_dcache_range((unsigned long)&resp_buf,
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(unsigned long)&resp_buf +
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CONFIG_SYS_CACHELINE_SIZE);
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if (resp_buf.status == 0)
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passed++;
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else if (resp_buf.status == 1)
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failed++;
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logbuff.buffer[logbuff.log_pos] = '\0';
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printf("%s", logbuff.buffer);
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} while (i < resp_buf.total_tests);
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printf("******************************************************\n");
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printf("Test Result: Passed %u Failed %u (total %u)\n",
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passed, failed, (u32)resp_buf.total_tests);
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printf("****** xPU Configuration Validation Test End ******\n");
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return 0;
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}
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static int do_tzt(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
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{
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char *cmd;
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u32 img_addr;
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u32 img_size;
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u32 args[MAX_QCA_SCM_ARGS + 1];
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/* at least two arguments should be there */
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if (argc < 2)
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return -1;
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cmd = argv[1];
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if (strcmp(cmd, "load") == 0) {
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if (argc < 4)
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return -1;
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img_addr = simple_strtoul(argv[2], NULL, 16);
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img_size = simple_strtoul(argv[3], NULL, 16);
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args[0] = QCA_SCM_ARGS(2, SCM_IO_WRITE);
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args[1] = TZT_LOAD_ADDR;
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args[2] = TZT_LOAD_SIZE;
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qca_scm(SCM_SVC_APP_MGR, REGION_NOTIFICATION_ID,
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SCM_OWNR_QSEE_OS, args, 3);
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args[0] = QCA_SCM_ARGS(3);
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args[1] = MDT_SIZE;
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args[2] = img_size - MDT_SIZE;
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args[3] = img_addr;
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qca_scm(SCM_SVC_EXTERNAL, LOAD_TZTESTEXEC_IMG_ID,
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SCM_OWNR_QSEE_OS, args, 4);
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tzt_loaded = 1;
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return 0;
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}
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if (!tzt_loaded) {
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printf("load tzt image before running test cases\n");
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return -1;
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}
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if (strcmp(cmd, "xpu") == 0)
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return run_xpu_config_tst();
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return -1;
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}
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U_BOOT_CMD(tzt, 4, 0, do_tzt,
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"load and run tzt\n",
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"tzt load address size - To load tzt image\n"
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"tzt xpu - To run xpu config test\n");
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@ -361,5 +361,6 @@ extern loff_t board_env_size;
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#define CONFIG_ARMV7_PSCI
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#define CONFIG_IPQ_ELF_AUTH
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#define IPQ_UBI_VOL_WRITE_SUPPORT
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#define CONFIG_IPQ_TZT
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#endif /* _IPQ6018_H */
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