From 7d93e5bcac0043ebec2cc56e44abad7a8b7c300a Mon Sep 17 00:00:00 2001
From: Kathiravan T <kathirav@codeaurora.org>
Date: Tue, 30 Jan 2018 12:12:24 +0530
Subject: [PATCH] ipq806x: FLASH XFER STEP register settings

This change is ported from U-Boot 2012.07 version. Reference commit:
commit a653a9f55432 ('ipq806x: FLASH XFER STEP register settings')

Change-Id: I372b0745e53b2d7a222c3445183bb1407fe113d4
Signed-off-by: Kathiravan T <kathirav@codeaurora.org>
---
 drivers/mtd/nand/ipq_nand.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/ipq_nand.c b/drivers/mtd/nand/ipq_nand.c
index 54b7c0ee12..cd12458f47 100644
--- a/drivers/mtd/nand/ipq_nand.c
+++ b/drivers/mtd/nand/ipq_nand.c
@@ -1759,6 +1759,8 @@ int ipq_nand_scan(struct mtd_info *mtd)
 	uint32_t nand_id2;
 	uint32_t onfi_sig;
 	struct nand_chip *chip = MTD_NAND_CHIP(mtd);
+	struct ipq_nand_dev *dev = MTD_IPQ_NAND_DEV(mtd);
+	struct ebi2nd_regs *regs = dev->regs;
 
 	ret = ipq_nand_onfi_probe(mtd, &onfi_sig);
 	if (ret < 0)
@@ -1791,7 +1793,13 @@ int ipq_nand_scan(struct mtd_info *mtd)
 		if (ret < 0)
 			return ret;
 	}
-
+	writel(0x04E00480, &regs->xfr_step1);
+	writel(0x41F0419A, &regs->xfr_step2);
+	writel(0x81E08180, &regs->xfr_step3);
+	writel(0xD000C000, &regs->xfr_step4);
+	writel(0xC000C000, &regs->xfr_step5);
+	writel(0xC000C000, &regs->xfr_step6);
+	writel(0xC000C000, &regs->xfr_step7);
 	mtd->type = MTD_NANDFLASH;
 	mtd->flags = MTD_CAP_NANDFLASH;