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ipq5018: Update TLMM gpio configuration

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Change-Id: Ic084abb39bd693b8f2cb23ea39d9c2062863553e
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
This commit is contained in:
Vandhiadevan Karunamoorthy 2019-11-27 12:23:01 +05:30 • committed by Vandhiadevan
parent 41a6ccad9e
commit 790fe61455
4 changed files with 13 additions and 20 deletions
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6
arch/arm/dts/ipq5018-soc.dtsi
View file

@ -26,24 +26,22 @@
gpio1 { gpio1 {
gpio = <20>; gpio = <20>;
func = <1>; func = <1>;
pull = <GPIO_NO_PULL>; pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OE_DISABLE>; oe = <GPIO_OE_DISABLE>;
drvstr = <GPIO_2MA>; drvstr = <GPIO_2MA>;
od_en = <GPIO_OD_DISABLE>; od_en = <GPIO_OD_DISABLE>;
sr_en = <GPIO_SR_DISABLE>; sr_en = <GPIO_SR_DISABLE>;
pu_res =<GPIO_PULL_RES0>; pu_res =<GPIO_PULL_RES0>;
pu = <1>;
}; };
gpio2 { gpio2 {
gpio = <21>; gpio = <21>;
func = <1>; func = <1>;
pull = <GPIO_NO_PULL>; pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OE_DISABLE>; oe = <GPIO_OE_DISABLE>;
drvstr = <GPIO_2MA>; drvstr = <GPIO_2MA>;
od_en = <GPIO_OD_DISABLE>; od_en = <GPIO_OD_DISABLE>;
sr_en = <GPIO_SR_DISABLE>; sr_en = <GPIO_SR_DISABLE>;
pu_res =<GPIO_PULL_RES0>; pu_res =<GPIO_PULL_RES0>;
pu = <1>;
}; };
}; };
}; };

3
arch/arm/include/asm/arch-qca-common/gpio.h
View file

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2011-2012, 2016-2017 The Linux Foundation. All rights reserved. * Copyright (c) 2011-2012, 2016-2017, 2019 The Linux Foundation. All rights reserved.
* Source : APQ8064 LK Boot * Source : APQ8064 LK Boot
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
@ -43,6 +43,7 @@ struct qca_gpio_config {
unsigned int vm; unsigned int vm;
unsigned int od_en; unsigned int od_en;
unsigned int pu_res; unsigned int pu_res;
unsigned int sr_en;
}; };
void gpio_tlmm_config(struct qca_gpio_config *gpio_config); void gpio_tlmm_config(struct qca_gpio_config *gpio_config);

12
drivers/gpio/ipq_gpio.c
View file

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. * Copyright (c) 2016-2017, 2019 The Linux Foundation. All rights reserved.
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and * it under the terms of the GNU General Public License version 2 and
@ -33,10 +33,15 @@ void gpio_tlmm_config(struct qca_gpio_config *gpio_config)
val |= gpio_config->func << 2; val |= gpio_config->func << 2;
val |= gpio_config->drvstr << 6; val |= gpio_config->drvstr << 6;
val |= gpio_config->oe << 9; val |= gpio_config->oe << 9;
#ifdef CONFIG_IPQ5018
val |= gpio_config->od_en << 10;
val |= gpio_config->sr_en << 11;
val |= gpio_config->pu_res << 12;
#else
val |= gpio_config->vm << 11; val |= gpio_config->vm << 11;
val |= gpio_config->od_en << 12; val |= gpio_config->od_en << 12;
val |= gpio_config->pu_res << 13; val |= gpio_config->pu_res << 13;
#endif
unsigned int *addr = unsigned int *addr =
(unsigned int *)GPIO_CONFIG_ADDR(gpio_config->gpio); (unsigned int *)GPIO_CONFIG_ADDR(gpio_config->gpio);
writel(val, addr); writel(val, addr);
@ -109,7 +114,8 @@ int qca_gpio_init(int offset)
offset, "od_en", 0); offset, "od_en", 0);
gpio_config.pu_res = fdtdec_get_uint(gd->fdt_blob, gpio_config.pu_res = fdtdec_get_uint(gd->fdt_blob,
offset, "pu_res", 0); offset, "pu_res", 0);
gpio_config.sr_en = fdtdec_get_uint(gd->fdt_blob,
offset, "sr_en", 0);
gpio_tlmm_config(&gpio_config); gpio_tlmm_config(&gpio_config);
} }
return 0; return 0;

12
include/dt-bindings/qcom/gpio-ipq5018.h
View file

@ -42,10 +42,6 @@
#define GPIO_OE_DISABLE 0 #define GPIO_OE_DISABLE 0
#define GPIO_OE_ENABLE 1 #define GPIO_OE_ENABLE 1
/* GPIO VM */
#define GPIO_VM_ENABLE 1
#define GPIO_VM_DISABLE 0
/* GPIO OD */ /* GPIO OD */
#define GPIO_OD_ENABLE 1 #define GPIO_OD_ENABLE 1
#define GPIO_OD_DISABLE 0 #define GPIO_OD_DISABLE 0
@ -54,14 +50,6 @@
#define GPIO_SR_ENABLE 1 #define GPIO_SR_ENABLE 1
#define GPIO_SR_DISABLE 0 #define GPIO_SR_DISABLE 0
/* GPIO PD */
#define GPIO_PD_ENABLE 1
#define GPIO_PD_DISABLE 0
/* GPIO PU */
#define GPIO_PU_ENABLE 1
#define GPIO_PU_DISABLE 0
/* GPIO PULLUP RES */ /* GPIO PULLUP RES */
#define GPIO_PULL_RES0 0 #define GPIO_PULL_RES0 0
#define GPIO_PULL_RES1 1 #define GPIO_PULL_RES1 1