From 75c182c3ecc22cf86cd1a9c19dd94caeec234c02 Mon Sep 17 00:00:00 2001 From: Timple Raj M Date: Tue, 2 May 2023 13:26:49 +0530 Subject: [PATCH] board: qca: arm: ipq5332: Fix to increase the CDR bandwidth This patch increases the CDR bandwidth to pass the USB 3.0 Rx jitter tolerance test Change-Id: Id58b71f4078ea5d60ab0b0d7bf93aa0a5d519e3c Signed-off-by: Timple Raj M --- board/qca/arm/ipq5332/ipq5332.c | 5 +++++ board/qca/arm/ipq5332/ipq5332.h | 12 ++++++++++++ 2 files changed, 17 insertions(+) diff --git a/board/qca/arm/ipq5332/ipq5332.c b/board/qca/arm/ipq5332/ipq5332.c index 9bffd7292b..e9cb8c758a 100644 --- a/board/qca/arm/ipq5332/ipq5332.c +++ b/board/qca/arm/ipq5332/ipq5332.c @@ -759,6 +759,11 @@ static void usb_init_ssphy(void __iomem *phybase) udelay(100); writel(APB_REG_UPHY_RX_RESCAL_CODE | APB_REG_UPHY_RX_AFE_CAP1 | APB_REG_UPHY_RX_AFE_RES1, PCIE_USB_COMBO_PHY_CFG_RX_AFE_2); + writel(APB_REG_UPHY_RXD_BIT_WIDTH | APB_REG_UPHY_RX_PLOOP_GAIN | + APB_REG_UPHY_RX_DLF_RATE | APB_UPHY_RX_PLOOP_EN | + APB_REG_UPHY_RX_CDR_EN, PCIE_USB_COMBO_PHY_CFG_RX_DLF_DEMUX_2); + writel(APB_REG_FLOOP_GAIN, PCIE_USB_COMBO_PHY_CFG_MISC1); + return; } diff --git a/board/qca/arm/ipq5332/ipq5332.h b/board/qca/arm/ipq5332/ipq5332.h index f7a1ffdad6..22ef3d1b2d 100644 --- a/board/qca/arm/ipq5332/ipq5332.h +++ b/board/qca/arm/ipq5332/ipq5332.h @@ -110,9 +110,21 @@ extern const add_node_t add_fdt_node[]; #define ATERESET ~BIT(0) #define PCIE_USB_COMBO_PHY_CFG_RX_AFE_2 0x4B07C4 +#define PCIE_USB_COMBO_PHY_CFG_RX_DLF_DEMUX_2 0x4B07E8 +#define PCIE_USB_COMBO_PHY_CFG_MISC1 0x4B0214 + #define APB_REG_UPHY_RX_RESCAL_CODE (16 << 8) #define APB_REG_UPHY_RX_AFE_CAP1 (7 << 4) #define APB_REG_UPHY_RX_AFE_RES1 (6 << 0) + +#define APB_REG_UPHY_RXD_BIT_WIDTH (2 << 0) +#define APB_REG_UPHY_RX_PLOOP_GAIN (4 << 4) +#define APB_REG_UPHY_RX_DLF_RATE (1 << 8) +#define APB_UPHY_RX_PLOOP_EN (1 << 12) +#define APB_REG_UPHY_RX_CDR_EN (1 << 13) + +#define APB_REG_FLOOP_GAIN (3 << 0) + #define TCSR_SOC_HW_VERSION_REG 0x194D000 /*