diff --git a/arch/arm/dts/ipq5018-soc.dtsi b/arch/arm/dts/ipq5018-soc.dtsi index b179f89356..e425396fb5 100644 --- a/arch/arm/dts/ipq5018-soc.dtsi +++ b/arch/arm/dts/ipq5018-soc.dtsi @@ -56,4 +56,12 @@ timer_load_val = <0x00FFFFFF 0xFFFFFFFF>; }; + spi { + status = "ok"; + compatible = "qcom,spi-qup-v2.7.0"; + wr_pipe_0 = <12>; + rd_pipe_0 = <13>; + spi_gpio {}; + }; + }; diff --git a/board/qca/arm/ipq5018/ipq5018.c b/board/qca/arm/ipq5018/ipq5018.c index b7c87d467e..0efbd86ccf 100644 --- a/board/qca/arm/ipq5018/ipq5018.c +++ b/board/qca/arm/ipq5018/ipq5018.c @@ -23,6 +23,7 @@ #include DECLARE_GLOBAL_DATA_PTR; +extern int ipq_spi_init(u16); void uart1_configure_mux(void) { @@ -130,7 +131,14 @@ void reset_crashdump(void) void board_nand_init(void) { - return; +#ifdef CONFIG_QCA_SPI + int gpio_node; + gpio_node = fdt_path_offset(gd->fdt_blob, "/spi/spi_gpio"); + if (gpio_node >= 0) { + qca_gpio_init(gpio_node); + ipq_spi_init(CONFIG_IPQ_SPI_NOR_INFO_IDX); + } +#endif } void enable_caches(void) diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 66172763e9..42828d39c7 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -36,6 +36,8 @@ ifdef CONFIG_QCA_SPI obj-$(CONFIG_ARCH_IPQ40xx) += qca_qup_spi_bam.o obj-$(CONFIG_ARCH_IPQ807x) += qca_qup_spi_bam.o obj-$(CONFIG_ARCH_IPQ6018) += qca_qup_spi_bam.o +obj-$(CONFIG_ARCH_IPQ5018) += qca_qup_spi_bam.o + obj-$(CONFIG_ARCH_IPQ806x) += ipq_spi.o endif obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o diff --git a/include/configs/ipq5018.h b/include/configs/ipq5018.h index 632054ef6b..522f1e9f86 100644 --- a/include/configs/ipq5018.h +++ b/include/configs/ipq5018.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_BOOTM_LEN 0x1000000 #define CONFIG_ENV_SIZE_MAX (256 << 10) /* 256 KB */ -#define CONFIG_ENV_IS_NOWHERE 1 /* *Size of malloc() pool @@ -129,7 +128,28 @@ extern loff_t board_env_size; #define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_NAND_ONFI_DETECTION +/* +* SPI Flash Configs +*/ +#define CONFIG_QCA_SPI +#define CONFIG_SPI_FLASH +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_SPI_FLASH_MACRONIX +#define CONFIG_SPI_FLASH_GIGADEVICE +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED (48 * 1000 * 1000) +#define CONFIG_SPI_FLASH_BAR 1 +#define CONFIG_SPI_FLASH_USE_4K_SECTORS +#define CONFIG_IPQ_4B_ADDR_SWITCH_REQD +#define CONFIG_QUP_SPI_USE_DMA 0 +#define CONFIG_EFI_PARTITION +#define CONFIG_QCA_BAM 1 /* * Expose SPI driver as a pseudo NAND driver to make use * of U-Boot's MTD framework. @@ -147,7 +167,6 @@ extern loff_t board_env_size; #define CONFIG_SPI_FLASH_INFO_IDX CONFIG_IPQ_SPI_NOR_INFO_IDX #define QCA_SPI_NOR_DEVICE "spi0.0" -#define CONFIG_QUP_SPI_USE_DMA 1 /* * U-Boot Env Configs