From 70dae9d94881ee861add475f14d29a33d1870fe9 Mon Sep 17 00:00:00 2001
From: Balaji Jagadeesan <bjagadee@codeaurora.org>
Date: Thu, 5 Jul 2018 09:39:02 +0530
Subject: [PATCH] ipq40xx: dts: Remove sdhci gpio entries in DK06 and DK07

In DK06, there is no h/w support for mmc and sd.
In DK07, there is no h/w support for mmc and no support
for sd in uboot.
So, removing the sdhci entries from dts.

Change-Id: I39ac2fa56745d1ee3c23be5d8acd3ce5c355a135
Signed-off-by: Balaji Jagadeesan <bjagadee@codeaurora.org>
---
 arch/arm/dts/ipq40xx-dk06-c1.dts | 114 -------------------------------
 arch/arm/dts/ipq40xx-dk07.dtsi   |  70 -------------------
 2 files changed, 184 deletions(-)

diff --git a/arch/arm/dts/ipq40xx-dk06-c1.dts b/arch/arm/dts/ipq40xx-dk06-c1.dts
index ec3b9ddab8..69ac6cf49a 100644
--- a/arch/arm/dts/ipq40xx-dk06-c1.dts
+++ b/arch/arm/dts/ipq40xx-dk06-c1.dts
@@ -112,120 +112,6 @@
 		};
 	};
 
-	sdhci@7824000 {
-		mmc_gpio {
-			gpio1 {
-				gpio = <23>;
-				func = <1>;
-				pull = <GPIO_PULL_UP>;
-				drvstr = <GPIO_10MA>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio2 {
-				gpio = <24>;
-				func = <1>;
-				pull = <GPIO_PULL_UP>;
-				drvstr = <GPIO_10MA>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio3 {
-				gpio = <25>;
-				func = <1>;
-				pull = <GPIO_PULL_UP>;
-				drvstr = <GPIO_10MA>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio4 {
-				gpio = <26>;
-				func = <1>;
-				pull = <GPIO_PULL_UP>;
-				drvstr = <GPIO_10MA>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio5 {
-				gpio = <27>;
-				func = <1>;
-				pull = <GPIO_PULL_UP>;
-				drvstr = <GPIO_16MA>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio6 {
-				gpio = <28>;
-				func = <1>;
-				pull = <GPIO_PULL_UP>;
-				drvstr = <GPIO_10MA>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio7 {
-				gpio = <29>;
-				func = <1>;
-				pull = <GPIO_PULL_UP>;
-				drvstr = <GPIO_10MA>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio8 {
-				gpio = <30>;
-				func = <1>;
-				pull = <GPIO_PULL_UP>;
-				drvstr = <GPIO_10MA>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio9 {
-				gpio = <31>;
-				func = <1>;
-				pull = <GPIO_PULL_UP>;
-				drvstr = <GPIO_10MA>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio10 {
-				gpio = <32>;
-				func = <1>;
-				pull = <GPIO_NO_PULL>;
-				drvstr = <GPIO_10MA>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-		};
-	};
-
 	edma_cfg {
 		unit = <0>;
 		/* Based on the enum for PSGMII phy interface from include/phy.h */
diff --git a/arch/arm/dts/ipq40xx-dk07.dtsi b/arch/arm/dts/ipq40xx-dk07.dtsi
index bebf5cf6fd..733a2d19bf 100644
--- a/arch/arm/dts/ipq40xx-dk07.dtsi
+++ b/arch/arm/dts/ipq40xx-dk07.dtsi
@@ -44,76 +44,6 @@
 		};
 	};
 
-	sdhci@7824000 {
-		mmc_gpio {
-			gpio1 {
-				gpio = <23>;
-				func = <1>;	/* sdio0 */
-				pull = <GPIO_PULL_UP>;
-				drvstr = <DRV_TYPE_C>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio2 {
-				gpio = <24>;
-				func = <1>;	/* sdio1 */
-				pull = <GPIO_PULL_UP>;
-				drvstr = <DRV_TYPE_C>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio3 {
-				gpio = <25>;
-				func = <1>;	/* sdio2 */
-				pull = <GPIO_PULL_UP>;
-				drvstr = <DRV_TYPE_C>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio4 {
-				gpio = <26>;
-				func = <1>;	/* sdio3 */
-				pull = <GPIO_PULL_UP>;
-				drvstr = <DRV_TYPE_C>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio5 {
-				gpio = <27>;
-				func = <1>;	/* sdio_clk */
-				pull = <GPIO_PULL_UP>;
-				drvstr = <DRV_TYPE_A>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-
-			gpio6 {
-				gpio = <28>;
-				func = <1>;	/* sdio_cmd */
-				pull = <GPIO_PULL_UP>;
-				drvstr = <DRV_TYPE_C>;
-				oe = <GPIO_OE_DISABLE>;
-				vm = <GPIO_VM_ENABLE>;
-				od_en = <GPIO_OD_DISABLE>;
-				pu_res = <GPIO_PULL_RES2>;
-			};
-		};
-	};
-
 	edma_cfg {
 		unit = <0>;
 		/* Based on the enum for PSGMII phy interface from include/phy.h */