From 6f1452c953711810623a67db2e240c963375cc7d Mon Sep 17 00:00:00 2001 From: Sham Muthayyan Date: Thu, 29 Jun 2017 10:09:22 +0530 Subject: [PATCH] ipq807x: Deinit pcie before loading kernel Change-Id: I22fe87dac2fd8f55978481fae71ee65281dfd204 Signed-off-by: Sham Muthayyan --- arch/arm/include/asm/arch-qca-common/gpio.h | 1 + board/qca/arm/common/cmd_bootqca.c | 4 ++ board/qca/arm/ipq807x/ipq807x.c | 59 +++++++++++++++++++++ board/qca/arm/ipq807x/ipq807x.h | 6 +++ drivers/gpio/ipq_gpio.c | 18 +++++++ 5 files changed, 88 insertions(+) diff --git a/arch/arm/include/asm/arch-qca-common/gpio.h b/arch/arm/include/asm/arch-qca-common/gpio.h index 64766329b0..2f1e39214c 100644 --- a/arch/arm/include/asm/arch-qca-common/gpio.h +++ b/arch/arm/include/asm/arch-qca-common/gpio.h @@ -52,6 +52,7 @@ void gpio_set_value(unsigned int gpio, unsigned int out); int gpio_get_value(unsigned int gpio); int qca_gpio_init(int offset); +int qca_gpio_deinit(int offset); /* GPIO TLMM: Output value */ #define GPIO_OUT_LOW 0 diff --git a/board/qca/arm/common/cmd_bootqca.c b/board/qca/arm/common/cmd_bootqca.c index 3018dcd0cd..be61917306 100644 --- a/board/qca/arm/common/cmd_bootqca.c +++ b/board/qca/arm/common/cmd_bootqca.c @@ -480,6 +480,8 @@ static int do_boot_signedimg(cmd_tbl_t *cmdtp, int flag, int argc, char *const a board_mmc_deinit(); #endif + board_pci_deinit(); + ret = config_select(request, runcmd, sizeof(runcmd)); if (debug) @@ -611,6 +613,8 @@ static int do_boot_unsignedimg(cmd_tbl_t *cmdtp, int flag, int argc, char *const dcache_enable(); + board_pci_deinit(); + setenv("mtdids", mtdids); ret = genimg_get_format((void *)CONFIG_SYS_LOAD_ADDR); diff --git a/board/qca/arm/ipq807x/ipq807x.c b/board/qca/arm/ipq807x/ipq807x.c index 9b45e5e098..1babcf7b64 100644 --- a/board/qca/arm/ipq807x/ipq807x.c +++ b/board/qca/arm/ipq807x/ipq807x.c @@ -304,6 +304,33 @@ static void pcie_clock_init(int id) } } +static void pcie_clock_deinit(int id) +{ + + if (id == 0) { + writel(0x0, GCC_PCIE0_AUX_CMD_RCGR); + writel(0x0, GCC_PCIE0_AXI_CFG_RCGR); + writel(0x0, GCC_PCIE0_AXI_CMD_RCGR); + mdelay(100); + writel(0x0, GCC_SYS_NOC_PCIE0_AXI_CLK); + writel(0x0, GCC_PCIE0_AHB_CBCR); + writel(0x0, GCC_PCIE0_AXI_M_CBCR); + writel(0x0, GCC_PCIE0_AXI_S_CBCR); + writel(0x0, GCC_PCIE0_AUX_CBCR); + writel(0x0, GCC_PCIE0_PIPE_CBCR); + writel(0x0, GCC_PCIE1_AUX_CMD_RCGR); + writel(0x0, GCC_PCIE1_AXI_CFG_RCGR); + writel(0x0, GCC_PCIE1_AXI_CMD_RCGR); + mdelay(100); + writel(0x0, GCC_SYS_NOC_PCIE1_AXI_CLK); + writel(0x0, GCC_PCIE1_AHB_CBCR); + writel(0x0, GCC_PCIE1_AXI_M_CBCR); + writel(0x0, GCC_PCIE1_AXI_S_CBCR); + writel(0x0, GCC_PCIE1_AUX_CBCR); + writel(0x0, GCC_PCIE1_PIPE_CBCR); + } +} + void board_pci_init(int id) { int node, gpio_node; @@ -323,6 +350,38 @@ void board_pci_init(int id) return ; } +void board_pci_deinit() +{ + int node, gpio_node, i, err; + char name[16]; + struct fdt_resource parf; + struct fdt_resource pci_phy; + + for (i = 0; i < PCI_MAX_DEVICES; i++) { + sprintf(name, "pci%d", i); + node = fdt_path_offset(gd->fdt_blob, name); + if (node < 0) { + printf("Could not find PCI in device tree\n"); + return; + } + err = fdt_get_named_resource(gd->fdt_blob, node, "reg", "reg-names", "parf", + &parf); + writel(0x0, parf.start + 0x358); + writel(0x1, parf.start + 0x40); + err = fdt_get_named_resource(gd->fdt_blob, node, "reg", "reg-names", "pci_phy", + &pci_phy); + writel(0x1, pci_phy.start + 800); + writel(0x0, pci_phy.start + 804); + gpio_node = fdt_subnode_offset(gd->fdt_blob, node, "pci_gpio"); + if (gpio_node >= 0) + qca_gpio_deinit(gpio_node); + + } + pcie_clock_deinit(0); + + return ; +} + int ipq_fdt_fixup_socinfo(void *blob) { return 0; diff --git a/board/qca/arm/ipq807x/ipq807x.h b/board/qca/arm/ipq807x/ipq807x.h index 6c23dab235..a4a1e85e3f 100644 --- a/board/qca/arm/ipq807x/ipq807x.h +++ b/board/qca/arm/ipq807x/ipq807x.h @@ -30,6 +30,9 @@ #define GCC_SDCC1_APPS_D 0x1842014 #define GCC_BLSP1_UART1_APPS_CBCR 0x0180203c +#define GCC_SYS_NOC_PCIE0_AXI_CLK 0x01826048 +#define GCC_PCIE0_PHY_BCR 0x01875038 +#define GCC_PCIE0PHY_PHY_BCR 0x0187503C #define GCC_PCIE0_AXI_M_CBCR 0x01875008 #define GCC_PCIE0_AXI_S_CBCR 0x0187500C #define GCC_PCIE0_AHB_CBCR 0x01875010 @@ -39,6 +42,9 @@ #define GCC_PCIE0_AXI_CMD_RCGR 0x01875050 #define GCC_PCIE0_AXI_CFG_RCGR 0x01875058 +#define GCC_SYS_NOC_PCIE1_AXI_CLK 0x0182604C +#define GCC_PCIE1_PHY_BCR 0x01876038 +#define GCC_PCIE1PHY_PHY_BCR 0x0187603C #define GCC_PCIE1_AXI_M_CBCR 0x01876008 #define GCC_PCIE1_AXI_S_CBCR 0x0187600C #define GCC_PCIE1_AHB_CBCR 0x01876010 diff --git a/drivers/gpio/ipq_gpio.c b/drivers/gpio/ipq_gpio.c index 9ae719f40d..f5f65d70d3 100644 --- a/drivers/gpio/ipq_gpio.c +++ b/drivers/gpio/ipq_gpio.c @@ -103,3 +103,21 @@ int qca_gpio_init(int offset) } return 0; } + +int qca_gpio_deinit(int offset) +{ + struct qca_gpio_config gpio_config; + + for (offset = fdt_first_subnode(gd->fdt_blob, offset); offset > 0; + offset = fdt_next_subnode(gd->fdt_blob, offset)) { + + gpio_config.gpio = fdtdec_get_uint(gd->fdt_blob, + offset, "gpio", 0); + unsigned int *addr = + (unsigned int *)GPIO_CONFIG_ADDR(gpio_config.gpio); + writel(1, addr); + addr = (unsigned int *)GPIO_IN_OUT_ADDR(gpio_config.gpio); + writel(1, addr); + } + return 0; +}