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ipq5018: Fix usb3 ssphy sequence

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This patch will tune ssuniphy to fixed
offset instead of SSC.

Signed-off-by: Manikanta Mylavarapu <mmanikan@codeaurora.org>
Change-Id: Ieca1e079275092ea49fcc1ffa9ba1dadadd2a93a
This commit is contained in:
Manikanta Mylavarapu 2020-06-12 09:43:42 +05:30 • committed by Gerrit - the friendly Code Review server
parent 5c90c31be3
commit 65a09cf89e
2 changed files with 11 additions and 0 deletions
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2
board/qca/arm/ipq5018/ipq5018.c
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@ -1203,6 +1203,8 @@ static void usb_init_ssphy(void __iomem *phybase)
/*set fstep*/
writel(0x1, phybase + SSCG_CTRL_REG_1);
writel(0xeb, phybase + SSCG_CTRL_REG_2);
writel((readl(phybase + CDR_CTRL_REG_1) | APB_FIXED_OFFSET),
phybase + CDR_CTRL_REG_1);
return;
}

9
board/qca/arm/ipq5018/ipq5018.h
View file

@ -419,6 +419,15 @@
#define SSCG_CTRL_REG_4 0xa8
#define SSCG_CTRL_REG_5 0xac
#define SSCG_CTRL_REG_6 0xb0
#define CDR_CTRL_REG_1 0x80
#define CDR_CTRL_REG_2 0x84
#define CDR_CTRL_REG_3 0x88
#define CDR_CTRL_REG_4 0x8C
#define CDR_CTRL_REG_5 0x90
#define CDR_CTRL_REG_6 0x94
#define CDR_CTRL_REG_7 0x98
#define APB_FIXED_OFFSET (0x1 << 3)
#define USB_PHY_CFG0 0x94
#define USB_PHY_UTMI_CTRL5 0x50