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drivers: net: ipq6018: Fix uniphy soft reset

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This patch updates the uniphy soft reset function
to do the reset based on uniphy index only for the
required ports.

Change-Id: I7078b7f1e53fd86f32ec213dffe1eeebd5c702ad
Signed-off-by: speriaka <speriaka@codeaurora.org>
This commit is contained in:
speriaka 2019-07-29 16:18:38 +05:30 • committed by Gerrit - the friendly Code Review server
parent a19e4580c5
commit 5f76e5ec94
2 changed files with 11 additions and 19 deletions
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29
drivers/net/ipq6018/ipq6018_uniphy.c
View file

@ -93,30 +93,23 @@ static void ppe_gcc_uniphy_soft_reset(uint32_t uniphy_index)
reg_value = readl(GCC_UNIPHY0_MISC + (uniphy_index * GCC_UNIPHY_REG_INC));
reg_value |= GCC_UNIPHY_PSGMII_SOFT_RESET;
if (uniphy_index == 0)
reg_value |= GCC_UNIPHY_PSGMII_SOFT_RESET;
else
reg_value |= GCC_UNIPHY_SGMII_SOFT_RESET;
writel(reg_value, GCC_UNIPHY0_MISC + (uniphy_index * GCC_UNIPHY_REG_INC));
udelay(500);
reg_value &= ~GCC_UNIPHY_PSGMII_SOFT_RESET;
if (uniphy_index == 0)
reg_value &= ~GCC_UNIPHY_PSGMII_SOFT_RESET;
else
reg_value &= ~GCC_UNIPHY_SGMII_SOFT_RESET;
writel(reg_value, GCC_UNIPHY0_MISC + (uniphy_index * GCC_UNIPHY_REG_INC));
}
static void ppe_gcc_uniphy_sgmii_soft_reset(uint32_t uniphy_index)
{
uint32_t reg_value;
reg_value = readl(GCC_UNIPHY0_MISC + (uniphy_index * GCC_UNIPHY_REG_INC));
reg_value |= GCC_UNIPHY_SGMII_SOFT_RESET;
writel(reg_value, GCC_UNIPHY0_MISC + (uniphy_index * GCC_UNIPHY_REG_INC));
mdelay(100);
reg_value &= ~GCC_UNIPHY_SGMII_SOFT_RESET;
writel(reg_value, GCC_UNIPHY0_MISC + (uniphy_index * GCC_UNIPHY_REG_INC));
mdelay(100);
}
static void ppe_uniphy_psgmii_mode_set(uint32_t uniphy_index)
{
ppe_gcc_uniphy_xpcs_reset(uniphy_index, true);
@ -183,7 +176,7 @@ static void ppe_uniphy_sgmii_mode_set(uint32_t uniphy_index, uint32_t mode)
break;
}
ppe_gcc_uniphy_sgmii_soft_reset(uniphy_index);
ppe_gcc_uniphy_soft_reset(uniphy_index);
if (uniphy_index == 0) {
writel(0x1, GCC_UNIPHY0_PORT4_RX_CBCR);

1
drivers/net/ipq6018/ipq6018_uniphy.h
View file

@ -32,7 +32,6 @@
#define UNIPHY_CALIBRATION_DONE 0x1
#define GCC_UNIPHY_PSGMII_SOFT_RESET 0x3ff2
#define GCC_UNIPHY_USXGMII_SOFT_RESET 0x36
#define GCC_UNIPHY_SGMII_SOFT_RESET 0x32
#define PPE_UNIPHY_BASE 0X07A00000