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Merge "board: qca: make training offset fixup as generic"

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Linux Build Service Account 2022-07-04 11:18:41 -07:00 • committed by Gerrit - the friendly Code Review server
commit 5c2b183d10
7 changed files with 26 additions and 45 deletions
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23
board/qca/arm/common/fdt_fixup.c
View file

@ -21,6 +21,10 @@
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_QPIC_SERIAL
extern unsigned int qpic_training_offset;
#endif
#ifdef CONFIG_IPQ_FDT_FIXUP
#define FDT_EDIT "fdtedit"
/* Buffer size to hold numbers from 0-99 + 1 NULL character */
@ -886,6 +890,24 @@ __weak void fdt_fixup_qpic(void *blob)
return;
}
__weak void fdt_fixup_qpic_serial_training_offset(void *blob)
{
#if defined(CONFIG_QPIC_SERIAL) && defined(CONFIG_IPQ_FDT_FIXUP)
char node_name[128];
if (qpic_training_offset != 0xBAD0FF5E){
snprintf(node_name, sizeof(node_name), "%s%s%d",
CONFIG_QPIC_NODE,
"%qcom,training_offset%",
qpic_training_offset);
parse_fdt_fixup(node_name, blob);
}
#else
return;
#endif
}
__weak void fdt_fixup_sdx65_gpio(void *blob)
{
return;
@ -1140,6 +1162,7 @@ int ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_cpus_node(blob);
fdt_low_memory_fixup(blob);
fdt_fixup_qpic(blob);
fdt_fixup_qpic_serial_training_offset(blob);
#ifdef CONFIG_IPQ_RUNTIME_FAILSAFE
fdt_fixup_runtime_failsafe(blob);
#endif

4
board/qca/arm/devsoc/devsoc.c
View file

@ -49,10 +49,6 @@ const add_node_t add_fdt_node[] = {{}};
unsigned int qpic_frequency = 0, qpic_phase = 0;
#ifdef CONFIG_QPIC_SERIAL
extern unsigned int qpic_training_offset;
#endif
#ifdef CONFIG_QCA_MMC
struct sdhci_host mmc_host;
#endif

16
board/qca/arm/ipq5018/ipq5018.c
View file

@ -71,10 +71,6 @@ extern void ppe_uniphy_refclk_set(void);
unsigned int qpic_frequency = 0, qpic_phase = 0;
#ifdef CONFIG_QPIC_SERIAL
extern unsigned int qpic_training_offset;
#endif
const char *rsvd_node = "/reserved-memory";
const char *del_node[] = {"uboot",
"sbl",
@ -2050,18 +2046,6 @@ void fdt_fixup_qpic(void *blob)
printf("%s : Unable to set property 'qcom,phase'\n",__func__);
return;
}
#ifdef CONFIG_QPIC_SERIAL
if (qpic_training_offset != 0xBAD0FF5E){
ret = fdt_setprop_u32(blob, node_off, "qcom,training_offset",
qpic_training_offset);
if (ret) {
printf("%s : Unable to set property 'qcom,training_offset'\n",
__func__);
return;
}
}
#endif
}
void fdt_fixup_bt_debug(void *blob)

25
board/qca/arm/ipq9574/ipq9574.c
View file

@ -40,7 +40,6 @@ extern int ipq9574_edma_init(void *cfg);
extern int ipq_spi_init(u16);
unsigned int qpic_frequency = 0, qpic_phase = 0;
extern unsigned int qpic_training_offset;
static int aq_phy_initialised = 0;
extern unsigned ipq_runtime_fs_feature_enabled;
@ -89,30 +88,6 @@ void fdt_fixup_runtime_failsafe(void *blob)
}
#endif
void fdt_fixup_qpic(void *blob)
{
int node_off, ret;
const char *qpic_node = {"/soc/nand@79b0000"};
/* This fixup is for passing qpic training offset to HLOS */
node_off = fdt_path_offset(blob, qpic_node);
if (node_off < 0) {
printf("%s: QPIC: unable to find node '%s'\n",
__func__, qpic_node);
return;
}
if (qpic_training_offset != 0xBAD0FF5E){
ret = fdt_setprop_u32(blob, node_off, "qcom,training_offset",
qpic_training_offset);
if (ret) {
printf("%s : Unable to set property 'qcom,training_offset'\n",
__func__);
return;
}
}
}
void board_nand_init(void)
{
#ifdef CONFIG_QPIC_SERIAL

1
include/configs/devsoc.h
View file

@ -273,6 +273,7 @@ extern loff_t board_env_size;
#endif
#ifdef CONFIG_QPIC_SERIAL
#define CONFIG_QPIC_NODE "/soc/nand@79b0000/"
#ifdef QSPI_SERIAL_DEBUG /* QSPI DEBUG */
#define qspi_debug(fmt,args...) printf (fmt ,##args)
#else

1
include/configs/ipq5018.h
View file

@ -162,6 +162,7 @@ extern loff_t board_env_size;
#endif
#ifdef CONFIG_QPIC_SERIAL
#define CONFIG_QPIC_NODE "/soc/qpic-nand@79b0000/"
#ifdef QSPI_SERIAL_DEBUG /* QSPI DEBUG */
#define qspi_debug(fmt,args...) printf (fmt ,##args)
#else

1
include/configs/ipq9574.h
View file

@ -204,6 +204,7 @@ extern loff_t board_env_size;
#define CONFIG_QPIC_SERIAL
#ifdef CONFIG_QPIC_SERIAL
#define CONFIG_QPIC_NODE "/soc/nand@79b0000/"
#ifdef QSPI_SERIAL_DEBUG /* QSPI DEBUG */
#define qspi_debug(fmt,args...) printf (fmt ,##args)
#else