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i.MX6 USDHC: Use the ESDHC clock

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The commit "i.mx: fsl_esdhc: add the i.mx6q support" (4692708d) introduces
support for the i.MX6Q MMC host controller USDHC.

MXC_IPG_PERCLK sets the clock to 66MHz. This seems to be the default clock
of the ESDHC IP found in < i.MX6 silicon. However, the default clock for the USDHC
IP found in i.MX6 is 200MHz (MXC_ESDHC_CLK). This difference will cause a 3 times
higher clock on SD_CLK than expected (see fsl_esdh.c -> set_sysctl()).

Signed-off-by: Michael Langer <michael.langer@de.bosch.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <r64343@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Michael Langer 2012-06-14 03:44:33 +00:00 • committed by Albert ARIBAUD
parent f69b0653ac
commit 5c23712dbd
1 changed files with 4 additions and 0 deletions
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4
arch/arm/cpu/armv7/imx-common/speed.c
View file

@ -35,7 +35,11 @@ DECLARE_GLOBAL_DATA_PTR;
int get_clocks(void)
{
#ifdef CONFIG_FSL_ESDHC
#ifdef CONFIG_FSL_USDHC
gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
#else
gd->sdhc_clk = mxc_get_clock(MXC_IPG_PERCLK);
#endif
#endif
return 0;
}