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arm: mvebu: Disable L2 cache before enabling d-cache
L2 cache may still be enabled by the BootROM. We need to first disable it before enabling d-cache support. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
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@ -7,6 +7,7 @@
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#include <common.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <asm/pl310.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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@ -240,6 +241,13 @@ int cpu_eth_init(bd_t *bis)
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#ifndef CONFIG_SYS_DCACHE_OFF
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void enable_caches(void)
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{
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struct pl310_regs *const pl310 =
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(struct pl310_regs *)CONFIG_SYS_PL310_BASE;
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/* First disable L2 cache - may still be enable from BootROM */
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if (mvebu_soc_family() == MVEBU_SOC_A38X)
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clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN);
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/* Avoid problem with e.g. neta ethernet driver */
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invalidate_dcache_all();
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