From 564c1b6cba2037910ca025abff2cece01eb995d0 Mon Sep 17 00:00:00 2001 From: Vandhiadevan Karunamoorthy Date: Fri, 18 Nov 2022 19:54:08 +0530 Subject: [PATCH] ipq5332: update clock for ethernet Change-Id: Id95f46bcf1d67180fb02587ff008be873dc90eea Signed-off-by: Vandhiadevan Karunamoorthy --- board/qca/arm/ipq5332/clock.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/board/qca/arm/ipq5332/clock.c b/board/qca/arm/ipq5332/clock.c index 4753e28d84..a884864db0 100644 --- a/board/qca/arm/ipq5332/clock.c +++ b/board/qca/arm/ipq5332/clock.c @@ -337,6 +337,16 @@ void frequency_init(void) { unsigned int reg_val; + /* PCNOC_BFDCD frequency for Uniphy AHB 100M */ + reg_val = readl(GCC_PCNOC_BFDCD_CFG_RCGR); + reg_val &= ~0x7ff; + writel(reg_val | PCCNOC_BFDCD_SRC_SEL | PCCNOC_BFDCD_DIV_SEL, + GCC_PCNOC_BFDCD_CFG_RCGR); + reg_val = readl(GCC_PCNOC_BFDCD_CMD_RCGR); + writel(reg_val | CMD_UPDATE, GCC_PCNOC_BFDCD_CMD_RCGR); + mdelay(1); + writel(reg_val | ROOT_EN, GCC_PCNOC_BFDCD_CMD_RCGR); + /* GCC NSS frequency 100M */ reg_val = readl(NSS_CC_CFG_CFG_RCGR); reg_val &= ~0x7ff;