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ipq5018: Add Napa phy support in mp03.3 RDP

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This changes removes NAPA support from tiny U-boot config

Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
Change-Id: I057064d63a3ac0788275a4572242cc251a445a98
This commit is contained in:
Vandhiadevan Karunamoorthy 2020-06-29 13:18:35 +05:30
parent 3f32f36239
commit 4ee702eff9
7 changed files with 39 additions and 14 deletions
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8
arch/arm/dts/ipq5018-db-mp03.3.dts
View file

@ -121,6 +121,7 @@
};
gmac_cfg {
ext_mdio_gpio = <36 37>;
gephy_led = <46>;
gmac1_cfg {
@ -129,5 +130,12 @@
phy_address = <7>;
phy_name = "IPQ MDIO0";
};
gmac2_cfg {
unit = <1>;
base = <0x39D00000>;
phy_address = <0x1c>;
napa_gpio = <39>;
phy_name = "IPQ MDIO1";
};
};
};

9
arch/arm/dts/ipq5018-mp03.3.dts
View file

@ -127,6 +127,7 @@
};
gmac_cfg {
ext_mdio_gpio = <36 37>;
gephy_led = <46>;
gmac1_cfg {
@ -135,6 +136,14 @@
phy_address = <7>;
phy_name = "IPQ MDIO0";
};
gmac2_cfg {
unit = <1>;
base = <0x39D00000>;
phy_address = <0x1c>;
napa_gpio = <39>;
phy_name = "IPQ MDIO1";
};
};
};

1
arch/arm/include/asm/arch-ipq5018/ipq5018_gmac.h
View file

@ -173,6 +173,7 @@
#define OP_SECOND_FRAME (1 << 2)
/* GMAC config definitions */
#define FES_PORT_SPEED (1 << 14)
#define MII_PORT_SELECT (1 << 15)
#define SGMII_PORT_SELECT (0 << 15)
#define FRAME_BURST_ENABLE (1 << 21)

6
board/qca/arm/ipq5018/ipq5018.c
View file

@ -640,7 +640,7 @@ static void set_ext_mdio_gpio(int node)
}
}
static void set_napa_phy_gpio(int gpio)
static void reset_napa_phy_gpio(int gpio)
{
unsigned int *napa_gpio_base;
@ -648,7 +648,7 @@ static void set_napa_phy_gpio(int gpio)
writel(0x203, napa_gpio_base);
writel(0x0, GPIO_IN_OUT_ADDR(gpio));
mdelay(500);
writel(0x1, GPIO_IN_OUT_ADDR(gpio));
writel(0x2, GPIO_IN_OUT_ADDR(gpio));
}
static void reset_s17c_switch_gpio(int gpio)
@ -1015,7 +1015,7 @@ int board_eth_init(bd_t *bis)
gmac_cfg[loop].phy_napa_gpio = fdtdec_get_uint(gd->fdt_blob,
offset, "napa_gpio", 0);
if (gmac_cfg[loop].phy_napa_gpio){
set_napa_phy_gpio(gmac_cfg[loop].phy_napa_gpio);
reset_napa_phy_gpio(gmac_cfg[loop].phy_napa_gpio);
}
switch_gpio = fdtdec_get_uint(gd->fdt_blob, offset, "switch_gpio", 0);
if (switch_gpio) {

6
configs/ipq5018_defconfig
View file

@ -85,6 +85,12 @@ CONFIG_CMD_SETEXPR=y
#
# Network commands
#
#
# Network PHY
#
CONFIG_QCA8081_PHY=y
CONFIG_CMD_NET=y
# CONFIG_CMD_TFTPPUT is not set
# CONFIG_CMD_TFTPSRV is not set

22
drivers/net/ipq5018/ipq5018_gmac.c
View file

@ -82,16 +82,18 @@ static void ipq_eth_mac_cfg(struct eth_device *dev)
{
struct ipq_eth_dev *priv = dev->priv;
struct eth_mac_regs *mac_reg = (struct eth_mac_regs *)priv->mac_regs_p;
uint speed = 0;
uint ipq_mac_cfg = 0;
uint ipq_mac_framefilter = 0;
ipq_mac_framefilter = PROMISCUOUS_MODE_ON;
if (priv->mac_unit) {
if (priv->phy_type == QCA8081_1_1_PHY|| priv->phy_type == QCA8033_PHY)
speed = priv->speed;
ipq_mac_cfg |= (FRAME_BURST_ENABLE | JUMBO_FRAME_ENABLE | JABBER_DISABLE |
TX_ENABLE | RX_ENABLE | FULL_DUPLEX_ENABLE);
TX_ENABLE | RX_ENABLE | FULL_DUPLEX_ENABLE | speed);
writel(ipq_mac_cfg, &mac_reg->conf);
} else {
@ -345,6 +347,7 @@ static int ipq5018_phy_link_update(struct eth_device *dev)
char *lstatus[] = {"up", "Down"};
char *dp[] = {"Half", "Full"};
int speed_clock1 = 0, speed_clock2 = 0;
int mode = PORT_WRAPPER_SGMII0_RGMII4;
if (priv->ipq_swith == 0) {
phy_get_ops = priv->ops;
@ -380,7 +383,7 @@ static int ipq5018_phy_link_update(struct eth_device *dev)
dp[duplex]);
break;
case FAL_SPEED_100:
priv->speed = MII_PORT_SELECT;
priv->speed = MII_PORT_SELECT | FES_PORT_SPEED;
speed_clock1 = 9;
speed_clock2 = 0;
printf ("eth%d %s Speed :%d %s duplex\n",
@ -399,6 +402,7 @@ static int ipq5018_phy_link_update(struct eth_device *dev)
break;
case FAL_SPEED_2500:
priv->speed = SGMII_PORT_SELECT;
mode = PORT_WRAPPER_SGMII_PLUS;
speed_clock1 = 1;
speed_clock2 = 0;
printf ("eth%d %s Speed :%d %s duplex\n",
@ -418,11 +422,7 @@ static int ipq5018_phy_link_update(struct eth_device *dev)
}
if (priv->mac_unit){
if (priv->phy_type == QCA8081_PHY_TYPE ||
priv->phy_type == QCA8081_1_1_PHY)
ppe_uniphy_mode_set(PORT_WRAPPER_SGMII_PLUS);
else
ppe_uniphy_mode_set(PORT_WRAPPER_SGMII0_RGMII4);
ppe_uniphy_mode_set(mode);
} else {
ipq5018_enable_gephy();
}
@ -727,16 +727,18 @@ int ipq_gmac_init(ipq_gmac_board_cfg_t *gmac_cfg)
}
switch(phy_chip_id) {
#ifdef CONFIG_QCA8081_PHY
/*
* NAPA PHY For GMAC1
*/
case QCA8081_PHY:
case QCA8081_1_1_PHY:
ipq_gmac_macs[i]->phy_type = QCA8081_PHY;
ipq_gmac_macs[i]->phy_type = QCA8081_1_1_PHY;
ipq_qca8081_phy_init(
&ipq_gmac_macs[i]->ops,
ipq_gmac_macs[i]->phy_address);
break;
#endif
/*
* Internel GEPHY only for GMAC0
*/

1
include/configs/ipq5018.h
View file

@ -246,7 +246,6 @@ extern loff_t board_env_size;
*/
#define CONFIG_GEPHY
#define CONFIG_QCA8033_PHY
#define CONFIG_QCA8081_PHY
/*
* USB Support