diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f6aba5406b..2ecb4cdfe2 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -100,7 +100,8 @@ dtb-$(CONFIG_ARCH_IPQ5332) += ipq5332-emulation.dtb \ ipq5332-mi01.7.dtb \ ipq5332-mi03.1.dtb \ ipq5332-db-mi01.1.dtb \ - ipq5332-db-mi02.1.dtb + ipq5332-db-mi02.1.dtb \ + ipq5332-db-mi03.1.dtb dtb-$(CONFIG_ARCH_IPQ6018) += ipq6018-cp01-c1.dtb \ ipq6018-cp02-c1.dtb \ diff --git a/arch/arm/dts/ipq5332-db-mi03.1.dts b/arch/arm/dts/ipq5332-db-mi03.1.dts new file mode 100644 index 0000000000..edf788ea4e --- /dev/null +++ b/arch/arm/dts/ipq5332-db-mi03.1.dts @@ -0,0 +1,211 @@ +/* + * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. + * + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +#include "ipq5332-soc.dtsi" +/ { + machid = <0x1060002>; + config_name = "config@db-mi03.1"; + + aliases { + console = "/serial@78AF000"; + nand = "/nand-controller@79B0000"; + mmc = "/sdhci@7804000"; + usb0 = "/xhci@8a00000"; + pci0 = "/pci@20000000"; + pci1 = "/pci@18000000"; + }; + + serial@78AF000 { + status = "ok"; + serial_gpio { + blsp0_uart_rx { + gpio = <18>; + func = <1>; + pull = ; + drvstr = ; + }; + blsp0_uart_tx { + gpio = <19>; + func = <1>; + drvstr = ; + pull = ; + }; + }; + }; + + spi { + spi_gpio { + blsp0_spi_clk { + gpio = <14>; + func = <1>; + pull = ; + oe = ; + drvstr = ; + }; + blsp0_spi_mosi { + gpio = <15>; + func = <1>; + pull = ; + oe = ; + drvstr = ; + }; + blsp0_spi_miso { + gpio = <16>; + func = <1>; + pull = ; + drvstr = ; + }; + blsp0_spi_cs { + gpio = <17>; + func = <1>; + pull = ; + oe = ; + drvstr = ; + }; + }; + }; + + nand: nand-controller@79B0000 { + nand_gpio { + qspi_dat3 { + gpio = <8>; + func = <2>; + pull = ; + drvstr = ; + }; + qspi_dat2 { + gpio = <9>; + func = <2>; + pull = ; + drvstr = ; + }; + qspi_dat1 { + gpio = <10>; + func = <2>; + pull = ; + drvstr = ; + }; + qspi_dat0 { + gpio = <11>; + func = <2>; + pull = ; + drvstr = ; + }; + qspi_cs_n { + gpio = <12>; + func = <2>; + pull = ; + drvstr = ; + }; + qspi_clk { + gpio = <13>; + func = <2>; + pull = ; + drvstr = ; + }; + }; + }; + + mmc: sdhci@7804000 { + mmc_gpio { + emmc_dat3 { + gpio = <8>; + func = <1>; + pull = ; + drvstr = ; + }; + emmc_dat2 { + gpio = <9>; + func = <1>; + pull = ; + drvstr = ; + }; + emmc_dat1 { + gpio = <10>; + func = <1>; + pull = ; + drvstr = ; + }; + emmc_dat0 { + gpio = <11>; + func = <1>; + pull = ; + drvstr = ; + }; + emmc_cmd{ + gpio = <12>; + func = <1>; + pull = ; + drvstr = ; + }; + emmc_clk{ + gpio = <13>; + func = <1>; + pull = ; + drvstr = ; + }; + }; + }; + + pci0: pci@20000000 { + status = "ok"; + perst_gpio = <38>; + lane = <1>; + pci_gpio { + pci_rst { + gpio = <38>; + pull = ; + oe = ; + }; + }; + }; + + pci1: pci@18000000 { + status = "ok"; + perst_gpio = <47>; + lane = <2>; + pci_gpio { + pci_rst { + gpio = <47>; + pull = ; + oe = ; + }; + }; + }; + + ess-switch { + switch_mac_mode0 = ; + switch_mac_mode1 = ; + aquantia_gpio = <22 24>; + aquantia_gpio_cnt = <2>; + + port_phyinfo { + port@0 { + phy_address = <8>; + phy_type = ; + uniphy_id = <0>; + uniphy_mode = ; + }; + port@1 { + phy_address = <0>; + phy_type = ; + uniphy_id = <1>; + uniphy_mode = ; + }; + }; + }; + +};