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Merge "ipq807x: Removed spi gpio entries from device-tree"

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Linux Build Service Account 2019-11-25 12:37:33 -08:00 • committed by Gerrit - the friendly Code Review server
commit 41a6ccad9e
3 changed files with 66 additions and 46 deletions
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45
arch/arm/dts/ipq807x-soc.dtsi
View file

@ -61,51 +61,6 @@
compatible = "qcom,spi-qup-v2.7.0"; compatible = "qcom,spi-qup-v2.7.0";
wr_pipe_0 = <12>; wr_pipe_0 = <12>;
rd_pipe_0 = <13>; rd_pipe_0 = <13>;
spi_gpio {
gpio1 {
gpio = <38>;
func = <3>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <39>;
func = <3>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <40>;
func = <2>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio4 {
gpio = <41>;
func = <2>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
}; };
nand: nand-controller@79B0000 { nand: nand-controller@79B0000 {

55
board/qca/arm/ipq807x/ipq807x.c
View file

@ -138,6 +138,52 @@ struct dumpinfo_t dumpinfo_s[] = {
}; };
int dump_entries_s = ARRAY_SIZE(dumpinfo_s); int dump_entries_s = ARRAY_SIZE(dumpinfo_s);
gpio_func_data_t spi_nor_gpio[] = {
{
.gpio = 38,
.func = 3,
.pull = 3,
.oe = 0,
.vm = 1,
.od_en = 0,
.pu_res = 2,
},
{
.gpio = 39,
.func = 3,
.pull = 3,
.oe = 0,
.vm = 1,
.od_en = 0,
.pu_res = 2,
},
{
.gpio = 40,
.func = 2,
.pull = 3,
.oe = 0,
.vm = 1,
.od_en = 0,
.pu_res = 2,
},
{
.gpio = 41,
.func = 2,
.pull = 3,
.oe = 0,
.vm = 1,
.od_en = 0,
.pu_res = 2,
},
};
board_ipq807x_param_t gboard_param = {
.spi_nor_cfg = {
.gpio = spi_nor_gpio,
.gpio_count = ARRAY_SIZE(spi_nor_gpio),
},
};
void uart2_configure_mux(void) void uart2_configure_mux(void)
{ {
unsigned long cfg_rcgr; unsigned long cfg_rcgr;
@ -597,6 +643,7 @@ void board_nand_init(void)
{ {
#ifdef CONFIG_QCA_SPI #ifdef CONFIG_QCA_SPI
int gpio_node; int gpio_node;
int i;
#endif #endif
qpic_nand_init(); qpic_nand_init();
@ -605,8 +652,14 @@ void board_nand_init(void)
gpio_node = fdt_path_offset(gd->fdt_blob, "/spi/spi_gpio"); gpio_node = fdt_path_offset(gd->fdt_blob, "/spi/spi_gpio");
if (gpio_node >= 0) { if (gpio_node >= 0) {
qca_gpio_init(gpio_node); qca_gpio_init(gpio_node);
ipq_spi_init(CONFIG_IPQ_SPI_NOR_INFO_IDX); } else {
/* Setting default values */
for (i = 0; i < gboard_param.spi_nor_cfg.gpio_count; i++)
gpio_tlmm_config(&gboard_param.spi_nor_cfg.gpio[i]);
} }
ipq_spi_init(CONFIG_IPQ_SPI_NOR_INFO_IDX);
#endif #endif
} }

12
board/qca/arm/ipq807x/ipq807x.h
View file

@ -17,6 +17,7 @@
#include <configs/ipq807x.h> #include <configs/ipq807x.h>
#include <asm/u-boot.h> #include <asm/u-boot.h>
#include <asm/arch-qca-common/qca_common.h> #include <asm/arch-qca-common/qca_common.h>
#include <asm/arch-qca-common/gpio.h>
/* /*
* GCC-SDCC Registers * GCC-SDCC Registers
@ -305,6 +306,17 @@ extern const char *rsvd_node;
extern const char *del_node[]; extern const char *del_node[];
extern const add_node_t add_fdt_node[]; extern const add_node_t add_fdt_node[];
typedef struct qca_gpio_config gpio_func_data_t;
typedef struct {
gpio_func_data_t *gpio;
unsigned int gpio_count;
}spi_cfg_t;
typedef struct {
spi_cfg_t spi_nor_cfg;
}board_ipq807x_param_t;
void reset_crashdump(void); void reset_crashdump(void);
#ifdef CONFIG_PCI_IPQ #ifdef CONFIG_PCI_IPQ
void board_pci_init(int id); void board_pci_init(int id);