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Merge "fdt_fixup: Added cpr fixup for ipq8074 v2.0"

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Linux Build Service Account 2018-09-20 01:16:38 -07:00 • committed by Gerrit - the friendly Code Review server
commit 3fc81744c3
2 changed files with 123 additions and 0 deletions
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7
board/qca/arm/common/fdt_fixup.c
View file

@ -486,6 +486,12 @@ __weak void fdt_fixup_sd_ldo_gpios_toggle(void *blob)
return;
}
__weak void fdt_fixup_cpr(void *blob)
{
return;
}
/*
* For newer kernel that boot with device tree (3.14+), all of memory is
* described in the /memory node, including areas that the kernel should not be
@ -580,6 +586,7 @@ int ft_board_setup(void *blob, bd_t *bd)
ipq_fdt_fixup_usb_device_mode(blob);
fdt_fixup_auto_restart(blob);
fdt_fixup_sd_ldo_gpios_toggle(blob);
fdt_fixup_cpr(blob);
#ifdef CONFIG_QCA_MMC
board_mmc_deinit();

116
board/qca/arm/ipq807x/ipq807x.c
View file

@ -1049,6 +1049,122 @@ void fdt_fixup_auto_restart(void *blob)
return;
}
#define TCSR_CPR 0x0193d008 /* TCSR_TZ_WONCE_2 */
#define BM(lsb, msb) ((BIT(msb) - BIT(lsb)) + BIT(msb))
void fdt_fixup_cpr(void *blob)
{
uint32_t soc_version, soc_version_major;
int node, subnode, phandle;
int i, ret;
uint64_t opp_hz[] = {1017600000, 1382400000, 1651200000,
1843200000, 1920000000, 2208000000};
uint32_t opp_microvolt[] = {840000, 904000, 944000,
984000, 992000, 1064000};
char *compatible[] = {"qcom,cpr4-ipq807x-apss-regulator",
"qcom,cpr3-ipq807x-npu-regulator",
"qcom,ipq807x-apm"};
uint32_t tcsr_cpr = readl(TCSR_CPR);
tcsr_cpr = (tcsr_cpr >> 8) & BM(0, 1);
if (tcsr_cpr != 1)
return;
node = fdt_path_offset(blob,
"/soc/qcom,spmi@200f000/pmic@1/regulators/s3");
if (node < 0)
return;
phandle = fdt_get_phandle(blob, node);
if (phandle <= 0)
return;
/* Set cpu-supply for all 4 cores */
node = fdt_path_offset(blob, "/cpus");
if (node < 0)
return;
subnode = fdt_first_subnode(blob, node);
if (subnode < 0)
return;
ret = fdt_setprop_cell(blob, subnode, "cpu0-supply", phandle);
if (ret)
return;
for (i = 1; i <= 3; i++) {
subnode = fdt_next_subnode(blob, subnode);
if (subnode < 0)
return;
ret = fdt_setprop_cell(blob, subnode, "cpu-supply", phandle);
if (ret)
return;
}
/* Set operating point */
node = fdt_path_offset(blob, "/cpus/opp_table0");
if (node < 0)
return;
subnode = fdt_first_subnode(blob, node);
if (subnode < 0)
return;
ret = fdt_setprop_cell(blob, subnode,
"opp-microvolt", opp_microvolt[0]);
if (ret)
return;
ret = fdt_setprop_u64(blob, subnode, "opp-hz", opp_hz[0]);
if (ret)
return;
for (i = 1; i < ARRAY_SIZE(opp_microvolt); i++) {
subnode = fdt_next_subnode(blob, subnode);
if (subnode < 0)
return;
ret = fdt_setprop_cell(blob, subnode,
"opp-microvolt", opp_microvolt[i]);
if (ret)
return;
ret = fdt_setprop_u64(blob, subnode, "opp-hz", opp_hz[i]);
if (ret)
return;
}
node = fdt_path_offset(blob,
"/soc/qcom,spmi@200f000/pmic@1/regulators/s4");
if (node < 0)
return;
phandle = fdt_get_phandle(blob, node);
if (phandle <= 0)
return;
node = fdt_path_offset(blob, "/soc/nss@40000000");
if (node < 0)
return;
/* Set npu-supply */
ret = fdt_setprop_cell(blob, node, "npu-supply", phandle);
/* Disable cpr, apu */
for (i = 0; i < ARRAY_SIZE(compatible); i++) {
node = fdt_node_offset_by_compatible(blob, 0, compatible[i]);
if (node < 0)
return;
ret = fdt_setprop_string(blob, node, "status", "disabled");
}
return;
}
void set_flash_secondary_type(qca_smem_flash_info_t *smem)
{
return;