From 3f2b61ee4197861d2b876ffcc1137fc4e3e40501 Mon Sep 17 00:00:00 2001 From: Gokul Sriram Palanisamy Date: Mon, 7 Aug 2017 18:45:47 +0530 Subject: [PATCH] ARM: qca: Updated support for crashdump onto flash Increased context_dump size from 2K to 4K for ipq8074 SoC. Change-Id: I5f10c0f4081c6ebe155599bb2575b1347e1933d1 Signed-off-by: Gokul Sriram Palanisamy --- board/qca/arm/common/cmd_bootqca.c | 5 ++--- include/configs/ipq807x.h | 4 ++-- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/board/qca/arm/common/cmd_bootqca.c b/board/qca/arm/common/cmd_bootqca.c index b91cf4c328..7bb5f7f258 100644 --- a/board/qca/arm/common/cmd_bootqca.c +++ b/board/qca/arm/common/cmd_bootqca.c @@ -743,7 +743,6 @@ U_BOOT_CMD(bootipq, 2, 0, do_bootipq, #define QCA_WDT_SCM_TLV_LEN_SIZE 2 #define QCA_WDT_SCM_TLV_TYPE_LEN_SIZE (QCA_WDT_SCM_TLV_TYPE_SIZE +\ QCA_WDT_SCM_TLV_LEN_SIZE) -#define CRASHDUMP_CPU_CONTEXT_SIZE 2048 #define MAX_NAND_PAGE_SIZE 2048 #define MAX_EMMC_BLK_LEN 1024 @@ -1326,7 +1325,7 @@ static int qca_wdt_write_crashdump_data( } /* Start writing cpu context and uname in flash */ - required_size = CRASHDUMP_CPU_CONTEXT_SIZE + + required_size = CONFIG_CPU_CONTEXT_DUMP_SIZE + crashdump_data->uname_length; ret = crashdump_flash_write_init(crashdump_cnxt, @@ -1338,7 +1337,7 @@ static int qca_wdt_write_crashdump_data( ret = crashdump_flash_write(crashdump_cnxt, crashdump_data->cpu_context, - CRASHDUMP_CPU_CONTEXT_SIZE); + CONFIG_CPU_CONTEXT_DUMP_SIZE); if (!ret) ret = crashdump_flash_write(crashdump_cnxt, diff --git a/include/configs/ipq807x.h b/include/configs/ipq807x.h index 00e8789eec..81acbf5780 100644 --- a/include/configs/ipq807x.h +++ b/include/configs/ipq807x.h @@ -290,8 +290,8 @@ extern loff_t board_env_size; #define IPQ_TEMP_DUMP_ADDR 0x44000000 #endif -#define CONFIG_QCA_KERNEL_CRASHDUMP_ADDRESS 0x08605FFF -#define CONFIG_CPU_CONTEXT_DUMP_SIZE 2048 +#define CONFIG_QCA_KERNEL_CRASHDUMP_ADDRESS *((unsigned int *)0x08600658) +#define CONFIG_CPU_CONTEXT_DUMP_SIZE 4096 #define CONFIG_TLV_DUMP_SIZE 2048 /* L1 cache line size is 64 bytes, L2 cache line size is 128 bytes