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Merge "uboot: drivers: net: Remove cbcr and rcgr configs"

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Linux Build Service Account 2019-05-24 16:34:52 -07:00 • committed by Gerrit - the friendly Code Review server
commit 3bd96bd8ba
1 changed files with 2 additions and 113 deletions
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115
board/qca/arm/ipq6018/ipq6018.c
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@ -1037,122 +1037,11 @@ static void ppe_clk_init(void)
void eth_clock_enable(void)
{
/*
* ethernet clk rcgr block init
*/
ppe_clk_init();
writel(0x100, GCC_NSS_PORT1_RX_CFG_RCGR);
writel(0x1, GCC_NSS_PORT1_RX_CMD_RCGR);
writel(0x2, GCC_NSS_PORT1_RX_CMD_RCGR);
writel(0x100, GCC_NSS_PORT1_TX_CFG_RCGR);
writel(0x1, GCC_NSS_PORT1_TX_CMD_RCGR);
writel(0x2, GCC_NSS_PORT1_TX_CMD_RCGR);
writel(0x100, GCC_NSS_PORT2_RX_CFG_RCGR);
writel(0x1, GCC_NSS_PORT2_RX_CMD_RCGR);
writel(0x2, GCC_NSS_PORT2_RX_CMD_RCGR);
writel(0x100, GCC_NSS_PORT2_TX_CFG_RCGR);
writel(0x1, GCC_NSS_PORT2_TX_CMD_RCGR);
writel(0x2, GCC_NSS_PORT2_TX_CMD_RCGR);
writel(0x100, GCC_NSS_PORT3_RX_CFG_RCGR);
writel(0x1, GCC_NSS_PORT3_RX_CMD_RCGR);
writel(0x2, GCC_NSS_PORT3_RX_CMD_RCGR);
writel(0x100, GCC_NSS_PORT3_TX_CFG_RCGR);
writel(0x1, GCC_NSS_PORT3_TX_CMD_RCGR);
writel(0x2, GCC_NSS_PORT3_TX_CMD_RCGR);
writel(0x100, GCC_NSS_PORT4_RX_CFG_RCGR);
writel(0x1, GCC_NSS_PORT4_RX_CMD_RCGR);
writel(0x2, GCC_NSS_PORT4_RX_CMD_RCGR);
writel(0x100, GCC_NSS_PORT4_TX_CFG_RCGR);
writel(0x1, GCC_NSS_PORT4_TX_CMD_RCGR);
writel(0x2, GCC_NSS_PORT4_TX_CMD_RCGR);
writel(0x100, GCC_NSS_PORT5_RX_CFG_RCGR);
writel(0x1, GCC_NSS_PORT5_RX_CMD_RCGR);
writel(0x2, GCC_NSS_PORT5_RX_CMD_RCGR);
writel(0x100, GCC_NSS_PORT5_TX_CFG_RCGR);
writel(0x1, GCC_NSS_PORT5_TX_CMD_RCGR);
writel(0x2, GCC_NSS_PORT5_TX_CMD_RCGR);
writel(0x103, GCC_NSS_PPE_CFG_RCGR);
writel(0x1, GCC_NSS_PPE_CMD_RCGR);
writel(0x2, GCC_NSS_PPE_CMD_RCGR);
writel(0x103, GCC_NSS_CRYPTO_CFG_RCGR);
writel(0x1, GCC_NSS_CRYPTO_CMD_RCGR);
writel(0x2, GCC_NSS_CRYPTO_CMD_RCGR);
writel(0x105, GCC_SNOC_NSSNOC_BFDCD_CFG_RCGR);
writel(0x1, GCC_SNOC_NSSNOC_BFDCD_CMD_RCGR);
writel(0x2, GCC_SNOC_NSSNOC_BFDCD_CMD_RCGR);
writel(0x109, GCC_QDSS_AT_CFG_RCGR);
writel(0x1, GCC_QDSS_AT_CMD_RCGR);
writel(0x2, GCC_QDSS_AT_CMD_RCGR);
writel(0x107, GCC_NSS_CE_CFG_RCGR);
writel(0x1, GCC_NSS_CE_CMD_RCGR);
writel(0x2, GCC_NSS_CE_CMD_RCGR);
writel(0x10F, GCC_PCNOC_BFDCD_CFG_RCGR);
writel(0x1, GCC_PCNOC_BFDCD_CMD_RCGR);
writel(0x2, GCC_PCNOC_BFDCD_CMD_RCGR);
/*
* ethernet clk cbcr block init
/* RCGR and CBCR regs will be
* config by SBL. It will later be moved to u-boot.
*/
writel(CLK_TOGGLE_ENABLE, GCC_NSS_PORT1_RX_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_PORT1_TX_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_PORT2_RX_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_PORT2_TX_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_PORT3_RX_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_PORT3_TX_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_PORT4_RX_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_PORT4_TX_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_PORT5_RX_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_PORT5_TX_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_PPE_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_PPE_CFG_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_EDMA_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_EDMA_CFG_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_PTP_REF_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSSNOC_PPE_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSSNOC_PPE_CFG_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_CRYPTO_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSSNOC_SNOC_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_SNOC_NSSNOC_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_NOC_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSSNOC_ATB_CBCR);
/*
* GCC_XO_CLK_SRC RCGR Regs will be config by HW
*/
writel(CLK_TOGGLE_ENABLE, GCC_NSSNOC_QOSGEN_REF_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSSNOC_TIMEOUT_REF_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_CE_AXI_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_CE_APB_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSSNOC_CE_AXI_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSSNOC_CE_APB_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSSNOC_UBI0_AHB_CBCR);
writel(CLK_TOGGLE_ENABLE, GCC_NSS_CFG_CBCR);
/*
* Take NSS PPE out of reset