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dts: arm: ipq9574: Add BLSP3 I2C support

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This changes add BLSP3 I2C and remove BLSP5 I2C.

Change-Id: I532da3733a170e78aaaeb4aba8faf1770cdfa97b
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
This commit is contained in:
Vandhiadevan Karunamoorthy 2021-08-23 22:22:39 +05:30 • committed by Gerrit - the friendly Code Review server
parent 41ad17daf4
commit 3b56bd8af1
5 changed files with 48 additions and 25 deletions
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1
arch/arm/dts/ipq9574-al01-c1.dts
View file

@ -22,6 +22,7 @@
uart2 = "/serial@78B2000"; uart2 = "/serial@78B2000";
usb0 = "/xhci@8a00000"; usb0 = "/xhci@8a00000";
nand = "/nand-controller@79B0000"; nand = "/nand-controller@79B0000";
i2c0 = "/i2c@78B8000";
}; };
console: serial@78B1000 { console: serial@78B1000 {

22
arch/arm/dts/ipq9574-al02-c1.dts
View file

@ -22,7 +22,7 @@
uart2 = "/serial@78B2000"; uart2 = "/serial@78B2000";
usb0 = "/xhci@8a00000"; usb0 = "/xhci@8a00000";
nand = "/nand-controller@79B0000"; nand = "/nand-controller@79B0000";
i2c0 = "/i2c@78BA000"; i2c0 = "/i2c@78B8000";
}; };
console: serial@78B1000 { console: serial@78B1000 {
@ -124,26 +124,6 @@
}; };
}; };
i2c0: i2c@78BA000 {
i2c_gpio {
gpio1 {
gpio = <48>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <49>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
};
};
pci0: pci@20000000 { pci0: pci@20000000 {
status = "ok"; status = "ok";
perst_gpio = <29>; perst_gpio = <29>;

2
arch/arm/dts/ipq9574-db-al01-c1.dts
View file

@ -22,7 +22,7 @@
uart2 = "/serial@78B2000"; uart2 = "/serial@78B2000";
usb0 = "/xhci@8a00000"; usb0 = "/xhci@8a00000";
nand = "/nand-controller@79B0000"; nand = "/nand-controller@79B0000";
i2c0 = "/i2c@78BA000"; i2c0 = "/i2c@78B8000";
}; };
console: serial@78B1000 { console: serial@78B1000 {

2
arch/arm/dts/ipq9574-db-al02-c1.dts
View file

@ -26,7 +26,7 @@
pci3 = "/pci@10000000"; pci3 = "/pci@10000000";
usb0 = "/xhci@8a00000"; usb0 = "/xhci@8a00000";
nand = "/nand-controller@79B0000"; nand = "/nand-controller@79B0000";
i2c0 = "/i2c@78BA000"; i2c0 = "/i2c@78B8000";
}; };
console: serial@78B1000 { console: serial@78B1000 {

46
arch/arm/dts/ipq9574-soc.dtsi
View file

@ -93,12 +93,54 @@
}; };
}; };
i2c0: i2c@78BA000 { i2c@78BA000 {
compatible = "qcom,qup-i2c"; compatible = "qcom,qup-i2c";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0x78BA000 0x600>; reg = <0x78BA000 0x600>;
clock-frequency = <400000>; clock-frequency = <400000>;
i2c_gpio {
gpio1 {
gpio = <48>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <49>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
};
};
i2c@78B8000 {
compatible = "qcom,qup-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x78B8000 0x600>;
clock-frequency = <400000>;
i2c_gpio {
gpio1 {
gpio = <15>;
func = <2>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <16>;
func = <2>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_8MA>;
oe = <GPIO_OE_ENABLE>;
};
};
}; };
nand: nand-controller@79B0000 { nand: nand-controller@79B0000 {