From 3090c325b14791f5076f10adb00621c4efd296f4 Mon Sep 17 00:00:00 2001 From: Kavin A Date: Thu, 28 Oct 2021 15:52:58 +0530 Subject: [PATCH] configs: ipq9574: Update TLV buffer offset In IPQ9574, TZ adds base addr + 300K(TMEL ctxt size) and stores this addr in imem. Updated TLV_BUF_OFFSET to subtract TMEL offset from base addr. Change-Id: I54ea5be4133f2c0435ecaabff392b20c67ec5d48 Signed-off-by: Kavin A --- include/configs/ipq9574.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/include/configs/ipq9574.h b/include/configs/ipq9574.h index 7d009edf69..d76e255ca3 100644 --- a/include/configs/ipq9574.h +++ b/include/configs/ipq9574.h @@ -331,7 +331,14 @@ extern loff_t board_env_size; #define CONFIG_QCA_KERNEL_CRASHDUMP_ADDRESS *((unsigned int *)0x08600658) #define CONFIG_CPU_CONTEXT_DUMP_SIZE 4096 -#define TLV_BUF_OFFSET 500 * 1024 +/* TZ generally stores the base address allocated by ctx-save driver + * in the imem location 0x08600658. In IPQ9574, the first 300K is used + * for TMEL ctxt. TZ stores the base address + 300K in the imem. + * In the minidump path, TLV_BUF_OFFSET is added to base addr. + * So update TLV_BUF_OFFSET to subtract 300K from the base. + */ +#define TME_CTXT_SIZE 300 * 1024 +#define TLV_BUF_OFFSET (500 * 1024) - TME_CTXT_SIZE #define CONFIG_TLV_DUMP_SIZE 12 * 1024 /* L1 cache line size is 64 bytes, L2 cache line size is 128 bytes