From 2fd64e390c4e18112bc0726770fc703a75d7f043 Mon Sep 17 00:00:00 2001
From: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
Date: Tue, 26 Apr 2022 21:23:27 +0530
Subject: [PATCH] arm: dts: ipq9574:Add config for i2c all at BLSP1

Change-Id: Ia05615633737eda3c27c376963d4a92ccb945234
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
---
 arch/arm/dts/ipq9574-soc.dtsi | 50 +++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm/dts/ipq9574-soc.dtsi b/arch/arm/dts/ipq9574-soc.dtsi
index 3fcc24a912..abc69e34e3 100644
--- a/arch/arm/dts/ipq9574-soc.dtsi
+++ b/arch/arm/dts/ipq9574-soc.dtsi
@@ -178,6 +178,56 @@
 		};
 	};
 
+	i2c@78B7000 {
+		compatible = "qcom,qup-i2c";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x78B7000 0x600>;
+		clock-frequency  = <400000>;
+		i2c_gpio {
+			gpio1 {
+				gpio = <34>;
+				func = <2>;
+				pull = <GPIO_NO_PULL>;
+				drvstr = <GPIO_8MA>;
+				oe = <GPIO_OE_ENABLE>;
+			};
+
+			gpio2 {
+				gpio = <35>;
+				func = <2>;
+				pull = <GPIO_NO_PULL>;
+				drvstr = <GPIO_8MA>;
+				oe = <GPIO_OE_ENABLE>;
+			};
+		};
+	};
+
+	i2c@78B6000 {
+		compatible = "qcom,qup-i2c";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x78B6000 0x600>;
+		clock-frequency  = <400000>;
+		i2c_gpio {
+			gpio1 {
+				gpio = <36>;
+				func = <2>;
+				pull = <GPIO_NO_PULL>;
+				drvstr = <GPIO_8MA>;
+				oe = <GPIO_OE_ENABLE>;
+			};
+
+			gpio2 {
+				gpio = <37>;
+				func = <2>;
+				pull = <GPIO_NO_PULL>;
+				drvstr = <GPIO_8MA>;
+				oe = <GPIO_OE_ENABLE>;
+			};
+		};
+	};
+
 	nand: nand-controller@79B0000 {
 		#address-cells = <1>;
 		#size-cells = <0>;