From 2be258bb0070353f0963520f979ae81b5bce67e5 Mon Sep 17 00:00:00 2001 From: Abhishek Sahu Date: Thu, 26 Apr 2018 11:40:53 +0530 Subject: [PATCH] mtd: nand: qcom: use ECC according chip spare bytes for non ONFI The ONFI NAND device specifies the required ECC correction in its param page but for non ONFI device, we don't have such info. The QPIC NAND contoller can use 8 bit ECC if the chip has required number of spare bytes. This patch calculates the minimum required spare bytes for using 8 bit ECC and select the same, if non ONFI device has required number of spare bytes otherwise 4 bit ECC will be used. Change-Id: If7c718f4288eee16857171335897e3209a05fd0b Signed-off-by: Abhishek Sahu --- arch/arm/include/asm/arch-qca-common/qpic_nand.h | 4 +++- drivers/mtd/nand/qpic_nand.c | 10 +++++++++- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-qca-common/qpic_nand.h b/arch/arm/include/asm/arch-qca-common/qpic_nand.h index 41f9fbc368..44fa0ae75b 100644 --- a/arch/arm/include/asm/arch-qca-common/qpic_nand.h +++ b/arch/arm/include/asm/arch-qca-common/qpic_nand.h @@ -211,10 +211,12 @@ #define NAND_CW_SIZE_4_BIT_ECC 528 #define NAND_CW_SIZE_8_BIT_ECC 532 - /* Indicates the data bytes in the user data portion of the code word. */ #define USER_DATA_BYTES_PER_CW 512 +#define NAND_CW_SPARE_SIZE_8_BIT_ECC (NAND_CW_SIZE_8_BIT_ECC - \ + USER_DATA_BYTES_PER_CW) + /* Indicates the number of bytes covered by BCH ECC logic when * a codeword is written to a NAND flash device. * This is also the number of bytes that are part of the image in CW. diff --git a/drivers/mtd/nand/qpic_nand.c b/drivers/mtd/nand/qpic_nand.c index e93eec418f..ab7268d21b 100644 --- a/drivers/mtd/nand/qpic_nand.c +++ b/drivers/mtd/nand/qpic_nand.c @@ -1454,6 +1454,7 @@ static int qpic_nand_get_info(struct mtd_info *mtd, uint32_t flash_id) const struct nand_manufacturers *flash_man; const struct nand_flash_dev *flash_dev; struct qpic_nand_dev *dev = MTD_QPIC_NAND_DEV(mtd); + uint32_t min_oobsize_8bit_ecc; man_id = NAND_ID_MAN(flash_id); dev_id = NAND_ID_DEV(flash_id); @@ -1483,7 +1484,14 @@ static int qpic_nand_get_info(struct mtd_info *mtd, uint32_t flash_id) else qpic_nand_get_info_flash_dev(mtd, flash_dev); - mtd->ecc_strength = 4; + min_oobsize_8bit_ecc = + (mtd->writesize / CHUNK_SIZE) * NAND_CW_SPARE_SIZE_8_BIT_ECC; + + /* + * Calculate the minimum required oobsize for using 8 bit ecc and use + * 8 bit ecc if this chip oobsize equal or more than that. + */ + mtd->ecc_strength = mtd->oobsize >= min_oobsize_8bit_ecc ? 8 : 4; dev->num_blocks = mtd->size; dev->num_blocks /= (dev->block_size);