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imx: mx7ulp: Fix SPLL/APLL clock rate calculation issue

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The num/denom is a float value, but in the calculation it is convert
to integer 0, and wrong result.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Ye Li 2017-04-05 10:36:58 +08:00 • committed by Stefano Babic
parent b69999efd8
commit 2018ef868c
1 changed files with 6 additions and 2 deletions
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8
arch/arm/cpu/armv7/mx7ulp/scg.c
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@ -504,7 +504,9 @@ u32 decode_pll(enum pll_clocks pll)
num = readl(&scg1_regs->spllnum);
denom = readl(&scg1_regs->splldenom);
return (infreq / pre_div) * (mult + num / denom);
infreq = infreq / pre_div;
return infreq * mult + infreq * num / denom;
case PLL_A7_APLL:
reg = readl(&scg1_regs->apllcsr);
@ -531,7 +533,9 @@ u32 decode_pll(enum pll_clocks pll)
num = readl(&scg1_regs->apllnum);
denom = readl(&scg1_regs->aplldenom);
return (infreq / pre_div) * (mult + num / denom);
infreq = infreq / pre_div;
return infreq * mult + infreq * num / denom;
case PLL_USB:
reg = readl(&scg1_regs->upllcsr);