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Merge "ipq40xx: Adding support to DK06 board"

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Linux Build Service Account 2018-01-22 23:57:29 -08:00 • committed by Gerrit - the friendly Code Review server
commit 1d3e4eb8bc
6 changed files with 344 additions and 60 deletions
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4
arch/arm/dts/Makefile
View file

@ -46,7 +46,9 @@ dtb-$(CONFIG_ARCH_IPQ40xx) += ipq40xx-dk01-c1.dtb \
ipq40xx-dk04-c5.dtb \
ipq40xx-dk07-c1.dtb \
ipq40xx-dk07-c2.dtb \
ipq40xx-dk07-c3.dtb
ipq40xx-dk07-c3.dtb \
ipq40xx-dk01-s1.dtb \
ipq40xx-dk06-c1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-firefly.dtb \

22
arch/arm/dts/ipq40xx-dk01-c1.dts
View file

@ -20,28 +20,6 @@
ess-switch@c000000{
sw_gpio {
gpio1 {
gpio = <52>;
func = <2>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <53>;
func = <2>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <59>;
func = <0>;

37
arch/arm/dts/ipq40xx-dk01-c2.dts
View file

@ -19,43 +19,6 @@
spi_nand_available = <1>;
config_name = "config@ap.dk01.1-c2";
ess-switch@c000000{
sw_gpio {
gpio1 {
gpio = <52>;
func = <2>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <53>;
func = <2>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <62>;
func = <0>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_ENABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
spi {
spi0 {
cs1 {

20
arch/arm/dts/ipq40xx-dk01-s1.dts Normal file
View file

@ -0,0 +1,20 @@
/*
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq40xx-dk01.dtsi"
/ {
machid = <0x8010200>;
ddr_size = <128>;
config_name = "config@ap.dk01.1-c3";
};

37
arch/arm/dts/ipq40xx-dk01.dtsi
View file

@ -46,6 +46,43 @@
status = "ok";
};
ess-switch@c000000{
sw_gpio {
gpio1 {
gpio = <52>;
func = <2>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <53>;
func = <2>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <62>;
func = <0>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_ENABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
edma_cfg {
unit = <0>;
/* Based on the enum for PSGMII phy interface from include/phy.h */

284
arch/arm/dts/ipq40xx-dk06-c1.dts Normal file
View file

@ -0,0 +1,284 @@
/*
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "ipq40xx-soc.dtsi"
#include <dt-bindings/qcom/gpio-ipq40xx.h>
#include "nand_gpio.dtsi"
/ {
model ="QCA, IPQ40xx-DK06";
compatible = "qca,ipq40xx", "qca,ipq40xx-dk06";
machid = <0x8010005>;
ddr_size = <256>;
config_name = "config@ap.dk06.1-c1";
aliases {
console = "/serial@78af000";
xhci0 = "/xhci@8a00000";
xhci1 = "/xhci@6000000";
};
serial@78af000 {
serial_gpio {
gpio1 {
gpio = <16>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
oe = <GPIO_OE_ENABLE>;
};
gpio2 {
gpio = <17>;
func = <1>;
pull = <GPIO_NO_PULL>;
oe = <GPIO_OE_ENABLE>;
};
};
};
nand@79B0000 {
status = "ok";
nand_gpio {
gpio18 {
gpio = <61>;
func = <1>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
spi {
status = "ok";
spi_gpio {
gpio1 {
gpio = <12>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <13>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <14>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio4 {
gpio = <15>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
sdhci@7824000 {
mmc_gpio {
gpio1 {
gpio = <23>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <24>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <25>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio4 {
gpio = <26>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio5 {
gpio = <27>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_16MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio6 {
gpio = <28>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio7 {
gpio = <29>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio8 {
gpio = <30>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio9 {
gpio = <31>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio10 {
gpio = <32>;
func = <1>;
pull = <GPIO_NO_PULL>;
drvstr = <GPIO_10MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
edma_cfg {
unit = <0>;
/* Based on the enum for PSGMII phy interface from include/phy.h */
phy = <13>;
phy_name = "IPQ MDIO0";
};
ess-switch@c000000{
sw_gpio {
gpio1 {
gpio = <6>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio2 {
gpio = <7>;
func = <1>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio3 {
gpio = <19>;
func = <0>;
pull = <GPIO_PULL_DOWN>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_ENABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
gpio4 {
gpio = <52>;
func = <0>;
pull = <GPIO_PULL_UP>;
drvstr = <GPIO_2MA>;
oe = <GPIO_OE_DISABLE>;
vm = <GPIO_VM_ENABLE>;
od_en = <GPIO_OD_DISABLE>;
pu_res = <GPIO_PULL_RES2>;
};
};
};
};