mirror/u-boot-2016
1
0
Fork 0
mirror of https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git synced 2026-03-14 21:10:27 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions

ipq807x: add ethernet rcgr clk init block

Browse source 
Change-Id: Iab6b1e948c705088e273bf815cc844fb447b392c
Signed-off-by: Jaiganesh Narayanan <njaigane@codeaurora.org>
This commit is contained in:
Jaiganesh Narayanan 2017-05-29 22:14:47 +05:30 • committed by Gerrit - the friendly Code Review server
parent 407ceaf726
commit 1d3ca38f62
1 changed files with 53 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

53
board/qca/arm/ipq807x/ipq807x.c
View file

@ -135,6 +135,59 @@ int board_eth_init(bd_t *bis)
ipq807x_register_switch(ipq_qca8075_phy_init);
/*
* ethernet clk rcgr block init -- start
* these clk init will be moved to sbl later
*/
writel(0x100 ,0x01868024);
writel(0x1 ,0x01868020);
writel(0x2 ,0x01868020);
writel(0x100 ,0x0186802C);
writel(0x1 ,0x01868028);
writel(0x2 ,0x01868028);
writel(0x100 ,0x01868034);
writel(0x1 ,0x01868030);
writel(0x2 ,0x01868030);
writel(0x100 ,0x0186803C);
writel(0x1 ,0x01868038);
writel(0x2 ,0x01868038);
writel(0x100 ,0x01868044);
writel(0x1 ,0x01868040);
writel(0x2 ,0x01868040);
writel(0x100 ,0x0186804C);
writel(0x1 ,0x01868048);
writel(0x2 ,0x01868048);
writel(0x100 ,0x01868054);
writel(0x1 ,0x01868050);
writel(0x2 ,0x01868050);
writel(0x100 ,0x0186805C);
writel(0x1 ,0x01868058);
writel(0x2 ,0x01868058);
writel(0x300 ,0x01868064);
writel(0x1 ,0x01868060);
writel(0x2 ,0x01868060);
writel(0x300 ,0x0186806C);
writel(0x1 ,0x01868068);
writel(0x2 ,0x01868068);
writel(0x100 ,0x01868074);
writel(0x1 ,0x01868070);
writel(0x2 ,0x01868070);
writel(0x100 ,0x0186807C);
writel(0x1 ,0x01868078);
writel(0x2 ,0x01868078);
writel(0x101 ,0x01868084);
writel(0x1 ,0x01868080);
writel(0x2 ,0x01868080);
writel(0x100 ,0x0186808C);
writel(0x1 ,0x01868088);
writel(0x2 ,0x01868088);
/*
* ethernet clk rcgr block init -- end
* these clk init will be moved to sbl later
*/
/* bring phy out of reset */
writel(0x203, tlmm_base);
writel(0, tlmm_base + 0x4);