drivers: net: ipq6018: Update XPCS reset

This patch updates the XPCS reset function. It
makes sure only the 2nd bit is modified and not the
entire register. Only 2nd bit needs to be toggled
for XPCS assert and deassert.

Change-Id: I7d11674f253d9b55825d1b285572e824ca218b95
Signed-off-by: speriaka <speriaka@codeaurora.org>
This commit is contained in:
speriaka 2019-07-29 12:40:17 +05:30 committed by Gerrit - the friendly Code Review server
parent 97685862ea
commit 1cb6f11406
2 changed files with 4 additions and 3 deletions

View file

@ -77,10 +77,12 @@ static void ppe_gcc_uniphy_xpcs_reset(uint32_t uniphy_index, bool enable)
{
uint32_t reg_value;
reg_value = readl(GCC_UNIPHY0_MISC + (uniphy_index * GCC_UNIPHY_REG_INC));
if(enable)
reg_value = GCC_UNIPHY_USXGMII_XPCS_RESET;
reg_value |= GCC_UNIPHY_USXGMII_XPCS_RESET;
else
reg_value = GCC_UNIPHY_USXGMII_XPCS_RELEASE_RESET;
reg_value &= ~GCC_UNIPHY_USXGMII_XPCS_RESET;
writel(reg_value, GCC_UNIPHY0_MISC + (uniphy_index * GCC_UNIPHY_REG_INC));
}

View file

@ -27,7 +27,6 @@
#define GCC_UNIPHY0_MISC 0x01856004
#define GCC_UNIPHY_REG_INC 0x100
#define GCC_UNIPHY_USXGMII_XPCS_RESET 0x4
#define GCC_UNIPHY_USXGMII_XPCS_RELEASE_RESET 0x0
#define PPE_UNIPHY_OFFSET_CALIB_4 0x1E0
#define UNIPHY_CALIBRATION_DONE 0x1