From d11ded2ea44be8900c8f718a2d6b9460622b2d30 Mon Sep 17 00:00:00 2001 From: Rajkumar Ayyasamy Date: Thu, 24 Jun 2021 15:38:21 +0530 Subject: [PATCH 1/2] drivers: qpic_nand: add support for Macronix spi nand This change will add support for 4K Macronix spi nand "MX35UF4GE4AD-Z4I" Signed-off-by: Md Sadre Alam Signed-off-by: Rajkumar Ayyasamy Change-Id: I94e07d9e25de46c67fcb679ef149990e093afc8f --- drivers/mtd/nand/qpic_nand.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/mtd/nand/qpic_nand.c b/drivers/mtd/nand/qpic_nand.c index 61b65abcd3..402b8a7dbe 100644 --- a/drivers/mtd/nand/qpic_nand.c +++ b/drivers/mtd/nand/qpic_nand.c @@ -274,6 +274,23 @@ static struct qpic_serial_nand_params qpic_serial_nand_tbl[] = { .check_quad_config = true, .name = "GD5F2GQ5REYIG", }, + { + .id = { 0xc2, 0xb7 }, + .page_size = 4096, + .erase_blk_size = 0x00040000, + .pgs_per_blk = 64, + .no_of_blocks = 2048, + .spare_size = 160, + .density = 0x20000000, + .otp_region = 0x2000, + .no_of_addr_cycle = 0x3, + .num_bits_ecc_correctability = 8, + .timing_mode_support = 0, + .quad_mode = true, + .check_quad_config = true, + .name = "MX35UF4GE4AD-Z4I", + }, + }; struct qpic_serial_nand_params *serial_params; #define MICRON_DEVICE_ID 0x152c152c From 081123e558d8c0ef1cd93c3476977fe200574262 Mon Sep 17 00:00:00 2001 From: Rajkumar Ayyasamy Date: Thu, 24 Jun 2021 15:43:43 +0530 Subject: [PATCH 2/2] qpic_nand: fix bam data FIFO size Updated the data FIFO size to work with 4K page as well. Signed-off-by: Rajkumar Ayyasamy Change-Id: I5d94e50755b0934d1dd6c9c0d2c6759a782f52d5 --- arch/arm/include/asm/arch-qca-common/qpic_nand.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-qca-common/qpic_nand.h b/arch/arm/include/asm/arch-qca-common/qpic_nand.h index 5a5c7b2d7b..215f2bd7db 100644 --- a/arch/arm/include/asm/arch-qca-common/qpic_nand.h +++ b/arch/arm/include/asm/arch-qca-common/qpic_nand.h @@ -542,8 +542,13 @@ #define MTD_NAND_CHIP(mtd) ((struct nand_chip *)((mtd)->priv)) #define MTD_QPIC_NAND_DEV(mtd) (MTD_NAND_CHIP(mtd)->priv) +#define DATA_DESC_PER_CW_FOR_MULTIPAGE 2 +/* 2K page wiil have 4 CWs abd 4K will have 8 CWs*/ +#define MAX_NO_OF_CWS 8 + #ifdef CONFIG_PAGE_SCOPE_MULTI_PAGE_READ -#define QPIC_BAM_DATA_FIFO_SIZE 512 +#define QPIC_BAM_DATA_FIFO_SIZE MAX_MULTI_PAGE * MAX_NO_OF_CWS * \ + DATA_DESC_PER_CW_FOR_MULTIPAGE #define QPIC_BAM_CMD_FIFO_SIZE 128 #define QPIC_BAM_STATUS_FIFO_SIZE 512 #else