From 136a1cd10633dde22fe64b85f5c92e3b3eba9505 Mon Sep 17 00:00:00 2001 From: Abhishek Sahu Date: Tue, 7 Nov 2017 13:07:59 +0530 Subject: [PATCH] mtd: nand: qcom: init mtd ecc strength and bitflip_threshold 1. ecc strength can be assigned in mtd structure itself so remove the ecc_width from qpic nand dev structure 2. Initialize bitflip_threshold with 3*4 of ecc strength so that MTD layer will return EUCLEAN if number of ecc correction are more than bitflip_threshold. Change-Id: Ieafd1957b89a05f9dd0fdfe829712d8891bd6a48 Signed-off-by: Abhishek Sahu --- arch/arm/include/asm/arch-qca-common/qpic_nand.h | 7 ------- drivers/mtd/nand/qpic_nand.c | 9 +++++---- 2 files changed, 5 insertions(+), 11 deletions(-) diff --git a/arch/arm/include/asm/arch-qca-common/qpic_nand.h b/arch/arm/include/asm/arch-qca-common/qpic_nand.h index 231c9fa381..ef12180023 100644 --- a/arch/arm/include/asm/arch-qca-common/qpic_nand.h +++ b/arch/arm/include/asm/arch-qca-common/qpic_nand.h @@ -404,12 +404,6 @@ struct qpic_nand_init_config struct qpic_nand_bam_pipes pipes; }; -enum nand_ecc_width -{ - NAND_WITH_4_BIT_ECC, - NAND_WITH_8_BIT_ECC, -}; - struct qpic_nand_dev { unsigned id; unsigned type; @@ -419,7 +413,6 @@ struct qpic_nand_dev { unsigned block_size; unsigned spare_size; unsigned num_blocks; - enum nand_ecc_width ecc_width; unsigned num_pages_per_blk; unsigned num_pages_per_blk_mask; unsigned widebus; diff --git a/drivers/mtd/nand/qpic_nand.c b/drivers/mtd/nand/qpic_nand.c index 985ab83a49..8d0dc10447 100644 --- a/drivers/mtd/nand/qpic_nand.c +++ b/drivers/mtd/nand/qpic_nand.c @@ -599,9 +599,9 @@ qpic_nand_onfi_save_params(struct mtd_info *mtd, dev->timing_mode_support = param_page->timing_mode_support; if (ecc_bits >= 8) - dev->ecc_width = NAND_WITH_8_BIT_ECC; + mtd->ecc_strength = 8; else - dev->ecc_width = NAND_WITH_4_BIT_ECC; + mtd->ecc_strength = 4; onfi_save_params_err: return onfi_ret; @@ -626,7 +626,7 @@ qpic_nand_save_config(struct mtd_info *mtd) /* Codeword Size = UD_SIZE_BYTES + ECC_PARITY_SIZE_BYTES * + SPARE_SIZE_BYTES + Bad Block size */ - if (dev->ecc_width & NAND_WITH_8_BIT_ECC) { + if (mtd->ecc_strength == 8) { dev->cw_size = NAND_CW_SIZE_8_BIT_ECC; /* Use 8-bit ecc */ dev->ecc_bch_cfg |= (1 << NAND_DEV0_ECC_MODE_SHIFT); @@ -1448,7 +1448,7 @@ static int qpic_nand_get_info(struct mtd_info *mtd, uint32_t flash_id) else qpic_nand_get_info_flash_dev(mtd, flash_dev); - dev->ecc_width = NAND_WITH_4_BIT_ECC; + mtd->ecc_strength = 4; dev->num_blocks = mtd->size; dev->num_blocks /= (dev->block_size); @@ -2247,6 +2247,7 @@ qpic_nand_mtd_params(struct mtd_info *mtd) mtd->_sync = qpic_nand_sync; mtd->ecclayout = NULL; + mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4); chip->page_shift = ffs(mtd->writesize) - 1; chip->phys_erase_shift = ffs(mtd->erasesize) - 1;