mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2025-12-10 07:44:53 +01:00
ipq5018: bt: Toggle ECO bit in start/stop sequence
Add support for ECO bit toggle during IPC start/stop messages to allow BT subsystem to do self reset Change-Id: I4d1d31a43ea8a002eb91cc42300677339c117d71 Signed-off-by: Rajkumar Ayyasamy <quic_arajkuma@quicinc.com>
This commit is contained in:
parent
308f007e14
commit
11a742f785
4 changed files with 49 additions and 0 deletions
|
|
@ -693,6 +693,37 @@ int qti_pas_and_auth_reset(u32 peripheral)
|
|||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int qti_scm_toggle_bt_eco_bit(u32 peripheral, u32 reg_val)
|
||||
{
|
||||
int ret;
|
||||
|
||||
if (is_scm_armv8())
|
||||
{
|
||||
struct qca_scm_desc desc = {0};
|
||||
|
||||
desc.arginfo = QCA_SCM_ARGS(2);
|
||||
desc.args[0] = peripheral;
|
||||
desc.args[1] = reg_val;
|
||||
|
||||
ret = scm_call_64(SCM_SVC_BT_ECO_BIT,
|
||||
SCM_BT_ECO_BIT_TOGGLE_CMD, &desc);
|
||||
}
|
||||
else
|
||||
{
|
||||
struct {
|
||||
u32 proc;
|
||||
u32 val;
|
||||
} request;
|
||||
request.proc = peripheral;
|
||||
request.val = reg_val;
|
||||
ret = scm_call(SCM_SVC_BT_ECO_BIT, SCM_BT_ECO_BIT_TOGGLE_CMD,
|
||||
&request, sizeof(request), NULL, 0);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -40,6 +40,8 @@
|
|||
#define SCM_PAS_INIT_IMAGE_CMD 0x1
|
||||
#define SCM_PAS_AUTH_AND_RESET_CMD 0x5
|
||||
#define SCM_CMD_OTP 0x15
|
||||
#define SCM_SVC_BT_ECO_BIT 0x2
|
||||
#define SCM_BT_ECO_BIT_TOGGLE_CMD 0x21
|
||||
#endif
|
||||
|
||||
/* scm_v8 */
|
||||
|
|
@ -145,6 +147,7 @@ int qca_scm(u32 svc_id, u32 cmd_id, u32 ownr_id, u32 *addr, u32 len);
|
|||
int qti_scm_otp(u32 peripheral);
|
||||
int qti_scm_pas_init_image(u32 peripheral, u32 addr);
|
||||
int qti_pas_and_auth_reset(u32 peripheral);
|
||||
int qti_scm_toggle_bt_eco_bit(u32 peripheral, u32 reg_val);
|
||||
#endif
|
||||
#define MAX_QCA_SCM_RETS 3
|
||||
#define MAX_QCA_SCM_ARGS 10
|
||||
|
|
|
|||
|
|
@ -24,6 +24,9 @@
|
|||
#define IOCTL_IPC_BOOT 0xBE
|
||||
#define IPC_TX_QSIZE 0x20
|
||||
|
||||
#define BT_ECO_BIT_SET 0x4
|
||||
#define BT_ECO_BIT_RESET 0x0
|
||||
|
||||
#define TO_APPS_ADDR(a) (btmem->virt + (int)(uintptr_t)a)
|
||||
#define TO_BT_ADDR(a) (a - btmem->virt)
|
||||
#define IPC_LBUF_SZ(w, x, y, z) (((TO_BT_ADDR((void *)w) + w->x) - w->y) / w->z)
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@
|
|||
#include <memalign.h>
|
||||
|
||||
#include <linux/err.h>
|
||||
#include <asm/arch-qca-common/scm.h>
|
||||
|
||||
static void *bt_ipc_alloc_lmsg(struct bt_descriptor *btDesc, uint32_t len,
|
||||
struct ipc_aux_ptr *aux_ptr, uint8_t *is_lbuf_full)
|
||||
|
|
@ -185,6 +186,11 @@ static void bt_ipc_cust_msg(struct bt_descriptor *btDesc, uint8_t msgid)
|
|||
|
||||
switch (msgid) {
|
||||
case IPC_CMD_IPC_STOP:
|
||||
ret = qti_scm_toggle_bt_eco_bit(PAS_ID, BT_ECO_BIT_SET);
|
||||
if (ret) {
|
||||
printf("Failed to set BT ECO\n");
|
||||
return;
|
||||
}
|
||||
printf("BT IPC Stopped, gracefully stopping APSS IPC\n");
|
||||
break;
|
||||
case IPC_CMD_SWITCH_TO_UART:
|
||||
|
|
@ -197,6 +203,12 @@ static void bt_ipc_cust_msg(struct bt_descriptor *btDesc, uint8_t msgid)
|
|||
printf("BT Crashed, gracefully stopping IPC\n");
|
||||
return;
|
||||
case IPC_CMD_IPC_START:
|
||||
ret = qti_scm_toggle_bt_eco_bit(PAS_ID, BT_ECO_BIT_RESET);
|
||||
if (ret) {
|
||||
printf("Failed to reset BT ECO\n");
|
||||
return;
|
||||
}
|
||||
|
||||
btmem->tx_ctxt = (struct context_info *)((void *)
|
||||
btmem->rx_ctxt + btmem->rx_ctxt->TotalMemorySize);
|
||||
btmem->lmsg_ctxt.widx = 0;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue