From e95455ac1b149614b840b02cd01aa2760a8a7cd5 Mon Sep 17 00:00:00 2001
From: Wataru Okoshi <okoshi.wataru@socionext.com>
Date: Wed, 18 Jan 2017 16:24:38 +0900
Subject: [PATCH 01/13] ARM: uniphier: update UMC_MEMMAPSET value for LD20 SoC

Change bnk_typ's value from 8 to 0 (for G1's performance).

Signed-off-by: Wataru Okoshi <okoshi.wataru@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 arch/arm/mach-uniphier/dram/umc-ld20.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-uniphier/dram/umc-ld20.c b/arch/arm/mach-uniphier/dram/umc-ld20.c
index ecbe101617..df6cc013bc 100644
--- a/arch/arm/mach-uniphier/dram/umc-ld20.c
+++ b/arch/arm/mach-uniphier/dram/umc-ld20.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (C) 2016 Socionext Inc.
  *
- * based on commit 5e1cb0f1caeabc6c99469dd997cb6b4f46834443 of Diag
+ * based on commit 1f6feb76e7f9753f51955444e422486521f9b3a3 of Diag
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -581,7 +581,7 @@ static int umc_dc_init(void __iomem *dc_base, unsigned int freq,
 	writel(umc_memconf0a[freq_e][size_e], dc_base + UMC_MEMCONF0A);
 	writel(umc_memconf0b[freq_e][size_e], dc_base + UMC_MEMCONF0B);
 	writel(umc_memconfch[freq_e][size_e], dc_base + UMC_MEMCONFCH);
-	writel(0x00000008, dc_base + UMC_MEMMAPSET);
+	writel(0x00000000, dc_base + UMC_MEMMAPSET);
 
 	writel(umc_cmdctla[freq_e], dc_base + UMC_CMDCTLA);
 	writel(umc_cmdctlb[freq_e], dc_base + UMC_CMDCTLB);

From 7d75254b3d0dcc3231eca11c4c5143972ce25232 Mon Sep 17 00:00:00 2001
From: Kotaro Hayashi <hayashi.kotaro@socionext.com>
Date: Mon, 19 Dec 2016 11:14:04 +0900
Subject: [PATCH 02/13] ARM: uniphier: fix delay fixup code in LD11 UMC init

The ddrphy_shift_rof_hws() never writes back the shifted delay value
to the register, which makes this function non-effective.

Signed-off-by: Kotaro Hayashi <hayashi.kotaro@socionext.com>
[masahiro: add git log]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 arch/arm/mach-uniphier/dram/umc-ld11.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-uniphier/dram/umc-ld11.c b/arch/arm/mach-uniphier/dram/umc-ld11.c
index 7dab00c024..97a9fef24c 100644
--- a/arch/arm/mach-uniphier/dram/umc-ld11.c
+++ b/arch/arm/mach-uniphier/dram/umc-ld11.c
@@ -271,6 +271,7 @@ static void ddrphy_shift_rof_hws(void __iomem *phy_base, const int pos_shift[][2
 			rdqnsd = clamp(rdqnsd + ddrphy_hpstep(neg_shift[block][byte], dx, phy_base),
 				       0U, 0xffU);
 			lcdlr1 = (lcdlr1 & ~(0xffff << 8)) | (rdqsd << 8) | (rdqnsd << 16);
+			writel(lcdlr1, phy_base + PHY_DXLCDLR1(dx));
 			readl(phy_base + PHY_DXLCDLR1(dx)); /* relax */
 		}
 	}

From 7a37bd64c5b17de4de28538601c2d81cb84684e7 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Sat, 21 Jan 2017 18:05:21 +0900
Subject: [PATCH 03/13] ARM: uniphier: add missing static and const qualifier

These are file-internal and constant.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 arch/arm/mach-uniphier/board_init.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c
index 93330b05c7..8233a52bd5 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -87,7 +87,7 @@ struct uniphier_initdata {
 	void (*misc_init)(void);
 };
 
-struct uniphier_initdata uniphier_initdata[] = {
+static const struct uniphier_initdata uniphier_initdata[] = {
 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
 	{
 		.soc_id = SOC_UNIPHIER_SLD3,
@@ -169,7 +169,7 @@ struct uniphier_initdata uniphier_initdata[] = {
 #endif
 };
 
-static struct uniphier_initdata *uniphier_get_initdata(
+static const struct uniphier_initdata *uniphier_get_initdata(
 						enum uniphier_soc_id soc_id)
 {
 	int i;
@@ -184,7 +184,7 @@ static struct uniphier_initdata *uniphier_get_initdata(
 
 int board_init(void)
 {
-	struct uniphier_initdata *initdata;
+	const struct uniphier_initdata *initdata;
 	enum uniphier_soc_id soc_id;
 	int ret;
 

From 561ca649a8e3d459e95d23b903cd027096935278 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Sat, 21 Jan 2017 18:05:22 +0900
Subject: [PATCH 04/13] ARM: uniphier: make SPL optional for ARVv8 SoCs

We may want to run different firmware before running U-Boot.  For
example, ARM Trusted Firmware runs before U-Boot, making U-Boot
a non-secure world boot loader.  In this case, the SoC might be
initialized there, which enables us to skip SPL entirely.

This commit removes "select SPL" to make it configurable.  This
also enables the Multi SoC support for the UniPhier ARMv8 SoCs.
(CONFIG_ARCH_UNIPHIER_V8_MULTI)  Thanks to the driver model and
Device Tree, the U-Boot proper part is now written in a generic way.
The board/SoC parameters reside in DT.  The Multi SoC support
increases the memory footprint a bit, but the U-Boot proper does
not have strict memory constraint.  This will mitigate the per-SoC
(sometimes per-board) defconfig burden.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 arch/arm/Kconfig                      | 11 +++---
 arch/arm/mach-uniphier/Kconfig        | 49 +++++++++++++++++----------
 arch/arm/mach-uniphier/arm64/Makefile |  5 ++-
 arch/arm/mach-uniphier/board_init.c   |  5 +--
 configs/uniphier_ld11_defconfig       |  3 +-
 configs/uniphier_ld20_defconfig       |  3 +-
 configs/uniphier_ld4_sld8_defconfig   |  1 +
 configs/uniphier_pro4_defconfig       |  1 +
 configs/uniphier_pxs2_ld6b_defconfig  |  1 +
 configs/uniphier_sld3_defconfig       |  1 +
 include/configs/uniphier.h            |  6 ++--
 11 files changed, 56 insertions(+), 30 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 855871c64f..2554a2cd14 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -894,12 +894,11 @@ config ARCH_UNIPHIER
 	select OF_CONTROL
 	select OF_LIBFDT
 	select PINCTRL
-	select SPL
-	select SPL_DM
-	select SPL_LIBCOMMON_SUPPORT
-	select SPL_LIBGENERIC_SUPPORT
-	select SPL_OF_CONTROL
-	select SPL_PINCTRL
+	select SPL_DM if SPL
+	select SPL_LIBCOMMON_SUPPORT if SPL
+	select SPL_LIBGENERIC_SUPPORT if SPL
+	select SPL_OF_CONTROL if SPL
+	select SPL_PINCTRL if SPL
 	select SUPPORT_SPL
 	help
 	  Support for UniPhier SoC family developed by Socionext Inc.
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index aa3909a766..e732ac1bfa 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -13,66 +13,81 @@ config ARCH_UNIPHIER_32BIT
 config ARCH_UNIPHIER_64BIT
 	bool
 	select ARM64
-	select SPL_SEPARATE_BSS
-	select ARMV8_MULTIENTRY
-	select ARMV8_SPIN_TABLE
+	select SPL_SEPARATE_BSS if SPL
+	select ARMV8_MULTIENTRY if SPL
+	select ARMV8_SPIN_TABLE if SPL
 
 choice
         prompt "UniPhier SoC select"
         default ARCH_UNIPHIER_PRO4
 
 config ARCH_UNIPHIER_SLD3
-	bool "UniPhier PH1-sLD3 SoC"
+	bool "UniPhier sLD3 SoC"
 	select ARCH_UNIPHIER_32BIT
 
 config ARCH_UNIPHIER_LD4_SLD8
-	bool "UniPhier PH1-LD4/PH1-sLD8 SoC"
+	bool "UniPhier LD4/sLD8 SoCs"
 	select ARCH_UNIPHIER_32BIT
 
 config ARCH_UNIPHIER_PRO4
-	bool "UniPhier PH1-Pro4 SoC"
+	bool "UniPhier Pro4 SoC"
 	select ARCH_UNIPHIER_32BIT
 
 config ARCH_UNIPHIER_PRO5_PXS2_LD6B
-	bool "UniPhier PH1-Pro5/ProXstream2/PH1-LD6b SoC"
+	bool "UniPhier Pro5/PXs2/LD6b SoCs"
 	select ARCH_UNIPHIER_32BIT
 
-config ARCH_UNIPHIER_LD11
-	bool "UniPhier PH1-LD11 SoC"
+config ARCH_UNIPHIER_LD11_SINGLE
+	bool "UniPhier LD11 SoC"
 	select ARCH_UNIPHIER_64BIT
 
-config ARCH_UNIPHIER_LD20
-	bool "UniPhier PH1-LD20 SoC"
+config ARCH_UNIPHIER_LD20_SINGLE
+	bool "UniPhier LD20 SoC"
+	select ARCH_UNIPHIER_64BIT
+
+config ARCH_UNIPHIER_V8_MULTI
+	bool "UniPhier V8 SoCs"
+	depends on !SPL
 	select ARCH_UNIPHIER_64BIT
-	select OF_BOARD_SETUP
 
 endchoice
 
 config ARCH_UNIPHIER_LD4
-	bool "Enable UniPhier PH1-LD4 SoC support"
+	bool "Enable UniPhier LD4 SoC support"
 	depends on ARCH_UNIPHIER_LD4_SLD8
 	default y
 
 config ARCH_UNIPHIER_SLD8
-	bool "Enable UniPhier PH1-sLD8 SoC support"
+	bool "Enable UniPhier sLD8 SoC support"
 	depends on ARCH_UNIPHIER_LD4_SLD8
 	default y
 
 config ARCH_UNIPHIER_PRO5
-	bool "Enable UniPhier PH1-Pro5 SoC support"
+	bool "Enable UniPhier Pro5 SoC support"
 	depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B
 	default y
 
 config ARCH_UNIPHIER_PXS2
-	bool "Enable UniPhier ProXstream2 SoC support"
+	bool "Enable UniPhier Pxs2 SoC support"
 	depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B
 	default y
 
 config ARCH_UNIPHIER_LD6B
-	bool "Enable UniPhier PH1-LD6b SoC support"
+	bool "Enable UniPhier LD6b SoC support"
 	depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B
 	default y
 
+config ARCH_UNIPHIER_LD11
+	bool "Enable UniPhier LD11 SoC support" if ARCH_UNIPHIER_V8_MULTI
+	depends on ARCH_UNIPHIER_LD11_SINGLE || ARCH_UNIPHIER_V8_MULTI
+	default y
+
+config ARCH_UNIPHIER_LD20
+	bool "Enable UniPhier LD20 SoC support" if ARCH_UNIPHIER_V8_MULTI
+	depends on ARCH_UNIPHIER_LD20_SINGLE || ARCH_UNIPHIER_V8_MULTI
+	select OF_BOARD_SETUP
+	default y
+
 config CACHE_UNIPHIER
 	bool "Enable the UniPhier L2 cache controller"
 	depends on ARCH_UNIPHIER_32BIT
diff --git a/arch/arm/mach-uniphier/arm64/Makefile b/arch/arm/mach-uniphier/arm64/Makefile
index 5ed030ae40..eb34c207ce 100644
--- a/arch/arm/mach-uniphier/arm64/Makefile
+++ b/arch/arm/mach-uniphier/arm64/Makefile
@@ -5,6 +5,9 @@
 ifdef CONFIG_SPL_BUILD
 obj-y += timer.o
 else
-obj-y += mem_map.o smp.o smp_kick_cpus.o
+obj-y += mem_map.o
+ifdef CONFIG_ARMV8_MULTIENTRY
+obj-y += smp.o smp_kick_cpus.o
 obj-$(CONFIG_ARCH_UNIPHIER_LD20) += arm-cci500.o
 endif
+endif
diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c
index 8233a52bd5..226929150e 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -73,8 +73,9 @@ static void uniphier_ld20_misc_init(void)
 		writel(0x0000b500, 0x6184e024);
 		writel(0x00000001, 0x6184e000);
 	}
-
+#ifdef CONFIG_ARMV8_MULTIENTRY
 	cci500_init(2);
+#endif
 }
 #endif
 
@@ -235,7 +236,7 @@ int board_init(void)
 
 	led_puts("U6");
 
-#ifdef CONFIG_ARM64
+#ifdef CONFIG_ARMV8_MULTIENTRY
 	uniphier_smp_kick_all_cpus();
 #endif
 
diff --git a/configs/uniphier_ld11_defconfig b/configs/uniphier_ld11_defconfig
index 8c3ebbc5f7..6aa1190d74 100644
--- a/configs/uniphier_ld11_defconfig
+++ b/configs/uniphier_ld11_defconfig
@@ -2,12 +2,13 @@ CONFIG_ARM=y
 CONFIG_ARCH_UNIPHIER=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_ARCH_UNIPHIER_LD11=y
+CONFIG_ARCH_UNIPHIER_LD11_SINGLE=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld11-ref"
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_BOARD_LATE_INIT=y
+CONFIG_SPL=y
 CONFIG_SPL_NOR_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_XIMG is not set
diff --git a/configs/uniphier_ld20_defconfig b/configs/uniphier_ld20_defconfig
index 302b68af8a..d352f2e9cf 100644
--- a/configs/uniphier_ld20_defconfig
+++ b/configs/uniphier_ld20_defconfig
@@ -2,12 +2,13 @@ CONFIG_ARM=y
 CONFIG_ARCH_UNIPHIER=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_ARCH_UNIPHIER_LD20=y
+CONFIG_ARCH_UNIPHIER_LD20_SINGLE=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref"
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_BOARD_LATE_INIT=y
+CONFIG_SPL=y
 CONFIG_SPL_NOR_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_XIMG is not set
diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig
index d484c90a4d..b0283356a6 100644
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -10,6 +10,7 @@ CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref"
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_BOARD_LATE_INIT=y
+CONFIG_SPL=y
 CONFIG_SPL_NOR_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/uniphier_pro4_defconfig b/configs/uniphier_pro4_defconfig
index 97301eb2ff..2f2913ab8b 100644
--- a/configs/uniphier_pro4_defconfig
+++ b/configs/uniphier_pro4_defconfig
@@ -9,6 +9,7 @@ CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-pro4-ref"
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_BOARD_LATE_INIT=y
+CONFIG_SPL=y
 CONFIG_SPL_NOR_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/uniphier_pxs2_ld6b_defconfig b/configs/uniphier_pxs2_ld6b_defconfig
index c66c6dc34c..e1690b1b4f 100644
--- a/configs/uniphier_pxs2_ld6b_defconfig
+++ b/configs/uniphier_pxs2_ld6b_defconfig
@@ -10,6 +10,7 @@ CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka"
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_BOARD_LATE_INIT=y
+CONFIG_SPL=y
 CONFIG_SPL_NOR_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/uniphier_sld3_defconfig b/configs/uniphier_sld3_defconfig
index baeff0afa5..d52a42cac4 100644
--- a/configs/uniphier_sld3_defconfig
+++ b/configs/uniphier_sld3_defconfig
@@ -10,6 +10,7 @@ CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-sld3-ref"
 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
 CONFIG_BOARD_LATE_INIT=y
+CONFIG_SPL=y
 CONFIG_SPL_NOR_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index ee86663e6b..487d3defbc 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -83,7 +83,7 @@
 #define CONFIG_SYS_MMC_ENV_DEV		0
 #define CONFIG_SYS_MMC_ENV_PART		1
 
-#ifdef CONFIG_ARM64
+#ifdef CONFIG_ARMV8_MULTIENTRY
 #define CPU_RELEASE_ADDR			0x80000000
 #define COUNTER_FREQUENCY			50000000
 #define CONFIG_GICV3
@@ -93,7 +93,7 @@
 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
 #define GICR_BASE				0x5fe80000
 #endif
-#else
+#elif !defined(CONFIG_ARM64)
 /* Time clock 1MHz */
 #define CONFIG_SYS_TIMER_RATE			1000000
 #endif
@@ -274,6 +274,7 @@
 /* subtract sizeof(struct image_header) */
 #define CONFIG_SYS_UBOOT_BASE			(0x60000 - 0x40)
 
+#ifdef CONFIG_SPL
 #define CONFIG_SPL_TARGET			"u-boot-with-spl.bin"
 #define CONFIG_SPL_MAX_FOOTPRINT		0x10000
 #define CONFIG_SPL_MAX_SIZE			0x10000
@@ -283,5 +284,6 @@
 #define CONFIG_SPL_BSS_START_ADDR		0x30016000
 #endif
 #define CONFIG_SPL_BSS_MAX_SIZE			0x2000
+#endif
 
 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */

From 82b3d98b3af6cecc7a8c1f1781823d831864293d Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Sat, 21 Jan 2017 18:05:23 +0900
Subject: [PATCH 05/13] ARM: uniphier: add uniphier_v8_defconfig

This defconfig does not support SPL.  If you use this, the basic
SoC initialization must be done in firmware that runs before U-Boot.
(Generally, ARM Trusted Firmware is expected to do this job).

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 configs/uniphier_v8_defconfig | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 configs/uniphier_v8_defconfig

diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
new file mode 100644
index 0000000000..7c0a744a88
--- /dev/null
+++ b/configs/uniphier_v8_defconfig
@@ -0,0 +1,34 @@
+CONFIG_ARM=y
+CONFIG_ARCH_UNIPHIER=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ARCH_UNIPHIER_V8_MULTI=y
+CONFIG_MICRO_SUPPORT_CARD=y
+CONFIG_SYS_TEXT_BASE=0x84000000
+CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref"
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+# CONFIG_CMD_MISC is not set
+CONFIG_CMD_FAT=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_GPIO_UNIPHIER=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_MMC_UNIPHIER=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_CADENCE=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y

From 0f4ec05bbbd60f0159a739e54c910bca859ef039 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Sat, 21 Jan 2017 18:05:24 +0900
Subject: [PATCH 06/13] ARM: uniphier: replace <linux/err.h> with
 <linux/errno.h>

These files only need error number macros.  Actually, IS_ERR(),
PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot.  Avoid
unnecessary header includes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 arch/arm/mach-uniphier/boot-mode/boot-mode.c  | 2 +-
 arch/arm/mach-uniphier/clk/dpll-ld4.c         | 2 +-
 arch/arm/mach-uniphier/clk/dpll-pro4.c        | 2 +-
 arch/arm/mach-uniphier/dram/ddrphy-ld4.c      | 2 +-
 arch/arm/mach-uniphier/dram/ddrphy-training.c | 2 +-
 arch/arm/mach-uniphier/dram/umc-ld20.c        | 3 ++-
 arch/arm/mach-uniphier/dram/umc-ld4.c         | 2 +-
 arch/arm/mach-uniphier/dram/umc-pro4.c        | 2 +-
 arch/arm/mach-uniphier/dram/umc-pxs2.c        | 5 +++--
 arch/arm/mach-uniphier/dram/umc-sld8.c        | 2 +-
 arch/arm/mach-uniphier/dram_init.c            | 2 +-
 arch/arm/mach-uniphier/memconf.c              | 2 +-
 arch/arm/mach-uniphier/pinctrl-glue.c         | 2 +-
 13 files changed, 16 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
index 1d531402d5..ebe0578949 100644
--- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <mmc.h>
 #include <spl.h>
-#include <linux/err.h>
+#include <linux/errno.h>
 
 #include "../sbc/sbc-regs.h"
 #include "../soc-info.h"
diff --git a/arch/arm/mach-uniphier/clk/dpll-ld4.c b/arch/arm/mach-uniphier/clk/dpll-ld4.c
index a40b30d0e0..56361ff4d4 100644
--- a/arch/arm/mach-uniphier/clk/dpll-ld4.c
+++ b/arch/arm/mach-uniphier/clk/dpll-ld4.c
@@ -6,7 +6,7 @@
  */
 
 #include <common.h>
-#include <linux/err.h>
+#include <linux/errno.h>
 #include <linux/io.h>
 
 #include "../init.h"
diff --git a/arch/arm/mach-uniphier/clk/dpll-pro4.c b/arch/arm/mach-uniphier/clk/dpll-pro4.c
index 3ac48d6365..d6b6262768 100644
--- a/arch/arm/mach-uniphier/clk/dpll-pro4.c
+++ b/arch/arm/mach-uniphier/clk/dpll-pro4.c
@@ -6,7 +6,7 @@
  */
 
 #include <common.h>
-#include <linux/err.h>
+#include <linux/errno.h>
 #include <linux/io.h>
 
 #include "../init.h"
diff --git a/arch/arm/mach-uniphier/dram/ddrphy-ld4.c b/arch/arm/mach-uniphier/dram/ddrphy-ld4.c
index 620668e2e7..c20730d820 100644
--- a/arch/arm/mach-uniphier/dram/ddrphy-ld4.c
+++ b/arch/arm/mach-uniphier/dram/ddrphy-ld4.c
@@ -6,7 +6,7 @@
  */
 
 #include <common.h>
-#include <linux/err.h>
+#include <linux/errno.h>
 #include <linux/io.h>
 
 #include "ddrphy-init.h"
diff --git a/arch/arm/mach-uniphier/dram/ddrphy-training.c b/arch/arm/mach-uniphier/dram/ddrphy-training.c
index 005ca18309..fa29a43062 100644
--- a/arch/arm/mach-uniphier/dram/ddrphy-training.c
+++ b/arch/arm/mach-uniphier/dram/ddrphy-training.c
@@ -6,7 +6,7 @@
  */
 
 #include <common.h>
-#include <linux/err.h>
+#include <linux/errno.h>
 #include <linux/io.h>
 
 #include "ddrphy-init.h"
diff --git a/arch/arm/mach-uniphier/dram/umc-ld20.c b/arch/arm/mach-uniphier/dram/umc-ld20.c
index df6cc013bc..61f62ae6d7 100644
--- a/arch/arm/mach-uniphier/dram/umc-ld20.c
+++ b/arch/arm/mach-uniphier/dram/umc-ld20.c
@@ -8,7 +8,8 @@
 
 #include <common.h>
 #include <linux/bitops.h>
-#include <linux/err.h>
+#include <linux/compat.h>
+#include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
 #include <asm/processor.h>
diff --git a/arch/arm/mach-uniphier/dram/umc-ld4.c b/arch/arm/mach-uniphier/dram/umc-ld4.c
index 90e7f2d271..06aa054c0f 100644
--- a/arch/arm/mach-uniphier/dram/umc-ld4.c
+++ b/arch/arm/mach-uniphier/dram/umc-ld4.c
@@ -7,7 +7,7 @@
  */
 
 #include <common.h>
-#include <linux/err.h>
+#include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
 #include <asm/processor.h>
diff --git a/arch/arm/mach-uniphier/dram/umc-pro4.c b/arch/arm/mach-uniphier/dram/umc-pro4.c
index 5447fa9841..740247a8d8 100644
--- a/arch/arm/mach-uniphier/dram/umc-pro4.c
+++ b/arch/arm/mach-uniphier/dram/umc-pro4.c
@@ -7,7 +7,7 @@
  */
 
 #include <common.h>
-#include <linux/err.h>
+#include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
 #include <asm/processor.h>
diff --git a/arch/arm/mach-uniphier/dram/umc-pxs2.c b/arch/arm/mach-uniphier/dram/umc-pxs2.c
index b4da3d26c2..9aeda64ef1 100644
--- a/arch/arm/mach-uniphier/dram/umc-pxs2.c
+++ b/arch/arm/mach-uniphier/dram/umc-pxs2.c
@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2015-2017 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * based on commit 21b6e480f92ccc38fe0502e3116411d6509d3bf2 of Diag by:
  * Copyright (C) 2015 Socionext Inc.
@@ -8,7 +9,7 @@
  */
 
 #include <common.h>
-#include <linux/err.h>
+#include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
 #include <asm/processor.h>
diff --git a/arch/arm/mach-uniphier/dram/umc-sld8.c b/arch/arm/mach-uniphier/dram/umc-sld8.c
index 61369f1ed1..a0c28715b6 100644
--- a/arch/arm/mach-uniphier/dram/umc-sld8.c
+++ b/arch/arm/mach-uniphier/dram/umc-sld8.c
@@ -7,7 +7,7 @@
  */
 
 #include <common.h>
-#include <linux/err.h>
+#include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
 #include <asm/processor.h>
diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c
index 489366c63f..87418f496e 100644
--- a/arch/arm/mach-uniphier/dram_init.c
+++ b/arch/arm/mach-uniphier/dram_init.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <libfdt.h>
 #include <fdtdec.h>
-#include <linux/err.h>
+#include <linux/errno.h>
 
 #include "init.h"
 #include "soc-info.h"
diff --git a/arch/arm/mach-uniphier/memconf.c b/arch/arm/mach-uniphier/memconf.c
index 205ccf1c65..dcfc6455ba 100644
--- a/arch/arm/mach-uniphier/memconf.c
+++ b/arch/arm/mach-uniphier/memconf.c
@@ -7,7 +7,7 @@
  */
 
 #include <common.h>
-#include <linux/err.h>
+#include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
 
diff --git a/arch/arm/mach-uniphier/pinctrl-glue.c b/arch/arm/mach-uniphier/pinctrl-glue.c
index 48549e313b..c52c6a6f6c 100644
--- a/arch/arm/mach-uniphier/pinctrl-glue.c
+++ b/arch/arm/mach-uniphier/pinctrl-glue.c
@@ -5,7 +5,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <linux/err.h>
+#include <linux/errno.h>
 #include <dm/device.h>
 #include <dm/pinctrl.h>
 #include <dm/uclass.h>

From d9a70368dbe4a9b0e81b60ffbe3fda4a09e0ad5a Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Sat, 21 Jan 2017 18:05:25 +0900
Subject: [PATCH 07/13] ARM: uniphier: replace <common.h> with <linux/delay.h>
 where possible

The <common.h> includes too many headers.  Actually, these files
needed to include it for udelay() declaration.  Now we can replace
it with <linux/delay.h> thanks to commit 5bc516ed661a ("delay:
collect {m, n, u}delay declarations to include/linux/delay.h").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 arch/arm/mach-uniphier/clk/dpll-sld8.c     | 2 +-
 arch/arm/mach-uniphier/clk/pll-base-ld20.c | 3 ++-
 arch/arm/mach-uniphier/clk/pll-ld4.c       | 2 +-
 arch/arm/mach-uniphier/clk/pll-pro4.c      | 2 +-
 4 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-uniphier/clk/dpll-sld8.c b/arch/arm/mach-uniphier/clk/dpll-sld8.c
index 7faa5e85b6..4a0010b5c7 100644
--- a/arch/arm/mach-uniphier/clk/dpll-sld8.c
+++ b/arch/arm/mach-uniphier/clk/dpll-sld8.c
@@ -5,7 +5,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <common.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 
 #include "../init.h"
diff --git a/arch/arm/mach-uniphier/clk/pll-base-ld20.c b/arch/arm/mach-uniphier/clk/pll-base-ld20.c
index caa631d9f7..c66f083fae 100644
--- a/arch/arm/mach-uniphier/clk/pll-base-ld20.c
+++ b/arch/arm/mach-uniphier/clk/pll-base-ld20.c
@@ -5,8 +5,9 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <common.h>
 #include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
 
diff --git a/arch/arm/mach-uniphier/clk/pll-ld4.c b/arch/arm/mach-uniphier/clk/pll-ld4.c
index 13257e4d16..55ac0aeff6 100644
--- a/arch/arm/mach-uniphier/clk/pll-ld4.c
+++ b/arch/arm/mach-uniphier/clk/pll-ld4.c
@@ -5,7 +5,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <common.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 
 #include "../init.h"
diff --git a/arch/arm/mach-uniphier/clk/pll-pro4.c b/arch/arm/mach-uniphier/clk/pll-pro4.c
index cdd1fd4bf1..e4d1f72399 100644
--- a/arch/arm/mach-uniphier/clk/pll-pro4.c
+++ b/arch/arm/mach-uniphier/clk/pll-pro4.c
@@ -5,7 +5,7 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#include <common.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 
 #include "../init.h"

From e27d6c7d328caf75bd7680109bc6610bc681f46e Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Sat, 21 Jan 2017 18:05:26 +0900
Subject: [PATCH 08/13] ARM: uniphier: simplify SoC ID get function

Currently, uniphier_get_soc_type() converts the SoC ID (this is
read from the revision register) to an enum symbol to use it for SoC
identification.  Come to think of it, there is no need for the
conversion in the first place.  Using the SoC ID from the register
as-is a straightforward way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 arch/arm/mach-uniphier/Makefile               |  4 +-
 arch/arm/mach-uniphier/arm32/psci.c           | 12 +--
 arch/arm/mach-uniphier/board_init.c           | 26 +++---
 .../mach-uniphier/boot-mode/boot-mode-ld20.c  |  9 +-
 arch/arm/mach-uniphier/boot-mode/boot-mode.c  | 30 +++----
 arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c | 20 ++---
 arch/arm/mach-uniphier/boot-mode/spl_board.c  |  6 +-
 arch/arm/mach-uniphier/cpu-info.c             | 73 ++++++++++++++++
 arch/arm/mach-uniphier/cpu_info.c             | 73 ----------------
 .../arm/mach-uniphier/debug-uart/debug-uart.c | 20 ++---
 arch/arm/mach-uniphier/dram/cmd_ddrphy.c      | 10 +--
 arch/arm/mach-uniphier/dram_init.c            |  2 +-
 arch/arm/mach-uniphier/sg-regs.h              | 16 ++--
 arch/arm/mach-uniphier/soc-info.c             | 35 ++++++++
 arch/arm/mach-uniphier/soc-info.h             | 85 ++++---------------
 arch/arm/mach-uniphier/soc_info.c             | 84 ------------------
 arch/arm/mach-uniphier/spl_board_init.c       | 26 +++---
 17 files changed, 214 insertions(+), 317 deletions(-)
 create mode 100644 arch/arm/mach-uniphier/cpu-info.c
 delete mode 100644 arch/arm/mach-uniphier/cpu_info.c
 create mode 100644 arch/arm/mach-uniphier/soc-info.c
 delete mode 100644 arch/arm/mach-uniphier/soc_info.c

diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile
index ab2c6dc99b..abfdccc02a 100644
--- a/arch/arm/mach-uniphier/Makefile
+++ b/arch/arm/mach-uniphier/Makefile
@@ -10,7 +10,7 @@ obj-y += bcu/
 
 else
 
-obj-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o
+obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o
 obj-y += dram_init.o
 obj-y += board_init.o
 obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o
@@ -22,7 +22,7 @@ obj-y += pinctrl-glue.o
 endif
 
 obj-y += boards.o
-obj-y += soc_info.o
+obj-y += soc-info.o
 obj-y += boot-mode/
 obj-y += clk/
 obj-y += dram/
diff --git a/arch/arm/mach-uniphier/arm32/psci.c b/arch/arm/mach-uniphier/arm32/psci.c
index e6682657be..65a468dec9 100644
--- a/arch/arm/mach-uniphier/arm32/psci.c
+++ b/arch/arm/mach-uniphier/arm32/psci.c
@@ -28,13 +28,13 @@ u32 uniphier_smp_booted[CONFIG_ARMV7_PSCI_NR_CPUS];
 
 static int uniphier_get_nr_cpus(void)
 {
-	switch (uniphier_get_soc_type()) {
-	case SOC_UNIPHIER_SLD3:
-	case SOC_UNIPHIER_PRO4:
-	case SOC_UNIPHIER_PRO5:
+	switch (uniphier_get_soc_id()) {
+	case UNIPHIER_SLD3_ID:
+	case UNIPHIER_PRO4_ID:
+	case UNIPHIER_PRO5_ID:
 		return 2;
-	case SOC_UNIPHIER_PXS2:
-	case SOC_UNIPHIER_LD6B:
+	case UNIPHIER_PXS2_ID:
+	case UNIPHIER_LD6B_ID:
 		return 4;
 	default:
 		return 1;
diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c
index 226929150e..413b338228 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -80,7 +80,7 @@ static void uniphier_ld20_misc_init(void)
 #endif
 
 struct uniphier_initdata {
-	enum uniphier_soc_id soc_id;
+	unsigned int soc_id;
 	bool nand_2cs;
 	void (*sbc_init)(void);
 	void (*pll_init)(void);
@@ -91,7 +91,7 @@ struct uniphier_initdata {
 static const struct uniphier_initdata uniphier_initdata[] = {
 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
 	{
-		.soc_id = SOC_UNIPHIER_SLD3,
+		.soc_id = UNIPHIER_SLD3_ID,
 		.nand_2cs = true,
 		.sbc_init = uniphier_sbc_init_admulti,
 		.pll_init = uniphier_sld3_pll_init,
@@ -100,7 +100,7 @@ static const struct uniphier_initdata uniphier_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
 	{
-		.soc_id = SOC_UNIPHIER_LD4,
+		.soc_id = UNIPHIER_LD4_ID,
 		.nand_2cs = true,
 		.sbc_init = uniphier_ld4_sbc_init,
 		.pll_init = uniphier_ld4_pll_init,
@@ -109,7 +109,7 @@ static const struct uniphier_initdata uniphier_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
 	{
-		.soc_id = SOC_UNIPHIER_PRO4,
+		.soc_id = UNIPHIER_PRO4_ID,
 		.nand_2cs = false,
 		.sbc_init = uniphier_sbc_init_savepin,
 		.pll_init = uniphier_pro4_pll_init,
@@ -118,7 +118,7 @@ static const struct uniphier_initdata uniphier_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
 	{
-		.soc_id = SOC_UNIPHIER_SLD8,
+		.soc_id = UNIPHIER_SLD8_ID,
 		.nand_2cs = true,
 		.sbc_init = uniphier_ld4_sbc_init,
 		.pll_init = uniphier_ld4_pll_init,
@@ -127,7 +127,7 @@ static const struct uniphier_initdata uniphier_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
 	{
-		.soc_id = SOC_UNIPHIER_PRO5,
+		.soc_id = UNIPHIER_PRO5_ID,
 		.nand_2cs = true,
 		.sbc_init = uniphier_sbc_init_savepin,
 		.clk_init = uniphier_pro5_clk_init,
@@ -135,7 +135,7 @@ static const struct uniphier_initdata uniphier_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
 	{
-		.soc_id = SOC_UNIPHIER_PXS2,
+		.soc_id = UNIPHIER_PXS2_ID,
 		.nand_2cs = true,
 		.sbc_init = uniphier_pxs2_sbc_init,
 		.clk_init = uniphier_pxs2_clk_init,
@@ -143,7 +143,7 @@ static const struct uniphier_initdata uniphier_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
 	{
-		.soc_id = SOC_UNIPHIER_LD6B,
+		.soc_id = UNIPHIER_LD6B_ID,
 		.nand_2cs = true,
 		.sbc_init = uniphier_pxs2_sbc_init,
 		.clk_init = uniphier_pxs2_clk_init,
@@ -151,7 +151,7 @@ static const struct uniphier_initdata uniphier_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
 	{
-		.soc_id = SOC_UNIPHIER_LD11,
+		.soc_id = UNIPHIER_LD11_ID,
 		.nand_2cs = false,
 		.sbc_init = uniphier_ld11_sbc_init,
 		.pll_init = uniphier_ld11_pll_init,
@@ -161,7 +161,7 @@ static const struct uniphier_initdata uniphier_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
 	{
-		.soc_id = SOC_UNIPHIER_LD20,
+		.soc_id = UNIPHIER_LD20_ID,
 		.nand_2cs = false,
 		.sbc_init = uniphier_ld11_sbc_init,
 		.pll_init = uniphier_ld20_pll_init,
@@ -171,7 +171,7 @@ static const struct uniphier_initdata uniphier_initdata[] = {
 };
 
 static const struct uniphier_initdata *uniphier_get_initdata(
-						enum uniphier_soc_id soc_id)
+							unsigned int soc_id)
 {
 	int i;
 
@@ -186,12 +186,12 @@ static const struct uniphier_initdata *uniphier_get_initdata(
 int board_init(void)
 {
 	const struct uniphier_initdata *initdata;
-	enum uniphier_soc_id soc_id;
+	unsigned int soc_id;
 	int ret;
 
 	led_puts("U0");
 
-	soc_id = uniphier_get_soc_type();
+	soc_id = uniphier_get_soc_id();
 	initdata = uniphier_get_initdata(soc_id);
 	if (!initdata) {
 		pr_err("unsupported board\n");
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c
index 24255a0f50..2992fd757f 100644
--- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c
@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2016-2017 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -57,14 +58,14 @@ u32 uniphier_ld20_boot_device(void)
 	int boot_mode;
 	u32 usb_boot_mask;
 
-	switch (uniphier_get_soc_type()) {
+	switch (uniphier_get_soc_id()) {
 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
-	case SOC_UNIPHIER_LD11:
+	case UNIPHIER_LD11_ID:
 		usb_boot_mask = 0x00000080;
 		break;
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
-	case SOC_UNIPHIER_LD20:
+	case UNIPHIER_LD20_ID:
 		usb_boot_mask = 0x00000780;
 		break;
 #endif
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
index ebe0578949..a5527704df 100644
--- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
@@ -18,30 +18,30 @@ u32 spl_boot_device_raw(void)
 	if (boot_is_swapped())
 		return BOOT_DEVICE_NOR;
 
-	switch (uniphier_get_soc_type()) {
+	switch (uniphier_get_soc_id()) {
 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
-	case SOC_UNIPHIER_SLD3:
+	case UNIPHIER_SLD3_ID:
 		return uniphier_sld3_boot_device();
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_PRO4) || \
 	defined(CONFIG_ARCH_UNIPHIER_SLD8)
-	case SOC_UNIPHIER_LD4:
-	case SOC_UNIPHIER_PRO4:
-	case SOC_UNIPHIER_SLD8:
+	case UNIPHIER_LD4_ID:
+	case UNIPHIER_PRO4_ID:
+	case UNIPHIER_SLD8_ID:
 		return uniphier_ld4_boot_device();
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
-	case SOC_UNIPHIER_PRO5:
+	case UNIPHIER_PRO5_ID:
 		return uniphier_pro5_boot_device();
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B)
-	case SOC_UNIPHIER_PXS2:
-	case SOC_UNIPHIER_LD6B:
+	case UNIPHIER_PXS2_ID:
+	case UNIPHIER_LD6B_ID:
 		return uniphier_pxs2_boot_device();
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20)
-	case SOC_UNIPHIER_LD11:
-	case SOC_UNIPHIER_LD20:
+	case UNIPHIER_LD11_ID:
+	case UNIPHIER_LD20_ID:
 		return uniphier_ld20_boot_device();
 #endif
 	default:
@@ -55,17 +55,17 @@ u32 spl_boot_device(void)
 
 	mode = spl_boot_device_raw();
 
-	switch (uniphier_get_soc_type()) {
+	switch (uniphier_get_soc_id()) {
 #if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B)
-	case SOC_UNIPHIER_PXS2:
-	case SOC_UNIPHIER_LD6B:
+	case UNIPHIER_PXS2_ID:
+	case UNIPHIER_LD6B_ID:
 		if (mode == BOOT_DEVICE_USB)
 			mode = BOOT_DEVICE_NOR;
 		break;
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20)
-	case SOC_UNIPHIER_LD11:
-	case SOC_UNIPHIER_LD20:
+	case UNIPHIER_LD11_ID:
+	case UNIPHIER_LD20_ID:
 		if (mode == BOOT_DEVICE_MMC1 || mode == BOOT_DEVICE_USB)
 			mode = BOOT_DEVICE_BOARD;
 		break;
diff --git a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c b/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c
index a8ee382248..670d4f6bff 100644
--- a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c
+++ b/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c
@@ -14,34 +14,34 @@ static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 	printf("Boot Swap: %s\n\n", boot_is_swapped() ? "ON" : "OFF");
 
-	switch (uniphier_get_soc_type()) {
+	switch (uniphier_get_soc_id()) {
 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
-	case SOC_UNIPHIER_SLD3:
+	case UNIPHIER_SLD3_ID:
 		uniphier_sld3_boot_mode_show();
 		break;
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_PRO4) || \
 	defined(CONFIG_ARCH_UNIPHIER_SLD8)
-	case SOC_UNIPHIER_LD4:
-	case SOC_UNIPHIER_PRO4:
-	case SOC_UNIPHIER_SLD8:
+	case UNIPHIER_LD4_ID:
+	case UNIPHIER_PRO4_ID:
+	case UNIPHIER_SLD8_ID:
 		uniphier_ld4_boot_mode_show();
 		break;
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
-	case SOC_UNIPHIER_PRO5:
+	case UNIPHIER_PRO5_ID:
 		uniphier_pro5_boot_mode_show();
 		break;
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B)
-	case SOC_UNIPHIER_PXS2:
-	case SOC_UNIPHIER_LD6B:
+	case UNIPHIER_PXS2_ID:
+	case UNIPHIER_LD6B_ID:
 		uniphier_pxs2_boot_mode_show();
 		break;
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20)
-	case SOC_UNIPHIER_LD11:
-	case SOC_UNIPHIER_LD20:
+	case UNIPHIER_LD11_ID:
+	case UNIPHIER_LD20_ID:
 		uniphier_ld20_boot_mode_show();
 		break;
 #endif
diff --git a/arch/arm/mach-uniphier/boot-mode/spl_board.c b/arch/arm/mach-uniphier/boot-mode/spl_board.c
index a6b668656b..0aac9241c3 100644
--- a/arch/arm/mach-uniphier/boot-mode/spl_board.c
+++ b/arch/arm/mach-uniphier/boot-mode/spl_board.c
@@ -40,11 +40,11 @@ int uniphier_rom_get_mmc_funcptr(int (**send_cmd)(u32, u32),
 {
 	const struct uniphier_romfunc_table *table;
 
-	switch (uniphier_get_soc_type()) {
-	case SOC_UNIPHIER_LD11:
+	switch (uniphier_get_soc_id()) {
+	case UNIPHIER_LD11_ID:
 		table = &uniphier_ld11_romfunc_table;
 		break;
-	case SOC_UNIPHIER_LD20:
+	case UNIPHIER_LD20_ID:
 		table = &uniphier_ld20_romfunc_table;
 		break;
 	default:
diff --git a/arch/arm/mach-uniphier/cpu-info.c b/arch/arm/mach-uniphier/cpu-info.c
new file mode 100644
index 0000000000..a9c8167f3e
--- /dev/null
+++ b/arch/arm/mach-uniphier/cpu-info.c
@@ -0,0 +1,73 @@
+/*
+ * Copyright (C) 2013-2014 Panasonic Corporation
+ * Copyright (C) 2015-2017 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+
+#include "soc-info.h"
+
+int print_cpuinfo(void)
+{
+	unsigned int id, model, rev, required_model = 1, required_rev = 1;
+
+	id = uniphier_get_soc_id();
+	model = uniphier_get_soc_model();
+	rev = uniphier_get_soc_revision();
+
+	puts("CPU:   ");
+
+	switch (id) {
+	case UNIPHIER_SLD3_ID:
+		puts("sLD3 (MN2WS0220)");
+		required_model = 2;
+		break;
+	case UNIPHIER_LD4_ID:
+		puts("LD4 (MN2WS0250)");
+		required_rev = 2;
+		break;
+	case UNIPHIER_PRO4_ID:
+		puts("Pro4 (MN2WS0230)");
+		break;
+	case UNIPHIER_SLD8_ID:
+		puts("sLD8 (MN2WS0270)");
+		break;
+	case UNIPHIER_PRO5_ID:
+		puts("Pro5 (MN2WS0300)");
+		break;
+	case UNIPHIER_PXS2_ID:
+		puts("PXs2 (MN2WS0310)");
+		break;
+	case UNIPHIER_LD6B_ID:
+		puts("LD6b (MN2WS0320)");
+		break;
+	case UNIPHIER_LD11_ID:
+		puts("LD11 (SC1405AP1)");
+		break;
+	case UNIPHIER_LD20_ID:
+		puts("LD20 (SC1401AJ1)");
+		break;
+	default:
+		printf("Unknown Processor ID (0x%x)\n", id);
+		return -ENOTSUPP;
+	}
+
+	printf(" model %d (revision %d)\n", model, rev);
+
+	if (model < required_model) {
+		printf("Only model %d or newer is supported.\n",
+		       required_model);
+		return -ENOTSUPP;
+	} else if (rev < required_rev) {
+		printf("Only revision %d or newer is supported.\n",
+		       required_rev);
+		return -ENOTSUPP;
+	}
+
+	return 0;
+}
diff --git a/arch/arm/mach-uniphier/cpu_info.c b/arch/arm/mach-uniphier/cpu_info.c
deleted file mode 100644
index 6ad4c76dc4..0000000000
--- a/arch/arm/mach-uniphier/cpu_info.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (C) 2013-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/io.h>
-
-#include "sg-regs.h"
-
-int print_cpuinfo(void)
-{
-	u32 revision, type, model, rev, required_model = 1, required_rev = 1;
-
-	revision = readl(SG_REVISION);
-	type = (revision & SG_REVISION_TYPE_MASK) >> SG_REVISION_TYPE_SHIFT;
-	model = (revision & SG_REVISION_MODEL_MASK) >> SG_REVISION_MODEL_SHIFT;
-	rev = (revision & SG_REVISION_REV_MASK) >> SG_REVISION_REV_SHIFT;
-
-	puts("CPU:   ");
-
-	switch (type) {
-	case 0x25:
-		puts("PH1-sLD3 (MN2WS0220)");
-		required_model = 2;
-		break;
-	case 0x26:
-		puts("PH1-LD4 (MN2WS0250)");
-		required_rev = 2;
-		break;
-	case 0x28:
-		puts("PH1-Pro4 (MN2WS0230)");
-		break;
-	case 0x29:
-		puts("PH1-sLD8 (MN2WS0270)");
-		break;
-	case 0x2A:
-		puts("PH1-Pro5 (MN2WS0300)");
-		break;
-	case 0x2E:
-		puts("ProXstream2 (MN2WS0310)");
-		break;
-	case 0x2F:
-		puts("PH1-LD6b (MN2WS0320)");
-		break;
-	case 0x31:
-		puts("PH1-LD11 (SC1405AP1)");
-		break;
-	case 0x32:
-		puts("PH1-LD20 (SC1401AJ1)");
-		break;
-	default:
-		printf("Unknown Processor ID (0x%x)\n", revision);
-		return -1;
-	}
-
-	printf(" model %d", model);
-
-	printf(" (rev. %d)\n", rev);
-
-	if (model < required_model) {
-		printf("Sorry, this model is not supported.\n");
-		printf("Required model is %d.", required_model);
-		return -1;
-	} else if (rev < required_rev) {
-		printf("Sorry, this revision is not supported.\n");
-		printf("Required revision is %d.", required_rev);
-		return -1;
-	}
-
-	return 0;
-}
diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.c b/arch/arm/mach-uniphier/debug-uart/debug-uart.c
index d884785acb..72a514dc0e 100644
--- a/arch/arm/mach-uniphier/debug-uart/debug-uart.c
+++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.c
@@ -32,45 +32,45 @@ void _debug_uart_init(void)
 	void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
 	unsigned int divisor;
 
-	switch (uniphier_get_soc_type()) {
+	switch (uniphier_get_soc_id()) {
 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
-	case SOC_UNIPHIER_SLD3:
+	case UNIPHIER_SLD3_ID:
 		divisor = uniphier_sld3_debug_uart_init();
 		break;
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
-	case SOC_UNIPHIER_LD4:
+	case UNIPHIER_LD4_ID:
 		divisor = uniphier_ld4_debug_uart_init();
 		break;
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
-	case SOC_UNIPHIER_PRO4:
+	case UNIPHIER_PRO4_ID:
 		divisor = uniphier_pro4_debug_uart_init();
 		break;
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
-	case SOC_UNIPHIER_SLD8:
+	case UNIPHIER_SLD8_ID:
 		divisor = uniphier_sld8_debug_uart_init();
 		break;
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
-	case SOC_UNIPHIER_PRO5:
+	case UNIPHIER_PRO5_ID:
 		divisor = uniphier_pro5_debug_uart_init();
 		break;
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
-	case SOC_UNIPHIER_PXS2:
+	case UNIPHIER_PXS2_ID:
 		divisor = uniphier_pxs2_debug_uart_init();
 		break;
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
-	case SOC_UNIPHIER_LD6B:
+	case UNIPHIER_LD6B_ID:
 		divisor = uniphier_ld6b_debug_uart_init();
 		break;
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20)
-	case SOC_UNIPHIER_LD11:
-	case SOC_UNIPHIER_LD20:
+	case UNIPHIER_LD11_ID:
+	case UNIPHIER_LD20_ID:
 		divisor = uniphier_ld20_debug_uart_init();
 		break;
 #endif
diff --git a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c
index 9730330738..d6d9db3e2c 100644
--- a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c
+++ b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c
@@ -245,17 +245,17 @@ static int do_ddr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	char *cmd = argv[1];
 	const struct phy_param *phy_param;
 
-	switch (uniphier_get_soc_type()) {
-	case SOC_UNIPHIER_LD4:
+	switch (uniphier_get_soc_id()) {
+	case UNIPHIER_LD4_ID:
 		phy_param = uniphier_ld4_phy_param;
 		break;
-	case SOC_UNIPHIER_PRO4:
+	case UNIPHIER_PRO4_ID:
 		phy_param = uniphier_pro4_phy_param;
 		break;
-	case SOC_UNIPHIER_SLD8:
+	case UNIPHIER_SLD8_ID:
 		phy_param = uniphier_sld8_phy_param;
 		break;
-	case SOC_UNIPHIER_LD11:
+	case UNIPHIER_LD11_ID:
 		phy_param = uniphier_ld11_phy_param;
 		break;
 	default:
diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c
index 87418f496e..2cf5f36e8b 100644
--- a/arch/arm/mach-uniphier/dram_init.c
+++ b/arch/arm/mach-uniphier/dram_init.c
@@ -97,7 +97,7 @@ int ft_board_setup(void *fdt, bd_t *bd)
 	const unsigned long rsv_size = 64;
 	int ch, ret;
 
-	if (uniphier_get_soc_type() != SOC_UNIPHIER_LD20)
+	if (uniphier_get_soc_id() != UNIPHIER_LD20_ID)
 		return 0;
 
 	param = uniphier_get_board_param();
diff --git a/arch/arm/mach-uniphier/sg-regs.h b/arch/arm/mach-uniphier/sg-regs.h
index a179d615be..4d7e6f7fa3 100644
--- a/arch/arm/mach-uniphier/sg-regs.h
+++ b/arch/arm/mach-uniphier/sg-regs.h
@@ -1,13 +1,15 @@
 /*
  * UniPhier SG (SoC Glue) block registers
  *
- * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2011-2015 Copyright (C) 2011-2015 Panasonic Corporation
+ * Copyright (C) 2016-2017 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#ifndef ARCH_SG_REGS_H
-#define ARCH_SG_REGS_H
+#ifndef UNIPHIER_SG_REGS_H
+#define UNIPHIER_SG_REGS_H
 
 /* Base Address */
 #define SG_CTRL_BASE			0x5f800000
@@ -15,12 +17,6 @@
 
 /* Revision */
 #define SG_REVISION			(SG_CTRL_BASE | 0x0000)
-#define SG_REVISION_TYPE_SHIFT		16
-#define SG_REVISION_TYPE_MASK		(0xff << SG_REVISION_TYPE_SHIFT)
-#define SG_REVISION_MODEL_SHIFT		8
-#define SG_REVISION_MODEL_MASK		(0x3 << SG_REVISION_MODEL_SHIFT)
-#define SG_REVISION_REV_SHIFT		0
-#define SG_REVISION_REV_MASK		(0x1f << SG_REVISION_REV_SHIFT)
 
 /* Memory Configuration */
 #define SG_MEMCONF			(SG_CTRL_BASE | 0x0400)
@@ -140,4 +136,4 @@ static inline void sg_set_iectrl_range(unsigned min, unsigned max)
 
 #endif /* __ASSEMBLY__ */
 
-#endif /* ARCH_SG_REGS_H */
+#endif /* UNIPHIER_SG_REGS_H */
diff --git a/arch/arm/mach-uniphier/soc-info.c b/arch/arm/mach-uniphier/soc-info.c
new file mode 100644
index 0000000000..baf1be6a01
--- /dev/null
+++ b/arch/arm/mach-uniphier/soc-info.c
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2017 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/io.h>
+#include <linux/types.h>
+
+#include "sg-regs.h"
+#include "soc-info.h"
+
+static unsigned int __uniphier_get_revision_field(unsigned int mask,
+						  unsigned int shift)
+{
+	u32 revision = readl(SG_REVISION);
+
+	return (revision >> shift) & mask;
+}
+
+unsigned int uniphier_get_soc_id(void)
+{
+	return __uniphier_get_revision_field(0xff, 16);
+}
+
+unsigned int uniphier_get_soc_model(void)
+{
+	return __uniphier_get_revision_field(0x3, 8);
+}
+
+unsigned int uniphier_get_soc_revision(void)
+{
+	return __uniphier_get_revision_field(0x1f, 0);
+}
diff --git a/arch/arm/mach-uniphier/soc-info.h b/arch/arm/mach-uniphier/soc-info.h
index d9b38b3d2d..b528fa96bd 100644
--- a/arch/arm/mach-uniphier/soc-info.h
+++ b/arch/arm/mach-uniphier/soc-info.h
@@ -1,76 +1,25 @@
 /*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2017 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#ifndef __MACH_SOC_INFO_H__
-#define __MACH_SOC_INFO_H__
+#ifndef __UNIPHIER_SOC_INFO_H__
+#define __UNIPHIER_SOC_INFO_H__
 
-enum uniphier_soc_id {
-	SOC_UNIPHIER_SLD3,
-	SOC_UNIPHIER_LD4,
-	SOC_UNIPHIER_PRO4,
-	SOC_UNIPHIER_SLD8,
-	SOC_UNIPHIER_PRO5,
-	SOC_UNIPHIER_PXS2,
-	SOC_UNIPHIER_LD6B,
-	SOC_UNIPHIER_LD11,
-	SOC_UNIPHIER_LD20,
-	SOC_UNIPHIER_UNKNOWN,
-};
+#define UNIPHIER_SLD3_ID	0x25
+#define UNIPHIER_LD4_ID		0x26
+#define UNIPHIER_PRO4_ID	0x28
+#define UNIPHIER_SLD8_ID	0x29
+#define UNIPHIER_PRO5_ID	0x2a
+#define UNIPHIER_PXS2_ID	0x2e
+#define UNIPHIER_LD6B_ID	0x2f
+#define UNIPHIER_LD11_ID	0x31
+#define UNIPHIER_LD20_ID	0x32
 
-#define UNIPHIER_NR_ENABLED_SOCS		\
-	IS_ENABLED(CONFIG_ARCH_UNIPHIER_SLD3) +	\
-	IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD4) +	\
-	IS_ENABLED(CONFIG_ARCH_UNIPHIER_PRO4) +	\
-	IS_ENABLED(CONFIG_ARCH_UNIPHIER_SLD8) +	\
-	IS_ENABLED(CONFIG_ARCH_UNIPHIER_PRO5) +	\
-	IS_ENABLED(CONFIG_ARCH_UNIPHIER_PXS2) +	\
-	IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD6B) + \
-	IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD11) + \
-	IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD20)
+unsigned int uniphier_get_soc_id(void);
+unsigned int uniphier_get_soc_model(void);
+unsigned int uniphier_get_soc_revision(void);
 
-#define UNIPHIER_MULTI_SOC	((UNIPHIER_NR_ENABLED_SOCS) > 1)
-
-#if UNIPHIER_MULTI_SOC
-enum uniphier_soc_id uniphier_get_soc_type(void);
-#else
-static inline enum uniphier_soc_id uniphier_get_soc_type(void)
-{
-#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
-	return SOC_UNIPHIER_SLD3;
-#endif
-#if defined(CONFIG_ARCH_UNIPHIER_LD4)
-	return SOC_UNIPHIER_LD4;
-#endif
-#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
-	return SOC_UNIPHIER_PRO4;
-#endif
-#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
-	return SOC_UNIPHIER_SLD8;
-#endif
-#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
-	return SOC_UNIPHIER_PRO5;
-#endif
-#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
-	return SOC_UNIPHIER_PXS2;
-#endif
-#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
-	return SOC_UNIPHIER_LD6B;
-#endif
-#if defined(CONFIG_ARCH_UNIPHIER_LD11)
-	return SOC_UNIPHIER_LD11;
-#endif
-#if defined(CONFIG_ARCH_UNIPHIER_LD20)
-	return SOC_UNIPHIER_LD20;
-#endif
-
-	return SOC_UNIPHIER_UNKNOWN;
-}
-#endif
-
-int uniphier_get_soc_model(void);
-int uniphier_get_soc_revision(void);
-
-#endif /* __MACH_SOC_INFO_H__ */
+#endif /* __UNIPHIER_SOC_INFO_H__ */
diff --git a/arch/arm/mach-uniphier/soc_info.c b/arch/arm/mach-uniphier/soc_info.c
deleted file mode 100644
index 046104bd78..0000000000
--- a/arch/arm/mach-uniphier/soc_info.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <linux/io.h>
-#include <linux/types.h>
-
-#include "sg-regs.h"
-#include "soc-info.h"
-
-#if UNIPHIER_MULTI_SOC
-enum uniphier_soc_id uniphier_get_soc_type(void)
-{
-	u32 revision = readl(SG_REVISION);
-	enum uniphier_soc_id ret;
-
-	switch ((revision & SG_REVISION_TYPE_MASK) >> SG_REVISION_TYPE_SHIFT) {
-#ifdef CONFIG_ARCH_UNIPHIER_SLD3
-	case 0x25:
-		ret = SOC_UNIPHIER_SLD3;
-		break;
-#endif
-#ifdef CONFIG_ARCH_UNIPHIER_LD4
-	case 0x26:
-		ret = SOC_UNIPHIER_LD4;
-		break;
-#endif
-#ifdef CONFIG_ARCH_UNIPHIER_PRO4
-	case 0x28:
-		ret = SOC_UNIPHIER_PRO4;
-		break;
-#endif
-#ifdef CONFIG_ARCH_UNIPHIER_SLD8
-	case 0x29:
-		ret = SOC_UNIPHIER_SLD8;
-		break;
-#endif
-#ifdef CONFIG_ARCH_UNIPHIER_PRO5
-	case 0x2A:
-		ret = SOC_UNIPHIER_PRO5;
-		break;
-#endif
-#ifdef CONFIG_ARCH_UNIPHIER_PXS2
-	case 0x2E:
-		ret = SOC_UNIPHIER_PXS2;
-		break;
-#endif
-#ifdef CONFIG_ARCH_UNIPHIER_LD6B
-	case 0x2F:
-		ret = SOC_UNIPHIER_LD6B;
-		break;
-#endif
-#ifdef CONFIG_ARCH_UNIPHIER_LD11
-	case 0x31:
-		ret = SOC_UNIPHIER_LD11;
-		break;
-#endif
-#ifdef CONFIG_ARCH_UNIPHIER_LD20
-	case 0x32:
-		ret = SOC_UNIPHIER_LD20;
-		break;
-#endif
-	default:
-		ret = SOC_UNIPHIER_UNKNOWN;
-		break;
-	}
-
-	return ret;
-}
-#endif
-
-int uniphier_get_soc_model(void)
-{
-	return (readl(SG_REVISION) & SG_REVISION_MODEL_MASK) >>
-						SG_REVISION_MODEL_SHIFT;
-}
-
-int uniphier_get_soc_revision(void)
-{
-	return (readl(SG_REVISION) & SG_REVISION_REV_MASK) >>
-						SG_REVISION_REV_SHIFT;
-}
diff --git a/arch/arm/mach-uniphier/spl_board_init.c b/arch/arm/mach-uniphier/spl_board_init.c
index f4e1cb9c66..83851ef7d6 100644
--- a/arch/arm/mach-uniphier/spl_board_init.c
+++ b/arch/arm/mach-uniphier/spl_board_init.c
@@ -14,7 +14,7 @@
 #include "soc-info.h"
 
 struct uniphier_spl_initdata {
-	enum uniphier_soc_id soc_id;
+	unsigned int soc_id;
 	void (*bcu_init)(const struct uniphier_board_data *bd);
 	void (*early_clk_init)(void);
 	int (*dpll_init)(const struct uniphier_board_data *bd);
@@ -26,7 +26,7 @@ struct uniphier_spl_initdata {
 static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
 	{
-		.soc_id = SOC_UNIPHIER_SLD3,
+		.soc_id = UNIPHIER_SLD3_ID,
 		.bcu_init = uniphier_sld3_bcu_init,
 		.early_clk_init = uniphier_sld3_early_clk_init,
 		.dpll_init = uniphier_sld3_dpll_init,
@@ -37,7 +37,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
 	{
-		.soc_id = SOC_UNIPHIER_LD4,
+		.soc_id = UNIPHIER_LD4_ID,
 		.bcu_init = uniphier_ld4_bcu_init,
 		.early_clk_init = uniphier_sld3_early_clk_init,
 		.dpll_init = uniphier_ld4_dpll_init,
@@ -48,7 +48,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
 	{
-		.soc_id = SOC_UNIPHIER_PRO4,
+		.soc_id = UNIPHIER_PRO4_ID,
 		.early_clk_init = uniphier_sld3_early_clk_init,
 		.dpll_init = uniphier_pro4_dpll_init,
 		.memconf_init = uniphier_memconf_2ch_init,
@@ -58,7 +58,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
 	{
-		.soc_id = SOC_UNIPHIER_SLD8,
+		.soc_id = UNIPHIER_SLD8_ID,
 		.bcu_init = uniphier_ld4_bcu_init,
 		.early_clk_init = uniphier_sld3_early_clk_init,
 		.dpll_init = uniphier_sld8_dpll_init,
@@ -69,7 +69,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
 	{
-		.soc_id = SOC_UNIPHIER_PRO5,
+		.soc_id = UNIPHIER_PRO5_ID,
 		.early_clk_init = uniphier_sld3_early_clk_init,
 		.dpll_init = uniphier_pro5_dpll_init,
 		.memconf_init = uniphier_memconf_2ch_init,
@@ -79,7 +79,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
 	{
-		.soc_id = SOC_UNIPHIER_PXS2,
+		.soc_id = UNIPHIER_PXS2_ID,
 		.early_clk_init = uniphier_sld3_early_clk_init,
 		.dpll_init = uniphier_pxs2_dpll_init,
 		.memconf_init = uniphier_memconf_3ch_init,
@@ -89,7 +89,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
 	{
-		.soc_id = SOC_UNIPHIER_LD6B,
+		.soc_id = UNIPHIER_LD6B_ID,
 		.early_clk_init = uniphier_sld3_early_clk_init,
 		.dpll_init = uniphier_pxs2_dpll_init,
 		.memconf_init = uniphier_memconf_3ch_init,
@@ -99,7 +99,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
 	{
-		.soc_id = SOC_UNIPHIER_LD11,
+		.soc_id = UNIPHIER_LD11_ID,
 		.early_clk_init = uniphier_ld11_early_clk_init,
 		.dpll_init = uniphier_ld11_dpll_init,
 		.memconf_init = uniphier_memconf_2ch_init,
@@ -109,7 +109,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
 	{
-		.soc_id = SOC_UNIPHIER_LD20,
+		.soc_id = UNIPHIER_LD20_ID,
 		.early_clk_init = uniphier_ld11_early_clk_init,
 		.dpll_init = uniphier_ld20_dpll_init,
 		.memconf_init = uniphier_memconf_3ch_init,
@@ -120,7 +120,7 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
 };
 
 static const struct uniphier_spl_initdata *uniphier_get_spl_initdata(
-						enum uniphier_soc_id soc_id)
+							unsigned int soc_id)
 {
 	int i;
 
@@ -136,7 +136,7 @@ void spl_board_init(void)
 {
 	const struct uniphier_board_data *bd;
 	const struct uniphier_spl_initdata *initdata;
-	enum uniphier_soc_id soc_id;
+	unsigned int soc_id;
 	int ret;
 
 #ifdef CONFIG_DEBUG_UART
@@ -147,7 +147,7 @@ void spl_board_init(void)
 	if (!bd)
 		hang();
 
-	soc_id = uniphier_get_soc_type();
+	soc_id = uniphier_get_soc_id();
 	initdata = uniphier_get_spl_initdata(soc_id);
 	if (!initdata)
 		hang();

From ee8ef5afa87bf37d493bf7be9d475e54d6c2ebee Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Sat, 21 Jan 2017 18:05:27 +0900
Subject: [PATCH 09/13] ARM: uniphier: add macro to generate SoC data look-up
 function

There are similar functions that look up SoC data by the SoC ID.
The new macro UNIPHIER_DEFINE_SOCDATA_FUNC will be helpful to
avoid the code duplication.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 arch/arm/mach-uniphier/board_init.c     | 20 +++-----------------
 arch/arm/mach-uniphier/soc-info.h       | 18 ++++++++++++++++++
 arch/arm/mach-uniphier/spl_board_init.c | 18 ++----------------
 3 files changed, 23 insertions(+), 33 deletions(-)

diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c
index 413b338228..ac7e3a6a95 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -169,32 +169,18 @@ static const struct uniphier_initdata uniphier_initdata[] = {
 	},
 #endif
 };
-
-static const struct uniphier_initdata *uniphier_get_initdata(
-							unsigned int soc_id)
-{
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(uniphier_initdata); i++) {
-		if (uniphier_initdata[i].soc_id == soc_id)
-			return &uniphier_initdata[i];
-	}
-
-	return NULL;
-}
+UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_initdata, uniphier_initdata)
 
 int board_init(void)
 {
 	const struct uniphier_initdata *initdata;
-	unsigned int soc_id;
 	int ret;
 
 	led_puts("U0");
 
-	soc_id = uniphier_get_soc_id();
-	initdata = uniphier_get_initdata(soc_id);
+	initdata = uniphier_get_initdata();
 	if (!initdata) {
-		pr_err("unsupported board\n");
+		pr_err("unsupported SoC\n");
 		return -EINVAL;
 	}
 
diff --git a/arch/arm/mach-uniphier/soc-info.h b/arch/arm/mach-uniphier/soc-info.h
index b528fa96bd..d7619f4aba 100644
--- a/arch/arm/mach-uniphier/soc-info.h
+++ b/arch/arm/mach-uniphier/soc-info.h
@@ -8,6 +8,9 @@
 #ifndef __UNIPHIER_SOC_INFO_H__
 #define __UNIPHIER_SOC_INFO_H__
 
+#include <linux/kernel.h>
+#include <linux/stddef.h>
+
 #define UNIPHIER_SLD3_ID	0x25
 #define UNIPHIER_LD4_ID		0x26
 #define UNIPHIER_PRO4_ID	0x28
@@ -22,4 +25,19 @@ unsigned int uniphier_get_soc_id(void);
 unsigned int uniphier_get_soc_model(void);
 unsigned int uniphier_get_soc_revision(void);
 
+#define UNIPHIER_DEFINE_SOCDATA_FUNC(__func_name, __table)	\
+static typeof(&__table[0]) __func_name(void)			\
+{								\
+	unsigned int soc_id;					\
+	int i;							\
+								\
+	soc_id = uniphier_get_soc_id();				\
+	for (i = 0; i < ARRAY_SIZE(__table); i++) {		\
+		if (__table[i].soc_id == soc_id)		\
+			return &__table[i];			\
+	}							\
+								\
+	return NULL;						\
+}
+
 #endif /* __UNIPHIER_SOC_INFO_H__ */
diff --git a/arch/arm/mach-uniphier/spl_board_init.c b/arch/arm/mach-uniphier/spl_board_init.c
index 83851ef7d6..da749a3d6d 100644
--- a/arch/arm/mach-uniphier/spl_board_init.c
+++ b/arch/arm/mach-uniphier/spl_board_init.c
@@ -118,25 +118,12 @@ static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
 	},
 #endif
 };
-
-static const struct uniphier_spl_initdata *uniphier_get_spl_initdata(
-							unsigned int soc_id)
-{
-	int i;
-
-	for (i = 0; i < ARRAY_SIZE(uniphier_spl_initdata); i++) {
-		if (uniphier_spl_initdata[i].soc_id == soc_id)
-			return &uniphier_spl_initdata[i];
-	}
-
-	return NULL;
-}
+UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_spl_initdata, uniphier_spl_initdata)
 
 void spl_board_init(void)
 {
 	const struct uniphier_board_data *bd;
 	const struct uniphier_spl_initdata *initdata;
-	unsigned int soc_id;
 	int ret;
 
 #ifdef CONFIG_DEBUG_UART
@@ -147,8 +134,7 @@ void spl_board_init(void)
 	if (!bd)
 		hang();
 
-	soc_id = uniphier_get_soc_id();
-	initdata = uniphier_get_spl_initdata(soc_id);
+	initdata = uniphier_get_spl_initdata();
 	if (!initdata)
 		hang();
 

From 132efa562cc5e76f572d2debbbe936c9a000a161 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Sat, 21 Jan 2017 18:05:28 +0900
Subject: [PATCH 10/13] ARM: dts: uniphier: compile only DT files that make
 sense

All the UniPhier DT files are compiled if CONFIG_ARCH_UNIPHIER
is enabled, but not all of them actually work.  For example, when
U-Boot is compiled for ARM 32 bit, 64 bit DT files are also built,
and vice versa.  Compile only the combination that makes sense.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 arch/arm/dts/Makefile | 27 ++++++++++++++++++---------
 1 file changed, 18 insertions(+), 9 deletions(-)

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 66ea0b33d5..3dbbaa7a06 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -81,19 +81,28 @@ dtb-$(CONFIG_ARCH_MVEBU) +=			\
 	armada-xp-synology-ds414.dtb		\
 	armada-xp-theadorable.dtb
 
-dtb-$(CONFIG_ARCH_UNIPHIER) += \
-	uniphier-ld11-ref.dtb \
-	uniphier-ld20-ref.dtb \
-	uniphier-ld4-ref.dtb \
-	uniphier-ld6b-ref.dtb \
+dtb-$(CONFIG_ARCH_UNIPHIER_LD11) += \
+	uniphier-ld11-ref.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_LD20) += \
+	uniphier-ld20-ref.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_LD4) += \
+	uniphier-ld4-ref.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_LD6B) += \
+	uniphier-ld6b-ref.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_PRO4) += \
 	uniphier-pro4-ace.dtb \
 	uniphier-pro4-ref.dtb \
-	uniphier-pro4-sanji.dtb \
-	uniphier-pro5-4kbox.dtb \
+	uniphier-pro4-sanji.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_PRO5) += \
+	uniphier-pro5-4kbox.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_PXS2) += \
 	uniphier-pxs2-gentil.dtb \
-	uniphier-pxs2-vodka.dtb \
-	uniphier-sld3-ref.dtb \
+	uniphier-pxs2-vodka.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_SLD3) += \
+	uniphier-sld3-ref.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
 	uniphier-sld8-ref.dtb
+
 dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
 	zynq-zc706.dtb \
 	zynq-zed.dtb \

From 7434bfa0e32c3c612f709d5736c5d4199a68f25f Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Sat, 21 Jan 2017 18:05:29 +0900
Subject: [PATCH 11/13] pinctrl: uniphier: support UniPhier PXs3 pinctrl driver

Add pin configuration and pinmux support for UniPhier PXs3 SoC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 drivers/pinctrl/uniphier/Kconfig              |  24 +--
 drivers/pinctrl/uniphier/Makefile             |   1 +
 .../pinctrl/uniphier/pinctrl-uniphier-pxs3.c  | 140 ++++++++++++++++++
 3 files changed, 156 insertions(+), 9 deletions(-)
 create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c

diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig
index 689e576566..a6e51caba5 100644
--- a/drivers/pinctrl/uniphier/Kconfig
+++ b/drivers/pinctrl/uniphier/Kconfig
@@ -4,57 +4,63 @@ config PINCTRL_UNIPHIER
 	bool
 
 config PINCTRL_UNIPHIER_SLD3
-	bool "UniPhier PH1-sLD3 SoC pinctrl driver"
+	bool "UniPhier sLD3 SoC pinctrl driver"
 	depends on ARCH_UNIPHIER_SLD3
 	default y
 	select PINCTRL_UNIPHIER
 
 config PINCTRL_UNIPHIER_LD4
-	bool "UniPhier PH1-LD4 SoC pinctrl driver"
+	bool "UniPhier LD4 SoC pinctrl driver"
 	depends on ARCH_UNIPHIER_LD4
 	default y
 	select PINCTRL_UNIPHIER
 
 config PINCTRL_UNIPHIER_PRO4
-	bool "UniPhier PH1-Pro4 SoC pinctrl driver"
+	bool "UniPhier Pro4 SoC pinctrl driver"
 	depends on ARCH_UNIPHIER_PRO4
 	default y
 	select PINCTRL_UNIPHIER
 
 config PINCTRL_UNIPHIER_SLD8
-	bool "UniPhier PH1-sLD8 SoC pinctrl driver"
+	bool "UniPhier sLD8 SoC pinctrl driver"
 	depends on ARCH_UNIPHIER_SLD8
 	default y
 	select PINCTRL_UNIPHIER
 
 config PINCTRL_UNIPHIER_PRO5
-	bool "UniPhier PH1-Pro5 SoC pinctrl driver"
+	bool "UniPhier Pro5 SoC pinctrl driver"
 	depends on ARCH_UNIPHIER_PRO5
 	default y
 	select PINCTRL_UNIPHIER
 
 config PINCTRL_UNIPHIER_PXS2
-	bool "UniPhier ProXstream2 SoC pinctrl driver"
+	bool "UniPhier PXs2 SoC pinctrl driver"
 	depends on ARCH_UNIPHIER_PXS2
 	default y
 	select PINCTRL_UNIPHIER
 
 config PINCTRL_UNIPHIER_LD6B
-	bool "UniPhier PH1-LD6b SoC pinctrl driver"
+	bool "UniPhier LD6b SoC pinctrl driver"
 	depends on ARCH_UNIPHIER_LD6B
 	default y
 	select PINCTRL_UNIPHIER
 
 config PINCTRL_UNIPHIER_LD11
-	bool "UniPhier PH1-LD11 SoC pinctrl driver"
+	bool "UniPhier LD11 SoC pinctrl driver"
 	depends on ARCH_UNIPHIER_LD11
 	default y
 	select PINCTRL_UNIPHIER
 
 config PINCTRL_UNIPHIER_LD20
-	bool "UniPhier PH1-LD20 SoC pinctrl driver"
+	bool "UniPhier LD20 SoC pinctrl driver"
 	depends on ARCH_UNIPHIER_LD20
 	default y
 	select PINCTRL_UNIPHIER
 
+config PINCTRL_UNIPHIER_PXS3
+	bool "UniPhier PXs3 SoC pinctrl driver"
+	depends on ARCH_UNIPHIER_PXS3
+	default y
+	select PINCTRL_UNIPHIER
+
 endif
diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile
index fd003ad199..b805765ed1 100644
--- a/drivers/pinctrl/uniphier/Makefile
+++ b/drivers/pinctrl/uniphier/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER_PXS2)	+= pinctrl-uniphier-pxs2.o
 obj-$(CONFIG_PINCTRL_UNIPHIER_LD6B)	+= pinctrl-uniphier-ld6b.o
 obj-$(CONFIG_PINCTRL_UNIPHIER_LD11)	+= pinctrl-uniphier-ld11.o
 obj-$(CONFIG_PINCTRL_UNIPHIER_LD20)	+= pinctrl-uniphier-ld20.o
+obj-$(CONFIG_PINCTRL_UNIPHIER_PXS3)	+= pinctrl-uniphier-pxs3.o
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c
new file mode 100644
index 0000000000..65b56dac3f
--- /dev/null
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (C) 2017 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dm/device.h>
+#include <dm/pinctrl.h>
+
+#include "pinctrl-uniphier.h"
+
+static const unsigned emmc_pins[] = {31, 32, 33, 34, 35, 36, 37, 38};
+static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned emmc_dat8_pins[] = {39, 40, 41, 42};
+static const int emmc_dat8_muxvals[] = {0, 0, 0, 0};
+static const unsigned ether_rgmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 60,
+					    61, 62, 63, 64, 65, 66, 67};
+static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+					  0, 0, 0, 0};
+static const unsigned ether_rmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 61,
+					   63, 64, 67};
+static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1};
+static const unsigned ether1_rgmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 76,
+					     77, 78, 79, 80, 81, 82, 83};
+static const int ether1_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+					   0, 0, 0, 0};
+static const unsigned ether1_rmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 77,
+					    79, 80, 83};
+static const int ether1_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1};
+static const unsigned i2c0_pins[] = {104, 105};
+static const int i2c0_muxvals[] = {0, 0};
+static const unsigned i2c1_pins[] = {106, 107};
+static const int i2c1_muxvals[] = {0, 0};
+static const unsigned i2c2_pins[] = {108, 109};
+static const int i2c2_muxvals[] = {0, 0};
+static const unsigned i2c3_pins[] = {110, 111};
+static const int i2c3_muxvals[] = {0, 0};
+static const unsigned nand_pins[] = {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26,
+				     27, 28, 29, 30};
+static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned sd_pins[] = {43, 44, 45, 46, 47, 48, 49, 50, 51};
+static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
+static const unsigned system_bus_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
+					   12, 13, 14};
+static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+					 0};
+static const unsigned system_bus_cs1_pins[] = {15};
+static const int system_bus_cs1_muxvals[] = {0};
+static const unsigned uart0_pins[] = {92, 93};
+static const int uart0_muxvals[] = {0, 0};
+static const unsigned uart1_pins[] = {94, 95};
+static const int uart1_muxvals[] = {0, 0};
+static const unsigned uart2_pins[] = {96, 97};
+static const int uart2_muxvals[] = {0, 0};
+static const unsigned uart3_pins[] = {98, 99};
+static const int uart3_muxvals[] = {0, 0};
+static const unsigned usb0_pins[] = {84, 85};
+static const int usb0_muxvals[] = {0, 0};
+static const unsigned usb1_pins[] = {86, 87};
+static const int usb1_muxvals[] = {0, 0};
+static const unsigned usb2_pins[] = {88, 89};
+static const int usb2_muxvals[] = {0, 0};
+static const unsigned usb3_pins[] = {90, 91};
+static const int usb3_muxvals[] = {0, 0};
+
+static const struct uniphier_pinctrl_group uniphier_pxs3_groups[] = {
+	UNIPHIER_PINCTRL_GROUP(emmc),
+	UNIPHIER_PINCTRL_GROUP(emmc_dat8),
+	UNIPHIER_PINCTRL_GROUP(ether_rgmii),
+	UNIPHIER_PINCTRL_GROUP(ether_rmii),
+	UNIPHIER_PINCTRL_GROUP(ether1_rgmii),
+	UNIPHIER_PINCTRL_GROUP(ether1_rmii),
+	UNIPHIER_PINCTRL_GROUP(i2c0),
+	UNIPHIER_PINCTRL_GROUP(i2c1),
+	UNIPHIER_PINCTRL_GROUP(i2c2),
+	UNIPHIER_PINCTRL_GROUP(i2c3),
+	UNIPHIER_PINCTRL_GROUP(nand),
+	UNIPHIER_PINCTRL_GROUP(sd),
+	UNIPHIER_PINCTRL_GROUP_SPL(system_bus),
+	UNIPHIER_PINCTRL_GROUP_SPL(system_bus_cs1),
+	UNIPHIER_PINCTRL_GROUP_SPL(uart0),
+	UNIPHIER_PINCTRL_GROUP_SPL(uart1),
+	UNIPHIER_PINCTRL_GROUP_SPL(uart2),
+	UNIPHIER_PINCTRL_GROUP_SPL(uart3),
+	UNIPHIER_PINCTRL_GROUP(usb0),
+	UNIPHIER_PINCTRL_GROUP(usb1),
+	UNIPHIER_PINCTRL_GROUP(usb2),
+	UNIPHIER_PINCTRL_GROUP(usb3),
+};
+
+static const char * const uniphier_pxs3_functions[] = {
+	UNIPHIER_PINMUX_FUNCTION(emmc),
+	UNIPHIER_PINMUX_FUNCTION(ether_rgmii),
+	UNIPHIER_PINMUX_FUNCTION(ether_rmii),
+	UNIPHIER_PINMUX_FUNCTION(ether1_rgmii),
+	UNIPHIER_PINMUX_FUNCTION(ether1_rmii),
+	UNIPHIER_PINMUX_FUNCTION(i2c0),
+	UNIPHIER_PINMUX_FUNCTION(i2c1),
+	UNIPHIER_PINMUX_FUNCTION(i2c2),
+	UNIPHIER_PINMUX_FUNCTION(i2c3),
+	UNIPHIER_PINMUX_FUNCTION(nand),
+	UNIPHIER_PINMUX_FUNCTION(sd),
+	UNIPHIER_PINMUX_FUNCTION_SPL(system_bus),
+	UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
+	UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
+	UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
+	UNIPHIER_PINMUX_FUNCTION_SPL(uart3),
+	UNIPHIER_PINMUX_FUNCTION(usb0),
+	UNIPHIER_PINMUX_FUNCTION(usb1),
+	UNIPHIER_PINMUX_FUNCTION(usb2),
+	UNIPHIER_PINMUX_FUNCTION(usb3),
+};
+
+static struct uniphier_pinctrl_socdata uniphier_pxs3_pinctrl_socdata = {
+	.groups = uniphier_pxs3_groups,
+	.groups_count = ARRAY_SIZE(uniphier_pxs3_groups),
+	.functions = uniphier_pxs3_functions,
+	.functions_count = ARRAY_SIZE(uniphier_pxs3_functions),
+	.caps = UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL,
+};
+
+static int uniphier_pxs3_pinctrl_probe(struct udevice *dev)
+{
+	return uniphier_pinctrl_probe(dev, &uniphier_pxs3_pinctrl_socdata);
+}
+
+static const struct udevice_id uniphier_pxs3_pinctrl_match[] = {
+	{ .compatible = "socionext,uniphier-pxs3-pinctrl" },
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(uniphier_pxs3_pinctrl) = {
+	.name = "uniphier-pxs3-pinctrl",
+	.id = UCLASS_PINCTRL,
+	.of_match = of_match_ptr(uniphier_pxs3_pinctrl_match),
+	.probe = uniphier_pxs3_pinctrl_probe,
+	.priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv),
+	.ops = &uniphier_pinctrl_ops,
+};

From 61e6cc0aa191f7edecbbe1573f1f8b8216f613cd Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Sat, 21 Jan 2017 18:05:30 +0900
Subject: [PATCH 12/13] ARM: dts: uniphier: add PXs3 SoC/board support

Initial commit for the PXs3 SoC DT.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 arch/arm/dts/Makefile              |   2 +
 arch/arm/dts/uniphier-pxs3-ref.dts |  51 +++++
 arch/arm/dts/uniphier-pxs3.dtsi    | 328 +++++++++++++++++++++++++++++
 3 files changed, 381 insertions(+)
 create mode 100644 arch/arm/dts/uniphier-pxs3-ref.dts
 create mode 100644 arch/arm/dts/uniphier-pxs3.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 3dbbaa7a06..6a7924e52d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -98,6 +98,8 @@ dtb-$(CONFIG_ARCH_UNIPHIER_PRO5) += \
 dtb-$(CONFIG_ARCH_UNIPHIER_PXS2) += \
 	uniphier-pxs2-gentil.dtb \
 	uniphier-pxs2-vodka.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER_PXS3) += \
+	uniphier-pxs3-ref.dtb
 dtb-$(CONFIG_ARCH_UNIPHIER_SLD3) += \
 	uniphier-sld3-ref.dtb
 dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
diff --git a/arch/arm/dts/uniphier-pxs3-ref.dts b/arch/arm/dts/uniphier-pxs3-ref.dts
new file mode 100644
index 0000000000..27f0cb08b9
--- /dev/null
+++ b/arch/arm/dts/uniphier-pxs3-ref.dts
@@ -0,0 +1,51 @@
+/*
+ * Device Tree Source for UniPhier PXs3 Reference Board
+ *
+ * Copyright (C) 2017 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+	X11
+ */
+
+/dts-v1/;
+/include/ "uniphier-pxs3.dtsi"
+/include/ "uniphier-ref-daughter.dtsi"
+/include/ "uniphier-support-card.dtsi"
+
+/ {
+	model = "UniPhier PXs3 Reference Board";
+	compatible = "socionext,uniphier-pxs3-ref", "socionext,uniphier-pxs3";
+
+	aliases {
+		serial0 = &serial0;
+		serial1 = &serial1;
+		serial2 = &serial2;
+		serial3 = &serial3;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c6 = &i2c6;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x80000000 0 0xa0000000>;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&ethsc {
+	interrupts = <0 48 4>;
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
new file mode 100644
index 0000000000..3b30eeff3f
--- /dev/null
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -0,0 +1,328 @@
+/*
+ * Device Tree Source for UniPhier PXs3 SoC
+ *
+ * Copyright (C) 2017 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+	X11
+ */
+
+/memreserve/ 0x80000000 0x00080000;
+
+/ {
+	compatible = "socionext,uniphier-pxs3";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	interrupt-parent = <&gic>;
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&cpu0>;
+				};
+				core1 {
+					cpu = <&cpu1>;
+				};
+				core2 {
+					cpu = <&cpu2>;
+				};
+				core3 {
+					cpu = <&cpu3>;
+				};
+			};
+		};
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0 0x000>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0 0x001>;
+			enable-method = "psci";
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0 0x002>;
+			enable-method = "psci";
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0 0x003>;
+			enable-method = "psci";
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+	};
+
+	clocks {
+		refclk: ref {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <25000000>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <1 13 4>,
+			     <1 14 4>,
+			     <1 11 4>,
+			     <1 10 4>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		serial0: serial@54006800 {
+			compatible = "socionext,uniphier-uart";
+			status = "disabled";
+			reg = <0x54006800 0x40>;
+			interrupts = <0 33 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_uart0>;
+			clocks = <&peri_clk 0>;
+			clock-frequency = <58820000>;
+		};
+
+		serial1: serial@54006900 {
+			compatible = "socionext,uniphier-uart";
+			status = "disabled";
+			reg = <0x54006900 0x40>;
+			interrupts = <0 35 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_uart1>;
+			clocks = <&peri_clk 1>;
+			clock-frequency = <58820000>;
+		};
+
+		serial2: serial@54006a00 {
+			compatible = "socionext,uniphier-uart";
+			status = "disabled";
+			reg = <0x54006a00 0x40>;
+			interrupts = <0 37 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_uart2>;
+			clocks = <&peri_clk 2>;
+			clock-frequency = <58820000>;
+		};
+
+		serial3: serial@54006b00 {
+			compatible = "socionext,uniphier-uart";
+			status = "disabled";
+			reg = <0x54006b00 0x40>;
+			interrupts = <0 177 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_uart3>;
+			clocks = <&peri_clk 3>;
+			clock-frequency = <58820000>;
+		};
+
+		i2c0: i2c@58780000 {
+			compatible = "socionext,uniphier-fi2c";
+			status = "disabled";
+			reg = <0x58780000 0x80>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <0 41 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_i2c0>;
+			clocks = <&peri_clk 4>;
+			clock-frequency = <100000>;
+		};
+
+		i2c1: i2c@58781000 {
+			compatible = "socionext,uniphier-fi2c";
+			status = "disabled";
+			reg = <0x58781000 0x80>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <0 42 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_i2c1>;
+			clocks = <&peri_clk 5>;
+			clock-frequency = <100000>;
+		};
+
+		i2c2: i2c@58782000 {
+			compatible = "socionext,uniphier-fi2c";
+			status = "disabled";
+			reg = <0x58782000 0x80>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <0 43 4>;
+			clocks = <&peri_clk 6>;
+			clock-frequency = <100000>;
+		};
+
+		i2c3: i2c@58783000 {
+			compatible = "socionext,uniphier-fi2c";
+			status = "disabled";
+			reg = <0x58783000 0x80>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <0 44 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_i2c3>;
+			clocks = <&peri_clk 7>;
+			clock-frequency = <100000>;
+		};
+
+		/* chip-internal connection for HDMI */
+		i2c6: i2c@58786000 {
+			compatible = "socionext,uniphier-fi2c";
+			reg = <0x58786000 0x80>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <0 26 4>;
+			clocks = <&peri_clk 10>;
+			clock-frequency = <400000>;
+		};
+
+		system_bus: system-bus@58c00000 {
+			compatible = "socionext,uniphier-system-bus";
+			status = "disabled";
+			reg = <0x58c00000 0x400>;
+			#address-cells = <2>;
+			#size-cells = <1>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_system_bus>;
+		};
+
+		smpctrl@59800000 {
+			compatible = "socionext,uniphier-smpctrl";
+			reg = <0x59801000 0x400>;
+		};
+
+		sdctrl@59810000 {
+			compatible = "socionext,uniphier-pxs3-sdctrl",
+				     "simple-mfd", "syscon";
+			reg = <0x59810000 0x800>;
+
+			sd_clk: clock {
+				compatible = "socionext,uniphier-pxs3-sd-clock";
+				#clock-cells = <1>;
+			};
+
+			sd_rst: reset {
+				compatible = "socionext,uniphier-pxs3-sd-reset";
+				#reset-cells = <1>;
+			};
+		};
+
+		perictrl@59820000 {
+			compatible = "socionext,uniphier-pxs3-perictrl",
+				     "simple-mfd", "syscon";
+			reg = <0x59820000 0x200>;
+
+			peri_clk: clock {
+				compatible = "socionext,uniphier-pxs3-peri-clock";
+				#clock-cells = <1>;
+			};
+
+			peri_rst: reset {
+				compatible = "socionext,uniphier-pxs3-peri-reset";
+				#reset-cells = <1>;
+			};
+		};
+
+		emmc: sdhc@5a000000 {
+			compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
+			status = "disabled";
+			reg = <0x5a000000 0x400>;
+			interrupts = <0 78 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_emmc_1v8>;
+			clocks = <&sys_clk 4>;
+			bus-width = <8>;
+			mmc-ddr-1_8v;
+			mmc-hs200-1_8v;
+		};
+
+		sd: sdhc@5a400000 {
+			compatible = "socionext,uniphier-sdhc";
+			status = "disabled";
+			reg = <0x5a400000 0x800>;
+			interrupts = <0 76 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_sd>;
+			clocks = <&sd_clk 0>;
+			reset-names = "host";
+			resets = <&sd_rst 0>;
+			bus-width = <4>;
+			cap-sd-highspeed;
+		};
+
+		soc-glue@5f800000 {
+			compatible = "socionext,uniphier-pxs3-soc-glue",
+				     "simple-mfd", "syscon";
+			reg = <0x5f800000 0x2000>;
+
+			pinctrl: pinctrl {
+				compatible = "socionext,uniphier-pxs3-pinctrl";
+			};
+		};
+
+		aidet@5fc20000 {
+			compatible = "simple-mfd", "syscon";
+			reg = <0x5fc20000 0x200>;
+		};
+
+		gic: interrupt-controller@5fe00000 {
+			compatible = "arm,gic-v3";
+			reg = <0x5fe00000 0x10000>,	/* GICD */
+			      <0x5fe80000 0x80000>;	/* GICR */
+			interrupt-controller;
+			#interrupt-cells = <3>;
+			interrupts = <1 9 4>;
+		};
+
+		sysctrl@61840000 {
+			compatible = "socionext,uniphier-pxs3-sysctrl",
+				     "simple-mfd", "syscon";
+			reg = <0x61840000 0x10000>;
+
+			sys_clk: clock {
+				compatible = "socionext,uniphier-pxs3-clock";
+				#clock-cells = <1>;
+			};
+
+			sys_rst: reset {
+				compatible = "socionext,uniphier-pxs3-reset";
+				#reset-cells = <1>;
+			};
+		};
+
+		nand: nand@68000000 {
+			compatible = "socionext,denali-nand-v5b";
+			status = "disabled";
+			reg-names = "nand_data", "denali_reg";
+			reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+			interrupts = <0 65 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_nand>;
+			clocks = <&sys_clk 2>;
+			nand-ecc-strength = <8>;
+		};
+	};
+};
+
+/include/ "uniphier-pinctrl.dtsi"

From 2c2ab3d495a1a9fbfcec58f469255595a86e3aad Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Sat, 21 Jan 2017 18:05:31 +0900
Subject: [PATCH 13/13] ARM: uniphier: add PXs3 SoC support

Initial support for PXs3 SoC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 arch/arm/mach-uniphier/Kconfig        | 5 +++++
 arch/arm/mach-uniphier/board_init.c   | 8 ++++++++
 arch/arm/mach-uniphier/clk/Makefile   | 1 +
 arch/arm/mach-uniphier/clk/pll-pxs3.c | 7 +++++++
 arch/arm/mach-uniphier/cpu-info.c     | 3 +++
 arch/arm/mach-uniphier/init.h         | 1 +
 arch/arm/mach-uniphier/sbc/Makefile   | 1 +
 arch/arm/mach-uniphier/soc-info.h     | 1 +
 doc/README.uniphier                   | 4 ++++
 9 files changed, 31 insertions(+)
 create mode 100644 arch/arm/mach-uniphier/clk/pll-pxs3.c

diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index e732ac1bfa..cd9ba6ba9e 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -88,6 +88,11 @@ config ARCH_UNIPHIER_LD20
 	select OF_BOARD_SETUP
 	default y
 
+config ARCH_UNIPHIER_PXS3
+	bool "Enable UniPhier PXs3 SoC support"
+	depends on ARCH_UNIPHIER_V8_MULTI
+	default y
+
 config CACHE_UNIPHIER
 	bool "Enable the UniPhier L2 cache controller"
 	depends on ARCH_UNIPHIER_32BIT
diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c
index ac7e3a6a95..e89a4c59e2 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -168,6 +168,14 @@ static const struct uniphier_initdata uniphier_initdata[] = {
 		.misc_init = uniphier_ld20_misc_init,
 	},
 #endif
+#if defined(CONFIG_ARCH_UNIPHIER_PXS3)
+	{
+		.soc_id = UNIPHIER_PXS3_ID,
+		.nand_2cs = false,
+		.sbc_init = uniphier_pxs2_sbc_init,
+		.pll_init = uniphier_pxs3_pll_init,
+	},
+#endif
 };
 UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_initdata, uniphier_initdata)
 
diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile
index 37df04b12e..43df670ca0 100644
--- a/arch/arm/mach-uniphier/clk/Makefile
+++ b/arch/arm/mach-uniphier/clk/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_ARCH_UNIPHIER_PXS2)	+= clk-pxs2.o
 obj-$(CONFIG_ARCH_UNIPHIER_LD6B)	+= clk-pxs2.o
 obj-$(CONFIG_ARCH_UNIPHIER_LD11)	+= clk-ld11.o pll-ld11.o
 obj-$(CONFIG_ARCH_UNIPHIER_LD20)	+= pll-ld20.o
+obj-$(CONFIG_ARCH_UNIPHIER_PXS3)	+= pll-pxs3.o
 
 endif
 
diff --git a/arch/arm/mach-uniphier/clk/pll-pxs3.c b/arch/arm/mach-uniphier/clk/pll-pxs3.c
new file mode 100644
index 0000000000..e29d9d0001
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/pll-pxs3.c
@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+void uniphier_pxs3_pll_init(void)
+{
+}
diff --git a/arch/arm/mach-uniphier/cpu-info.c b/arch/arm/mach-uniphier/cpu-info.c
index a9c8167f3e..94dce7c90d 100644
--- a/arch/arm/mach-uniphier/cpu-info.c
+++ b/arch/arm/mach-uniphier/cpu-info.c
@@ -52,6 +52,9 @@ int print_cpuinfo(void)
 	case UNIPHIER_LD20_ID:
 		puts("LD20 (SC1401AJ1)");
 		break;
+	case UNIPHIER_PXS3_ID:
+		puts("PXs3");
+		break;
 	default:
 		printf("Unknown Processor ID (0x%x)\n", id);
 		return -ENOTSUPP;
diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h
index d207806401..3aeb5b1079 100644
--- a/arch/arm/mach-uniphier/init.h
+++ b/arch/arm/mach-uniphier/init.h
@@ -112,6 +112,7 @@ void uniphier_ld4_pll_init(void);
 void uniphier_pro4_pll_init(void);
 void uniphier_ld11_pll_init(void);
 void uniphier_ld20_pll_init(void);
+void uniphier_pxs3_pll_init(void);
 
 void uniphier_ld4_clk_init(void);
 void uniphier_pro4_clk_init(void);
diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile
index b85b1fe87b..fe9d85a8f2 100644
--- a/arch/arm/mach-uniphier/sbc/Makefile
+++ b/arch/arm/mach-uniphier/sbc/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_ARCH_UNIPHIER_PXS2)	+= sbc-pxs2.o
 obj-$(CONFIG_ARCH_UNIPHIER_LD6B)	+= sbc-pxs2.o
 obj-$(CONFIG_ARCH_UNIPHIER_LD11)	+= sbc-ld11.o
 obj-$(CONFIG_ARCH_UNIPHIER_LD20)	+= sbc-ld11.o
+obj-$(CONFIG_ARCH_UNIPHIER_PXS3)	+= sbc-pxs2.o
diff --git a/arch/arm/mach-uniphier/soc-info.h b/arch/arm/mach-uniphier/soc-info.h
index d7619f4aba..04732527a7 100644
--- a/arch/arm/mach-uniphier/soc-info.h
+++ b/arch/arm/mach-uniphier/soc-info.h
@@ -20,6 +20,7 @@
 #define UNIPHIER_LD6B_ID	0x2f
 #define UNIPHIER_LD11_ID	0x31
 #define UNIPHIER_LD20_ID	0x32
+#define UNIPHIER_PXS3_ID	0x35
 
 unsigned int uniphier_get_soc_id(void);
 unsigned int uniphier_get_soc_model(void);
diff --git a/doc/README.uniphier b/doc/README.uniphier
index a42eaa9761..539b1f20a1 100644
--- a/doc/README.uniphier
+++ b/doc/README.uniphier
@@ -62,6 +62,10 @@ LD20 reference board:
     $ make uniphier_ld20_defconfig
     $ make CROSS_COMPILE=aarch64-linux-gnu-
 
+PXs3 reference board:
+    $ make uniphier_v8_defconfig
+    $ make CROSS_COMPILE=aarch64-linux-gnu- DEVICE_TREE=uniphier-pxs3-ref
+
 You may wish to change the "CROSS_COMPILE=..." to use your favorite compiler.