diff --git a/drivers/net/ipq9574/ipq9574_ppe.c b/drivers/net/ipq9574/ipq9574_ppe.c index 4eb6d2c243..5a46958b3f 100644 --- a/drivers/net/ipq9574/ipq9574_ppe.c +++ b/drivers/net/ipq9574/ipq9574_ppe.c @@ -627,6 +627,36 @@ static void ipq9574_ppe_tdm_configuration(void) ipq9574_ppe_reg_write(0xb000, 0x80000076); } +/* + * ipq9574_ppe_queue_ac_enable + */ +static void ipq9574_ppe_queue_ac_enable(void) +{ + int i; + + /* ucast queue */ + for (i = 0; i < 256; i++) { + ipq9574_ppe_reg_write(IPQ9574_PPE_UCAST_QUEUE_AC_EN_BASE_ADDR + + (i * 0x10), 0x32120001); + ipq9574_ppe_reg_write(IPQ9574_PPE_UCAST_QUEUE_AC_EN_BASE_ADDR + + (i * 0x10) + 0x4, 0x0); + ipq9574_ppe_reg_write(IPQ9574_PPE_UCAST_QUEUE_AC_EN_BASE_ADDR + + (i * 0x10) + 0x8, 0x0); + ipq9574_ppe_reg_write(IPQ9574_PPE_UCAST_QUEUE_AC_EN_BASE_ADDR + + (i * 0x10) + 0xc, 0x48000); + } + + /* mcast queue */ + for (i = 0; i < 44; i++) { + ipq9574_ppe_reg_write(IPQ9574_PPE_MCAST_QUEUE_AC_EN_BASE_ADDR + + (i * 0x10), 0x00fa0001); + ipq9574_ppe_reg_write(IPQ9574_PPE_MCAST_QUEUE_AC_EN_BASE_ADDR + + (i * 0x10) + 0x4, 0x0); + ipq9574_ppe_reg_write(IPQ9574_PPE_MCAST_QUEUE_AC_EN_BASE_ADDR + + (i * 0x10) + 0x8, 0x1200); + } +} + /* * ipq9574_ppe_c_sp_cfg_tbl_drr_id_set */ @@ -848,6 +878,18 @@ void ipq9574_ppe_provision_init(void) ipq9574_ppe_reg_write(0x403100 + ((i - 1) * 0x40), 0x401000 | i); } + /* ac enable for queues - disable queue tail drop */ + ipq9574_ppe_queue_ac_enable(); + + /* enable queue counter */ + ipq9574_ppe_reg_write(0x020044,0x4); + + /* assign the ac group 0 with buffer number */ + ipq9574_ppe_reg_write(0x84c000, 0x0); + ipq9574_ppe_reg_write(0x84c004, 0x7D00); + ipq9574_ppe_reg_write(0x84c008, 0x0); + ipq9574_ppe_reg_write(0x84c00c, 0x0); + /* * Port0 - Port7 learn enable and isolation port bitmap and TX_EN * Here please pay attention on bit16 (TX_EN) is not set on port7 diff --git a/drivers/net/ipq9574/ipq9574_ppe.h b/drivers/net/ipq9574/ipq9574_ppe.h index 9e0a8d953e..74f48c5062 100644 --- a/drivers/net/ipq9574/ipq9574_ppe.h +++ b/drivers/net/ipq9574/ipq9574_ppe.h @@ -131,6 +131,8 @@ union ipo_action_u { #define IPQ9574_PPE_L3_VP_PORT_TBL_ADDR (IPQ9574_PPE_IPE_L3_BASE_ADDR + 0x4000) #define IPQ9574_PPE_L3_VP_PORT_TBL_INC 0x10 +#define IPQ9574_PPE_UCAST_QUEUE_AC_EN_BASE_ADDR 0x848000 +#define IPQ9574_PPE_MCAST_QUEUE_AC_EN_BASE_ADDR 0x84a000 #define IPQ9574_PPE_QUEUE_MANAGER_BASE_ADDR 0x800000 #define IPQ9574_PPE_UCAST_QUEUE_MAP_TBL_ADDR 0x10000 #define IPQ9574_PPE_UCAST_QUEUE_MAP_TBL_INC 0x10