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https://github.com/plappermaul/realtek-doc.git
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366 lines
8.2 KiB
C
366 lines
8.2 KiB
C
/*
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* Copyright (C) 2009-2016 Realtek Semiconductor Corp.
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* All Rights Reserved.
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*
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* This program is the proprietary software of Realtek Semiconductor
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* Corporation and/or its licensors, and only be used, duplicated,
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* modified or distributed under the authorized license from Realtek.
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*
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* ANY USE OF THE SOFTWARE OTHER THAN AS AUTHORIZED UNDER
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* THIS LICENSE OR COPYRIGHT LAW IS PROHIBITED.
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*
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* $Revision: 97481 $
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* $Date: 2019-06-10 20:14:33 +0800 (Mon, 10 Jun 2019) $
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*
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* Purpose : I/O read/write APIs in the SDK.
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*
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* Feature : I/O read/write APIs
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*
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*/
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/*
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* Include Files
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*/
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#ifdef CONFIG_X86_I2C
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#include <x86_i2c/x86_i2c.h>
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#endif
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#include <common/error.h>
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#include <common/rt_type.h>
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#include <ioal/ioal_init.h>
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#include <ioal/mem32.h>
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#include <common/debug/rt_log.h>
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#include <drv/spi/spi.h>
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#include <hwp/hw_profile.h>
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#if defined(CONFIG_SDK_DRIVER_I2C)
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#include <drv/i2c/i2c.h>
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#endif /* CONFIG_SDK_DRIVER_I2C */
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#if defined(CONFIG_SDK_RTL9310) /* remote access */
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#include <hal/chipdef/allmem.h>
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#include <hal/chipdef/allreg.h>
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#include <hal/chipdef/mango/rtk_mango_table_struct.h>
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#include <hal/chipdef/mango/rtk_mango_reg_struct.h>
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#include <hal/mac/reg.h>
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#endif
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/*
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* Symbol Definition
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*/
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/*
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* Data Declaration
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*/
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ioal_mem32_read_t hra_read_cb=NULL;
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ioal_mem32_write_t hra_write_cb=NULL;
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/*
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* Macro Declaration
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*/
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#define INTERFACE_SPI(unit) (HWP_SWCORE_ACC_METHOD(unit) == HWP_SW_ACC_SPI)
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#define INTERFACE_MEM(unit) (HWP_SWCORE_ACC_METHOD(unit) == HWP_SW_ACC_MEM)
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#define INTERFACE_I2C(unit) (HWP_SWCORE_ACC_METHOD(unit) == HWP_SW_ACC_I2C)
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#define INTERFACE_VIR(unit) (HWP_SWCORE_ACC_METHOD(unit) == HWP_SW_ACC_VIR)
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#define INTERFACE_REMOTE(unit) (1)
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/*
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* Function Declaration
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*/
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/* Function Name:
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* ioal_mem32_hraCb_register
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* Description:
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* Register callback function of Hardware Remote Access API
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* Input:
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* unit - unit id
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* readWrite - Read function or Write function
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* func - callback function
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* Output:
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* None
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* Return:
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* RT_ERR_OK - valid
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* RT_ERR_FAILED - invalid
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* Note:
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* None
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*/
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int32
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ioal_mem32_hraCb_register(uint32 unit, ioal_cb_readWRite_t readWrite, void *func)
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{
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if( HWP_MY_UNIT_ID() != unit)
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return RT_ERR_FAILED;
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switch(readWrite)
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{
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case IOAL_CB_READ:
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hra_read_cb = (ioal_mem32_read_t)func;
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break;
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case IOAL_CB_WRITE:
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hra_write_cb = (ioal_mem32_write_t)func;
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break;
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default:
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return RT_ERR_FAILED;
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}
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return RT_ERR_OK;
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}
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/* Function Name:
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* ioal_mem32_check
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* Description:
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* Check the register address is valid or not for the specified chip.
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* Input:
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* unit - unit id
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* addr - register address
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* Output:
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* None
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* Return:
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* RT_ERR_OK - valid
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* RT_ERR_FAILED - invalid
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* Note:
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* 1. The addr value should be offset address from the chip base in multiple chip.
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* 2. For some single chip solution, it maybe input physical address value.
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*/
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int32
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ioal_mem32_check(uint32 unit, uint32 *addr)
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{
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uint32 base;
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int32 ret = RT_ERR_FAILED;
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/* Upper layer have check the unit, and don't need to check again */
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RT_ERR_CHK(ioal_init_memRegion_get(unit, IOAL_MEM_SWCORE, &base), ret);
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*addr += base;
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return RT_ERR_OK;
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} /* end of ioal_mem32_check */
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/* Function Name:
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* ioal_mem32_read
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* Description:
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* Get the value from register.
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* Input:
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* unit - unit id
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* addr - register address
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* Output:
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* pVal - pointer buffer of the register value
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* Return:
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* RT_ERR_OK
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* RT_ERR_FAILED
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* Note:
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*
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*/
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int32
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ioal_mem32_read(uint32 unit, uint32 addr, uint32 *pVal)
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{
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int32 ret = RT_ERR_FAILED;
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if(HWP_NOT_INIT_YET() || HWP_USEDEFHWP() || INTERFACE_MEM(unit) || INTERFACE_VIR(unit))
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{
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RT_ERR_CHK(ioal_mem32_check(unit, &addr), ret);
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*pVal = MEM32_READ(addr);
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}
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else if (INTERFACE_SPI(unit))
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{
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#if defined(CONFIG_SDK_DRIVER_SPI)
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ret = drv_spi_read(unit, addr, pVal);
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#endif
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}
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else if(INTERFACE_I2C(unit))
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{
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#if defined(CONFIG_X86_I2C)
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RT_ERR_CHK(x86_i2c_read(unit, (addr & 0xFFFF), pVal), ret);
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#else
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#if defined(CONFIG_SDK_DRIVER_I2C)
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I2C_READ_WORD(HWP_MY_UNIT_ID(), 0, (addr & 0xFFFF), pVal, ret);
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#endif
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#endif
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}
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else if (INTERFACE_REMOTE(unit))
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{
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if( NULL != hra_read_cb)
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ret = hra_read_cb(unit, addr, pVal);
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}
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else
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{
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ret = RT_ERR_FAILED;
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}
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return ret;
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} /* end of ioal_mem32_read */
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/* Function Name:
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* ioal_mem32_write
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* Description:
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* Set the value to register.
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* Input:
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* unit - unit id
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* addr - register address
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* val - the value to write register
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* Output:
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* None
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* Return:
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* RT_ERR_OK
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* RT_ERR_FAILED
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* Note:
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*
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*/
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int32 ioal_mem32_write(uint32 unit, uint32 addr, uint32 val)
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{
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int32 ret = RT_ERR_FAILED;
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if(HWP_NOT_INIT_YET() || HWP_USEDEFHWP() || INTERFACE_MEM(unit) || INTERFACE_VIR(unit))
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{
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/* Upper layer have check the unit, and don't need to check again */
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RT_ERR_CHK(ioal_mem32_check(unit, &addr), ret);
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MEM32_WRITE(addr, val);
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}
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else if (INTERFACE_SPI(unit))
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{
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#if defined(CONFIG_SDK_DRIVER_SPI)
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ret = drv_spi_write(unit, addr, &val);
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#endif
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}
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else if(INTERFACE_I2C(unit))
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{
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#if defined(CONFIG_X86_I2C)
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RT_ERR_CHK(x86_i2c_write(unit, (addr & 0xFFFF), &val), ret);
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#else
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#if defined(CONFIG_SDK_DRIVER_I2C)
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I2C_WRITE_WORD(HWP_MY_UNIT_ID(), 0, (addr & 0xFFFF), &val, ret);
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#endif
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#endif
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}
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else if (INTERFACE_REMOTE(unit))
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{
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if( NULL != hra_write_cb)
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ret = hra_write_cb(unit, addr, val);
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}
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else
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{
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ret = RT_ERR_FAILED;
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}
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return ret;
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} /* end of ioal_mem32_write */
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/* Function Name:
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* ioal_mem32_field_read
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* Description:
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* Read the value from the field of register.
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* Input:
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* unit - unit id
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* addr - register address
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* offset - field offset
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* mask - field mask
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* Output:
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* pVal - pointer buffer of the register field value
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* Return:
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* RT_ERR_OK
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* RT_ERR_FAILED
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* Note:
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* None
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*/
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int32
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ioal_mem32_field_read(uint32 unit, uint32 addr, uint32 offset, uint32 mask, uint32 *pVal)
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{
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uint32 tmp;
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int32 ret = RT_ERR_FAILED;
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RT_ERR_CHK(ioal_mem32_read(unit, addr, &tmp), ret);
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*pVal = (tmp & mask) >> offset;
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return RT_ERR_OK;
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} /* end of ioal_mem32_field_read */
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/* Function Name:
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* ioal_mem32_field_write
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* Description:
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* Write the value to the field of register.
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* Input:
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* unit - unit id
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* addr - register address
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* offset - field offset
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* mask - field mask
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* val - the value to write register
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* Output:
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* None
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* Return:
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* RT_ERR_OK
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* RT_ERR_FAILED
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* Note:
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* None
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*/
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int32
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ioal_mem32_field_write(uint32 unit, uint32 addr, uint32 offset, uint32 mask, uint32 val)
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{
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uint32 tmp;
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int32 ret = RT_ERR_FAILED;
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RT_ERR_CHK(ioal_mem32_read(unit, addr, &tmp), ret);
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tmp = (tmp & ~mask) | ((val << offset) & mask);
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RT_ERR_CHK(ioal_mem32_write(unit, addr, tmp), ret);
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return RT_ERR_OK;
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} /* end of ioal_mem32_field_write */
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/* Function Name:
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* ioal_soc_mem32_read
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* Description:
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* Get the value from register of SoC
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* Input:
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* unit - unit id
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* addr - register address
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* Output:
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* pVal - pointer buffer of the register value
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* Return:
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* RT_ERR_OK
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* RT_ERR_FAILED
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* Note:
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*
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*/
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int32
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ioal_soc_mem32_read(uint32 unit, uint32 addr, uint32 *pVal)
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{
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uint32 baseAddr;
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ioal_init_memRegion_get(unit, IOAL_MEM_SOC, &baseAddr);
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*pVal = MEM32_READ(baseAddr+addr);
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return RT_ERR_OK;
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}
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/* Function Name:
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* ioal_soc_mem32_write
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* Description:
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* Set the value to SoC related register.
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* Input:
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* unit - unit id
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* addr - register address
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* val - the value to write register
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* Output:
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* None
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* Return:
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* RT_ERR_OK
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* RT_ERR_FAILED
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* Note:
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*
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*/
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int32
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ioal_soc_mem32_write(uint32 unit, uint32 addr, uint32 val)
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{
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uint32 baseAddr;
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ioal_init_memRegion_get(unit, IOAL_MEM_SOC, &baseAddr);
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MEM32_WRITE(baseAddr+addr, val);
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return RT_ERR_OK;
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}
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