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https://github.com/plappermaul/realtek-doc.git
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195 lines
4.4 KiB
C
Executable file
195 lines
4.4 KiB
C
Executable file
/*
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* Copyright (C) 2018 Realtek Semiconductor Corp.
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* All Rights Reserved.
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*
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* This program is the proprietary software of Realtek Semiconductor
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* Corporation and/or its licensors, and only be used, duplicated,
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* modified or distributed under the authorized license from Realtek.
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*
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* ANY USE OF THE SOFTWARE OTHER THAN AS AUTHORIZED UNDER
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* THIS LICENSE OR COPYRIGHT LAW IS PROHIBITED.
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* Purpose : chip symbol and data type definition in the SDK.
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*
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* Feature : chip symbol and data type definition
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*
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*/
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#if (!defined(CONFIG_DAL_RTL8373) && !defined(CONFIG_DAL_RTL8370UG))
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#define CONFIG_DAL_ALL
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#endif
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#include <rtk_error.h>
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#include <chip.h>
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#include "identify.h"
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#if defined(CONFIG_DAL_RTL8373) || defined(CONFIG_DAL_ALL)
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#include <dal/rtl8373/rtl8373_asicdrv.h>
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#endif
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//#if defined(CONFIG_DAL_RTL8370UG) || defined(CONFIG_DAL_ALL)
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//#include <dal/rtl8370ug/rtl8370ug_asicdrv.h>
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//#endif
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#if (!defined(FORCE_PROBE_RTL8373) && !defined(FORCE_PROBE_RTL8370UG) )
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#define AUTO_PROBE 1
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#else
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#define AUTO_PROBE 0
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#endif
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#if (AUTO_PROBE || defined(FORCE_PROBE_RTL8373))
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static rtk_switch_halCtrl_t rtl8371c_hal_Ctrl =
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{
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/* Switch Chip */
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CHIP_RTL8373,
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/* Logical to Physical */
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{0, 1, 2, 3, 4, 5, 6, 7, 8, 9},
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/* Physical to Logical */
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{UTP_PORT0, UTP_PORT1, UTP_PORT2, UTP_PORT3, UTP_PORT4, UTP_PORT5, UTP_PORT6, UTP_PORT7, UTP_PORT8, UTP_PORT9},
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/* Port Type */
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{UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT, UTP_PORT},
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/* PTP port */
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{1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
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/* Valid port mask */
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( (0x1 << UTP_PORT0) | (0x1 << UTP_PORT1) | (0x1 << UTP_PORT2) | (0x1 << UTP_PORT3) | (0x1 << UTP_PORT4) | (0x1 << UTP_PORT5) | (0x1 << UTP_PORT6) | (0x1 << UTP_PORT7) | (0x1 << UTP_PORT8) | (0x1 << UTP_PORT9) ),
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/* Valid UTP port mask */
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( (0x1 << UTP_PORT0) | (0x1 << UTP_PORT1) | (0x1 << UTP_PORT2) | (0x1 << UTP_PORT3) | (0x1 << UTP_PORT4) | (0x1 << UTP_PORT5) | (0x1 << UTP_PORT6) | (0x1 << UTP_PORT7) | (0x1 << UTP_PORT8) | (0x1 << UTP_PORT9)),
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/* Valid EXT port mask */
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0x0,
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/* Valid CPU port mask */
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0x200,
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/* Minimum physical port number */
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0,
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/* Maxmum physical port number */
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9,
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/* Physical port mask */
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0x3FF,
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/* Combo Logical port ID */
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0,
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/* HSG Logical port ID */
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1,
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/* SGMII Logical portmask */
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(0x1 ),
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/* Max Meter ID */
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63,
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/* MAX LUT Address Number */
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4160,
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/* Trunk Group Mask */
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0x0f,
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/* Packet buffer page number */
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1024,
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/* default pPhy_ctrl */
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NULL
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};
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#endif
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/* Function Name:
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* switch_probe
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* Description:
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* Probe switch
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* Input:
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* None
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* Output:
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* None
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* Return:
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* RT_ERR_OK - Switch probed
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* RT_ERR_FAILED - Switch Unprobed.
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* Note:
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*
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*/
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rtk_api_ret_t switch_probe(switch_chip_t *pSwitchChip)
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{
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#if defined(FORCE_PROBE_RTL8373)
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*pSwitchChip = CHIP_RTL8373;
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return RT_ERR_OK;
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#else
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rtk_uint32 retVal;
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rtk_uint32 data;
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#if defined(CONFIG_DAL_RTL8373) || defined(CONFIG_DAL_ALL)
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rtk_uint32 regValue;
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if((retVal = rtl8373_getAsicReg(0x4, &data)) != RT_ERR_OK)
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{
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printf("rtl8373_getAsicReg error!!!!\n");
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return retVal;
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}
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data = data >> 16;
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printf("data=0x%x\n", data);
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switch (data)
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{
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case 0x8373:
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case 0x8372:
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printf("find chip\n");
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*pSwitchChip = CHIP_RTL8373;
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return RT_ERR_OK;
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default:
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break;
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}
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#endif
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#endif
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return RT_ERR_CHIP_NOT_FOUND;
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}
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/* Function Name:
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* hal_find_device
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* Description:
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* Find the mac chip from SDK supported mac device lists.
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* Input:
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* None
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* Output:
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* None
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* Return:
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* NULL - Not found
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* Otherwise - Pointer of mac chip HAL structure that found
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* Note:
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*
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*/
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rtk_switch_halCtrl_t *hal_find_device(void)
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{
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switch_chip_t switchChip;
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rtk_uint32 retVal;
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/* probe switch */
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if((retVal = switch_probe(&switchChip)) != RT_ERR_OK)
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return NULL;
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switch (switchChip)
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{
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#if (AUTO_PROBE || defined(FORCE_PROBE_RTL8373))
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case CHIP_RTL8373:
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return &rtl8371c_hal_Ctrl;
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#endif
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default:
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return NULL;
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}
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/* Not found */
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return NULL;
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}
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