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add Cudy GP3000 GPL - UBOOT

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Rustam Adilov 2025-12-04 22:28:01 +05:00
parent 781b6dac21
commit e6e099d7a5
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423
sources/uboot-gp3000/.azure-pipelines.yml Normal file
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variables:
windows_vm: vs2015-win2012r2
ubuntu_vm: ubuntu-18.04
ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20191010-20Oct2019
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.
container_option: -u 0
work_dir: /u
jobs:
- job: tools_only_windows
displayName: 'Ensure host tools build for Windows'
pool:
vmImage: $(windows_vm)
strategy:
matrix:
i686:
MSYS_DIR: msys32
BASE_REPO: msys2-ci-base-i686
x86_64:
MSYS_DIR: msys64
BASE_REPO: msys2-ci-base
steps:
- script: |
git clone https://github.com/msys2/$(BASE_REPO).git %CD:~0,2%\$(MSYS_DIR)
displayName: 'Install MSYS2'
- script: |
set PATH=%CD:~0,2%\$(MSYS_DIR)\usr\bin;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem
%CD:~0,2%\$(MSYS_DIR)\usr\bin\pacman --noconfirm -Syyuu
displayName: 'Update MSYS2'
- script: |
set PATH=%CD:~0,2%\$(MSYS_DIR)\usr\bin;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem
%CD:~0,2%\$(MSYS_DIR)\usr\bin\pacman --noconfirm --needed -S make gcc bison diffutils openssl-devel
displayName: 'Install Toolchain'
- script: |
set PATH=C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem
echo make tools-only_defconfig tools-only NO_SDL=1 > build-tools.sh
%CD:~0,2%\$(MSYS_DIR)\usr\bin\bash -lc "bash build-tools.sh"
displayName: 'Build Host Tools'
env:
# Tell MSYS2 we need a POSIX emulation layer
MSYSTEM: MSYS
# Tell MSYS2 not to ‘cd’ our startup directory to HOME
CHERE_INVOKING: yes
- job: cppcheck
displayName: 'Static code analysis with cppcheck'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: cppcheck --force --quiet --inline-suppr .
- job: todo
displayName: 'Search for TODO within source tree'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: grep -r TODO .
- script: grep -r FIXME .
- script: grep -r HACK . | grep -v HACKKIT
- job: sloccount
displayName: 'Some statistics about the code base'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: sloccount .
- job: maintainers
displayName: 'Ensure all configs have MAINTAINERS entries'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: |
if [ `./tools/genboardscfg.py -f 2>&1 | wc -l` -ne 0 ]; then exit 1; fi
- job: tools_only
displayName: 'Ensure host tools build'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: |
make tools-only_config tools-only -j$(nproc)
- job: envtools
displayName: 'Ensure env tools build'
pool:
vmImage: $(ubuntu_vm)
container:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: |
make tools-only_config envtools -j$(nproc)
- job: utils
displayName: 'Run binman, buildman, dtoc and patman testsuites'
pool:
vmImage: $(ubuntu_vm)
steps:
- script: |
cat << EOF > build.sh
set -ex
cd ${WORK_DIR}
EOF
cat << "EOF" >> build.sh
git config --global user.name "Azure Pipelines"
git config --global user.email bmeng.cn@gmail.com
export USER=azure
virtualenv /tmp/venv
. /tmp/venv/bin/activate
pip install pyelftools
export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/sandbox_spl
export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt
export PATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}
./tools/buildman/buildman -o /tmp -P sandbox_spl
./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test
./tools/buildman/buildman -t
./tools/dtoc/dtoc -t
./tools/patman/patman --test
EOF
cat build.sh
# We cannot use "container" like other jobs above, as buildman
# seems to hang forever with pre-configured "container" environment
docker run -v $PWD:$(work_dir) $(ci_runner_image) /bin/bash $(work_dir)/build.sh
- job: test_py
displayName: 'test.py'
pool:
vmImage: $(ubuntu_vm)
strategy:
matrix:
sandbox:
TEST_PY_BD: "sandbox"
BUILDMAN: "^sandbox$"
sandbox_clang:
TEST_PY_BD: "sandbox"
BUILDMAN: "^sandbox$"
OVERRIDE: "-O clang-7"
sandbox_spl:
TEST_PY_BD: "sandbox_spl"
TEST_PY_TEST_SPEC: "test_ofplatdata"
BUILDMAN: "^sandbox_spl$"
sandbox_flattree:
TEST_PY_BD: "sandbox_flattree"
BUILDMAN: "^sandbox_flattree$"
evb_ast2500:
TEST_PY_BD: "evb-ast2500"
TEST_PY_ID: "--id qemu"
BUILDMAN: "^evb-ast2500$"
vexpress_ca15_tc2:
TEST_PY_BD: "vexpress_ca15_tc2"
TEST_PY_ID: "--id qemu"
BUILDMAN: "^vexpress_ca15_tc2$"
vexpress_ca9x4:
TEST_PY_BD: "vexpress_ca9x4"
TEST_PY_ID: "--id qemu"
BUILDMAN: "^vexpress_ca9x4$"
integratorcp_cm926ejs:
TEST_PY_BD: "integratorcp_cm926ejs"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^integratorcp_cm926ejs$"
qemu_arm:
TEST_PY_BD: "qemu_arm"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_arm$"
qemu_arm64:
TEST_PY_BD: "qemu_arm64"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_arm64$"
qemu_mips:
TEST_PY_BD: "qemu_mips"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_mips$"
qemu_mipsel:
TEST_PY_BD: "qemu_mipsel"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_mipsel$"
qemu_mips64:
TEST_PY_BD: "qemu_mips64"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_mips64$"
qemu_mips64el:
TEST_PY_BD: "qemu_mips64el"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_mips64el$"
qemu_ppce500:
TEST_PY_BD: "qemu-ppce500"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu-ppce500$"
qemu_riscv64:
TEST_PY_BD: "qemu-riscv64"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu-riscv64$"
qemu_x86:
TEST_PY_BD: "qemu-x86"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu-x86$"
qemu_x86_64:
TEST_PY_BD: "qemu-x86_64"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu-x86_64$"
zynq_zc702:
TEST_PY_BD: "zynq_zc702"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^zynq_zc702$"
xilinx_versal_virt:
TEST_PY_BD: "xilinx_versal_virt"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^xilinx_versal_virt$"
xtfpga:
TEST_PY_BD: "xtfpga"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^xtfpga$"
steps:
- script: |
cat << EOF > test.sh
set -ex
# make environment variables available as tests are running inside a container
export WORK_DIR="${WORK_DIR}"
export TEST_PY_BD="${TEST_PY_BD}"
export TEST_PY_ID="${TEST_PY_ID}"
export TEST_PY_TEST_SPEC="${TEST_PY_TEST_SPEC}"
export BUILDMAN="${BUILDMAN}"
export OVERRIDE="${OVERRIDE}"
EOF
cat << "EOF" >> test.sh
# the below corresponds to .gitlab-ci.yml "before_script"
cd ${WORK_DIR}
git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks
ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
grub-mkimage --prefix=\"\" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
grub-mkimage --prefix=\"\" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
mkdir ~/grub2-arm
cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm | rpm2cpio | cpio -di
mkdir ~/grub2-arm64
cd ~/grub2-arm64; wget -O - http://download.opensuse.org/ports/aarch64/distribution/leap/42.2/repo/oss/suse/aarch64/grub2-arm64-efi-2.02~beta2-87.1.aarch64.rpm | rpm2cpio | cpio -di
# the below corresponds to .gitlab-ci.yml "script"
cd ${WORK_DIR}
if [[ "${BUILDMAN}" != "" ]]; then
ret=0;
tools/buildman/buildman -o /tmp -P -E ${BUILDMAN} ${OVERRIDE} || ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
tools/buildman/buildman -o /tmp -sdeP ${BUILDMAN};
exit $ret;
fi;
fi
virtualenv -p /usr/bin/python3 /tmp/venv
. /tmp/venv/bin/activate
pip install -r test/py/requirements.txt
export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/${TEST_PY_BD};
export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:${PATH};
export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci;
if [[ "${TEST_PY_BD}" != "" ]]; then
./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID} -k "${TEST_PY_TEST_SPEC:-not a_test_which_does_not_exist}" --build-dir "$UBOOT_TRAVIS_BUILD_DIR";
ret=$?;
if [[ $ret -ne 0 ]]; then
exit $ret;
fi;
fi
# the below corresponds to .gitlab-ci.yml "after_script"
rm -rf ~/grub2* /tmp/uboot-test-hooks /tmp/venv
EOF
cat test.sh
# make current directory writeable to uboot user inside the container
# as sandbox testing need create files like spi flash images, etc.
# (TODO: clean up this in the future)
chmod 777 .
docker run -v $PWD:$(work_dir) $(ci_runner_image) /bin/bash $(work_dir)/test.sh
- job: build_the_world
displayName: 'Build the World'
pool:
vmImage: $(ubuntu_vm)
strategy:
# Use almost the same target division in .travis.yml, only merged
# 4 small build jobs (arc/microblaze/nds32/xtensa) into one.
matrix:
arc_microblaze_nds32_xtensa:
BUILDMAN: "arc microblaze nds32 xtensa"
arm11_arm7_arm920t_arm946es:
BUILDMAN: "arm11 arm7 arm920t arm946es"
arm926ejs:
BUILDMAN: "arm926ejs -x freescale,siemens,at91,kirkwood,spear,omap"
at91_non_armv7:
BUILDMAN: "at91 -x armv7"
at91_non_arm926ejs:
BUILDMAN: "at91 -x arm926ejs"
boundary_engicam_toradex:
BUILDMAN: "boundary engicam toradex"
arm_bcm:
BUILDMAN: "bcm -x mips"
nxp_arm32:
BUILDMAN: "freescale -x powerpc,m68k,aarch64,ls101,ls102,ls104,ls108,ls20,lx216"
nxp_ls101x:
BUILDMAN: "freescale&ls101"
nxp_ls102x:
BUILDMAN: "freescale&ls102"
nxp_ls104x:
BUILDMAN: "freescale&ls104"
nxp_ls108x:
BUILDMAN: "freescale&ls108"
nxp_ls20xx:
BUILDMAN: "freescale&ls20"
nxp_lx216x:
BUILDMAN: "freescale&lx216"
imx6:
BUILDMAN: "mx6 -x boundary,engicam,freescale,technexion,toradex"
imx:
BUILDMAN: "mx -x mx6,freescale,technexion,toradex"
keystone2_keystone3:
BUILDMAN: "k2 k3"
samsung_socfpga:
BUILDMAN: "samsung socfpga"
spear:
BUILDMAN: "spear"
sun4i:
BUILDMAN: "sun4i"
sun5i:
BUILDMAN: "sun5i"
sun6i:
BUILDMAN: "sun6i"
sun7i:
BUILDMAN: "sun7i"
sun8i_32bit:
BUILDMAN: "sun8i&armv7"
sun8i_64bit:
BUILDMAN: "sun8i&aarch64"
sun9i:
BUILDMAN: "sun9i"
sun50i:
BUILDMAN: "sun50i"
arm_catch_all:
BUILDMAN: "arm -x arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,rockchip,toradex,socfpga,k2,k3,zynq"
sandbox_x86:
BUILDMAN: "sandbox x86"
technexion:
BUILDMAN: "technexion"
kirkwood:
BUILDMAN: "kirkwood"
mvebu:
BUILDMAN: "mvebu"
m68k:
BUILDMAN: "m68k"
mips:
BUILDMAN: "mips"
non_fsl_ppc:
BUILDMAN: "powerpc -x freescale"
mpc85xx_freescale:
BUILDMAN: "mpc85xx&freescale -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x bsc91*"
t208xrdb_corenet_ds:
BUILDMAN: "t208xrdb corenet_ds"
fsl_ppc:
BUILDMAN: "t4qds b4860qds mpc83xx&freescale mpc86xx&freescale"
t102x:
BUILDMAN: "t102*"
p1_p2_rdb_pc:
BUILDMAN: "p1_p2_rdb_pc"
p1010rdb_bsc91:
BUILDMAN: "p1010rdb bsc91"
siemens:
BUILDMAN: "siemens"
tegra:
BUILDMAN: "tegra -x toradex"
am33xx_no_siemens:
BUILDMAN: "am33xx -x siemens"
omap:
BUILDMAN: "omap"
uniphier:
BUILDMAN: "uniphier"
aarch64_catch_all:
BUILDMAN: "aarch64 -x bcm,k3,tegra,ls1,ls2,mvebu,uniphier,sunxi,samsung,rockchip,versal,zynq"
rockchip:
BUILDMAN: "rockchip"
sh:
BUILDMAN: "sh -x arm"
zynq:
BUILDMAN: "zynq&armv7"
zynqmp_versal:
BUILDMAN: "versal|zynqmp&aarch64"
riscv:
BUILDMAN: "riscv"
steps:
- script: |
cat << EOF > build.sh
set -ex
cd ${WORK_DIR}
# make environment variables available as tests are running inside a container
export BUILDMAN="${BUILDMAN}"
EOF
cat << "EOF" >> build.sh
if [[ "${BUILDMAN}" != "" ]]; then
ret=0;
tools/buildman/buildman -o /tmp -P -E ${BUILDMAN} ${OVERRIDE} || ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
tools/buildman/buildman -o /tmp -sdeP ${BUILDMAN};
exit $ret;
fi;
fi
EOF
cat build.sh
docker run -v $PWD:$(work_dir) $(ci_runner_image) /bin/bash $(work_dir)/build.sh

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sources/uboot-gp3000/.checkpatch.conf Normal file
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# Not Linux, so don't expect a Linux tree.
--no-tree
# Temporary for false positive in checkpatch
--ignore COMPLEX_MACRO
# For CONFIG_SYS_I2C_NOPROBES
--ignore MULTISTATEMENT_MACRO_USE_DO_WHILE
# For simple_strtoul
--ignore CONSIDER_KSTRTO
# For min/max
--ignore MINMAX
# enable more tests
--strict
# Not Linux, so we don't recommend usleep_range() over udelay()
--ignore USLEEP_RANGE
# Ignore networking block comment style
--ignore NETWORKING_BLOCK_COMMENT_STYLE
# Ignore "WARNING: Prefer ether_addr_copy() over memcpy() if the Ethernet
# addresses are __aligned(2)".
--ignore PREFER_ETHER_ADDR_COPY
# A bit shorter of a description is OK with us.
--min-conf-desc-length=2

49
sources/uboot-gp3000/.mailmap Normal file
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#
# This list is used by git-shortlog to fix a few botched name translations
# in the git archive, either because the author's full name was messed up
# and/or not always written the same way, making contributions from the
# same person appearing not to be so or badly displayed.
#
# This file is also used by scripts/get_maintainer.pl.
#
# This file can be modified by hand or updated by the following command:
# scripts/mailmapper > tmp; mv tmp .mailmap
#
# Entries in this file take one of the following forms:
# Proper Name <commit@email.xx>
# <proper@email.xx> <commit@email.xx>
# Proper Name <proper@email.xx> <commit@email.xx>
# Proper Name <proper@email.xx> Commit Name <commit@email.xx>
Alexander Graf <agraf@csgraf.de> <agraf@suse.de>
Allen Martin <amartin@nvidia.com>
Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann <andreas@biessmann.org>
Aneesh V <aneesh@ti.com>
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>
Dirk Behme <dirk.behme@googlemail.com>
Fabio Estevam <fabio.estevam@nxp.com>
Jagan Teki <402jagan@gmail.com>
Jagan Teki <jaganna@gmail.com>
Jagan Teki <jaganna@xilinx.com>
Jagan Teki <jagannadh.teki@gmail.com>
Jagan Teki <jagannadha.sutradharudu-teki@xilinx.com>
Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@linaro.org>
Markus Klotzbuecher <mk@denx.de>
Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>
Prabhakar Kushwaha <prabhakar@freescale.com>
Rajeshwari Shinde <rajeshwari.s@samsung.com>
Ricardo Ribalda <ricardo@ribalda.com> <ricardo.ribalda@uam.es>
Ricardo Ribalda <ricardo@ribalda.com> <ricardo.ribalda@gmail.com>
Sandeep Paulraj <s-paulraj@ti.com>
Shaohui Xie <Shaohui.Xie@freescale.com>
Stefan Roese <stroese>
Stefano Babic <sbabic@denx.de>
TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Wolfgang Denk <wdenk>
York Sun <yorksun@freescale.com>
York Sun <york.sun@nxp.com>
Łukasz Majewski <l.majewski@samsung.com>
Lukasz Majewski <lukma@denx.de>
Mirza <Taimoor_Mirza@mentor.com>

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sources/uboot-gp3000/.travis.yml Normal file
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# SPDX-License-Identifier: GPL-2.0+
# Copyright Roger Meier <r.meier@siemens.com>
# build U-Boot on Travis CI - https://travis-ci.org/
sudo: required
dist: bionic
language: c
addons:
apt:
sources:
- ubuntu-toolchain-r-test
- llvm-toolchain-bionic-7
packages:
- cppcheck
- sloccount
- sparse
- bc
- build-essential
- libsdl1.2-dev
- python
- python-pyelftools
- python3-virtualenv
- python3-pip
- swig
- libpython-dev
- iasl
- grub-efi-ia32-bin
- grub-efi-amd64-bin
- rpm2cpio
- wget
- device-tree-compiler
- lzop
- liblz4-tool
- lzma-alone
- libisl15
- clang-7
- srecord
install:
# Clone uboot-test-hooks
- git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks
- ln -s travis-ci /tmp/uboot-test-hooks/bin/`hostname`
- ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
# prepare buildman environment
- echo -e "[toolchain]\nroot = /usr" > ~/.buildman
- echo -e "arc = /tmp/arc_gnu_2018.09_prebuilt_uclibc_le_archs_linux_install" >> ~/.buildman
- echo -e "\n[toolchain-alias]\nsh = sh2" >> ~/.buildman
- echo -e "x86 = i386" >> ~/.buildman;
- echo -e "riscv = riscv64" >> ~/.buildman;
- cat ~/.buildman
- grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- mkdir ~/grub2-arm
- ( cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm | rpm2cpio | cpio -di )
- mkdir ~/grub2-arm64
- ( cd ~/grub2-arm64; wget -O - http://download.opensuse.org/ports/aarch64/distribution/leap/42.2/repo/oss/suse/aarch64/grub2-arm64-efi-2.02~beta2-87.1.aarch64.rpm | rpm2cpio | cpio -di )
- wget http://mirrors.kernel.org/ubuntu/pool/main/m/mpfr4/libmpfr4_3.1.4-1_amd64.deb && sudo dpkg -i libmpfr4_3.1.4-1_amd64.deb && rm libmpfr4_3.1.4-1_amd64.deb
env:
global:
- PATH=/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:/usr/bin:/bin:/usr/local/bin
- PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci
- BUILD_DIR=build
- HOSTCC="cc"
- HOSTCXX="c++"
- QEMU_VERSION="v3.1.0"
before_script:
# install toolchains based on TOOLCHAIN} variable
- if [[ "${TOOLCHAIN}" == *m68k* ]]; then ./tools/buildman/buildman --fetch-arch m68k ; fi
- if [[ "${TOOLCHAIN}" == *microblaze* ]]; then ./tools/buildman/buildman --fetch-arch microblaze ; fi
- if [[ "${TOOLCHAIN}" == *mips* ]]; then ./tools/buildman/buildman --fetch-arch mips ; fi
- if [[ "${TOOLCHAIN}" == *sh* ]]; then ./tools/buildman/buildman --fetch-arch sh2 ; fi
- if [[ "${TOOLCHAIN}" == *i386* ]]; then
./tools/buildman/buildman --fetch-arch i386;
fi
- if [[ "${TOOLCHAIN}" == arc ]]; then
wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2018.09-release/arc_gnu_2018.09_prebuilt_uclibc_le_archs_linux_install.tar.gz &&
tar -C /tmp -xf arc_gnu_2018.09_prebuilt_uclibc_le_archs_linux_install.tar.gz;
fi
- if [[ "${TOOLCHAIN}" == "nds32" ]]; then
wget https://github.com/vincentzwc/prebuilt-nds32-toolchain/releases/download/20180521/nds32le-linux-glibc-v3-upstream.tar.gz &&
tar -C /tmp -xf nds32le-linux-glibc-v3-upstream.tar.gz &&
echo -e "\n[toolchain-prefix]\nnds32 = /tmp/nds32le-linux-glibc-v3-upstream/bin/nds32le-linux-" >> ~/.buildman;
fi
- if [[ "${TOOLCHAIN}" == *xtensa* ]]; then
wget https://github.com/foss-xtensa/toolchain/releases/download/2018.02/x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
tar -C /tmp -xf x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
echo -e "\n[toolchain-prefix]\nxtensa = /tmp/2018.02/${TOOLCHAIN}/bin/${TOOLCHAIN}-" >> ~/.buildman;
fi
# If TOOLCHAIN is unset, we're on some flavour of ARM.
- if [[ "${TOOLCHAIN}" == "" ]]; then
./tools/buildman/buildman --fetch-arch arm &&
./tools/buildman/buildman --fetch-arch aarch64;
fi
- if [[ "${TOOLCHAIN}" == "powerpc" ]]; then ./tools/buildman/buildman --fetch-arch powerpc; fi
- if [[ "${TOOLCHAIN}" == "riscv" ]]; then
./tools/buildman/buildman --fetch-arch riscv64;
fi
- if [[ "${QEMU_TARGET}" != "" ]]; then
git clone git://git.qemu.org/qemu.git /tmp/qemu;
pushd /tmp/qemu;
git submodule update --init dtc &&
git checkout ${QEMU_VERSION} &&
./configure --prefix=/tmp/qemu-install --target-list=${QEMU_TARGET} &&
make -j4 all install;
popd;
fi
script:
# Comments must be outside the command strings below, or the Travis parser
# will get confused.
#
# From buildman, exit code 129 means warnings only. If we've been asked to
# use clang only do one configuration.
- if [[ "${BUILDMAN}" != "" ]]; then
ret=0;
tools/buildman/buildman -P -E ${BUILDMAN} ${OVERRIDE}|| ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
tools/buildman/buildman -sdeP ${BUILDMAN};
exit $ret;
fi;
fi
# "not a_test_which_does_not_exist" is a dummy -k parameter which will
# never prevent any test from running. That way, we can always pass
# "-k something" even when $TEST_PY_TEST_SPEC doesnt need a custom
# value.
- export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/${TEST_PY_BD};
cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/;
cp ~/grub_x64.efi $UBOOT_TRAVIS_BUILD_DIR/;
cp ~/grub2-arm/usr/lib/grub2/arm-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi;
cp ~/grub2-arm64/usr/lib/grub2/arm64-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi;
if [[ -n "${TEST_PY_TOOLS}" ]]; then
PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"
PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"
./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test &&
./tools/patman/patman --test &&
./tools/buildman/buildman -t &&
PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"
PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"
./tools/dtoc/dtoc -t;
fi;
if [[ "${TEST_PY_BD}" != "" ]]; then
virtualenv -p /usr/bin/python3 /tmp/venv;
. /tmp/venv/bin/activate;
pip install -r test/py/requirements.txt;
./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID}
-k "${TEST_PY_TEST_SPEC:-not a_test_which_does_not_exist}"
--build-dir "$UBOOT_TRAVIS_BUILD_DIR";
ret=$?;
if [[ $ret -ne 0 ]]; then
exit $ret;
fi;
fi
matrix:
include:
# we need to build by vendor due to 50min time limit for builds
# each env setting here is a dedicated build
- name: "buildman arc"
env:
- BUILDMAN="arc"
TOOLCHAIN="arc"
- name: "buildman arm11 arm7 arm920t arm946es"
env:
- BUILDMAN="arm11 arm7 arm920t arm946es"
- name: "buildman arm926ejs (non-NXP,siemens,at91,kirkwood,spear)"
env:
- JOB="arm926ejs"
BUILDMAN="arm926ejs -x freescale,siemens,at91,kirkwood,spear,omap"
- name: "buildman at91 (non arm v7)"
env:
- BUILDMAN="at91 -x armv7"
- name: "buildman at91 (non arm926ejs)"
env:
- BUILDMAN="at91 -x arm926ejs"
- name: "buildman boundary engicam toradex"
env:
- BUILDMAN="boundary engicam toradex"
- name: "buildman ARM bcm"
env:
- BUILDMAN="bcm -x mips"
- name: "buildman NXP ARM32 (catch-all)"
env:
- BUILDMAN="freescale -x powerpc,m68k,aarch64,ls101,ls102,ls104,ls108,ls20,lx216"
- name: "buildman NXP LS101x"
env:
- BUILDMAN="freescale&ls101"
- name: "buildman NXP LS102x"
env:
- BUILDMAN="freescale&ls102"
- name: "buildman NXP LS104x"
env:
- BUILDMAN="freescale&ls104"
- name: "buildman NXP LS108x"
env:
- BUILDMAN="freescale&ls108"
- name: "buildman NXP LS20xx"
env:
- BUILDMAN="freescale&ls20"
- name: "buildman NXP LX216x"
env:
- BUILDMAN="freescale&lx216"
- name: "buildman i.MX6 tqc"
env:
- BUILDMAN="mx6&tqc"
- name: "buildman i.MX6 (catch-all)"
env:
- BUILDMAN="mx6 -x boundary,engicam,freescale,technexion,toradex,tqc"
- name: "buildman i.MX (non-i.MX6 catch-all)"
env:
- BUILDMAN="mx -x freescale,mx6,toradex,technexion"
- name: "buildman keystone 2/3"
env:
- BUILDMAN="k2 k3"
- name: "buildman samsung socfpga"
env:
- BUILDMAN="samsung socfpga"
- name: "buildman spear"
env:
- BUILDMAN="spear"
- name: "buildman sun4i"
env:
- BUILDMAN="sun4i"
- name: "buildman sun5i"
env:
- BUILDMAN="sun5i"
- name: "buildman sun6i"
env:
- BUILDMAN="sun6i"
- name: "buildman sun7i"
env:
- BUILDMAN="sun7i"
- name: "buildman 64bit sun8i"
env:
- BUILDMAN="sun8i&aarch64 -x orangepi"
- name: "buildman 32bit sun8i"
env:
- BUILDMAN="sun8i&armv7 -x orangepi"
- name: "buildman sun9i"
env:
- BUILDMAN="sun9i"
- name: "buildman sun50i"
env:
- BUILDMAN="sun50i -x orangepi"
- name: "buildman catch-all ARM"
env:
- BUILDMAN="arm -x arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,rockchip,toradex,socfpga,k2,k3,zynq"
- name: "buildman sandbox x86"
env:
- BUILDMAN="sandbox x86"
TOOLCHAIN="i386"
- name: "buildman technexion"
env:
- BUILDMAN="technexion"
- name: "buildman kirkwood"
env:
- BUILDMAN="kirkwood"
- name: "buildman mvebu"
env:
- BUILDMAN="mvebu"
- name: "buildman m68k"
env:
- BUILDMAN="m68k"
TOOLCHAIN="m68k"
- name: "buildman microblaze"
env:
- BUILDMAN="microblaze"
TOOLCHAIN="microblaze"
- name: "buildman mips"
env:
- BUILDMAN="mips"
TOOLCHAIN="mips"
- name: "buildman non-Freescale PowerPC"
env:
- BUILDMAN="powerpc -x freescale"
TOOLCHAIN="powerpc"
- name: "buildman mpc85xx&freescale (excluding many)"
env:
- BUILDMAN="mpc85xx&freescale -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x bsc91*"
TOOLCHAIN="powerpc"
- name: "buildman t208xrdb corenet_ds"
env:
- BUILDMAN="t208xrdb corenet_ds"
TOOLCHAIN="powerpc"
- name: "buildman Freescale PowerPC"
env:
- BUILDMAN="t4qds b4860qds mpc83xx&freescale mpc86xx&freescale"
TOOLCHAIN="powerpc"
- name: "buildman t102*"
env:
- BUILDMAN="t102*"
TOOLCHAIN="powerpc"
- name: "buildman p1_p2_rdb_pc"
env:
- BUILDMAN="p1_p2_rdb_pc"
TOOLCHAIN="powerpc"
- name: "buildman p1010rdb bsc91"
env:
- BUILDMAN="p1010rdb bsc91"
TOOLCHAIN="powerpc"
- name: "buildman siemens"
env:
- BUILDMAN="siemens"
- name: "buildman tegra"
env:
- BUILDMAN="tegra -x toradex"
- name: "buildman am33xx (no siemens)"
env:
- BUILDMAN="am33xx -x siemens"
- name: "buildman omap"
env:
- BUILDMAN="omap"
- name: "buildman orangepi"
env:
- BUILDMAN="orangepi"
- name: "buildman uniphier"
env:
- BUILDMAN="uniphier"
- name: "buildman catch-all AArch64"
env:
- BUILDMAN="aarch64 -x bcm,k3,tegra,ls1,ls2,mvebu,uniphier,sunxi,samsung,rockchip,versal,zynq"
- name: "buildman rockchip"
env:
- BUILDMAN="rockchip -x orangepi"
- name: "buildman sh"
env:
- BUILDMAN="sh -x arm"
TOOLCHAIN="sh"
- name: "buildman Zynq* (ARMv7)"
env:
- BUILDMAN="zynq&armv7"
- name: "buildman ZynqMP and Versal"
env:
- BUILDMAN="versal|zynqmp&aarch64"
- name: "buildman xtensa"
env:
- BUILDMAN="xtensa"
TOOLCHAIN="xtensa-dc233c-elf"
- name: "buildman riscv"
env:
- BUILDMAN="riscv"
TOOLCHAIN="riscv"
- name: "buildman nds32"
env:
- BUILDMAN="nds32"
TOOLCHAIN="nds32"
# QA jobs for code analytics
# static code analysis with cppcheck (we can add --enable=all later)
- name: "cppcheck"
script:
- cppcheck --force --quiet --inline-suppr .
# search for TODO within source tree
- name: "grep TODO"
script:
- grep -r TODO .
# search for FIXME within source tree
- name: "grep FIXME HACK"
script:
- grep -r FIXME .
# search for HACK within source tree and ignore HACKKIT board
script:
- grep -r HACK . | grep -v HACKKIT
# some statistics about the code base
- name: "sloccount"
script:
- sloccount .
# ensure all configs have MAINTAINERS entries
- name: "Check for configs without MAINTAINERS entry"
script:
- if [ `./tools/genboardscfg.py -f 2>&1 | wc -l` -ne 0 ]; then exit 1; fi
# Ensure host tools build
- name: "Build tools-only"
script:
- make tools-only_config tools-only -j$(nproc)
# Ensure env tools build
- name: "Build envtools"
script:
- make tools-only_config envtools -j$(nproc)
# test/py
- name: "test/py sandbox"
env:
- TEST_PY_BD="sandbox"
BUILDMAN="^sandbox$"
TOOLCHAIN="i386"
- name: "test/py sandbox with clang"
env:
- TEST_PY_BD="sandbox"
BUILDMAN="^sandbox$"
OVERRIDE="-O clang-7"
- name: "test/py sandbox_spl"
env:
- TEST_PY_BD="sandbox_spl"
TEST_PY_TEST_SPEC="test_ofplatdata"
BUILDMAN="^sandbox$"
TOOLCHAIN="i386"
TEST_PY_TOOLS="yes"
- name: "test/py sandbox_flattree"
env:
- TEST_PY_BD="sandbox_flattree"
BUILDMAN="^sandbox_flattree$"
TOOLCHAIN="i386"
- name: "test/py evb-ast2500"
env:
- TEST_PY_BD="evb-ast2500"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
QEMU_VERSION="506179e42112be77bfd071f050b15762d3b2cd43"
BUILDMAN="^evb-ast2500$"
- name: "test/py vexpress_ca15_tc2"
env:
- TEST_PY_BD="vexpress_ca15_tc2"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
QEMU_VERSION="v3.0.0"
BUILDMAN="^vexpress_ca15_tc2$"
- name: "test/py vexpress_ca9x4"
env:
- TEST_PY_BD="vexpress_ca9x4"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^vexpress_ca9x4$"
- name: "test/py integratorcp_cm926ejs"
env:
- TEST_PY_BD="integratorcp_cm926ejs"
TEST_PY_TEST_SPEC="not sleep"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^integratorcp_cm926ejs$"
- name: "test/py qemu_arm"
env:
- TEST_PY_BD="qemu_arm"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^qemu_arm$"
- name: "test/py qemu_arm64"
env:
- TEST_PY_BD="qemu_arm64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="aarch64-softmmu"
BUILDMAN="^qemu_arm64$"
- name: "test/py qemu_mips"
env:
- TEST_PY_BD="qemu_mips"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips-softmmu"
BUILDMAN="^qemu_mips$"
TOOLCHAIN="mips"
- name: "test/py qemu_mipsel"
env:
- TEST_PY_BD="qemu_mipsel"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mipsel-softmmu"
BUILDMAN="^qemu_mipsel$"
TOOLCHAIN="mips"
- name: "test/py qemu_mips64"
env:
- TEST_PY_BD="qemu_mips64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips64-softmmu"
BUILDMAN="^qemu_mips64$"
TOOLCHAIN="mips"
- name: "test/py qemu_mips64el"
env:
- TEST_PY_BD="qemu_mips64el"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips64el-softmmu"
BUILDMAN="^qemu_mips64el$"
TOOLCHAIN="mips"
- name: "test/py qemu-ppce500"
env:
- TEST_PY_BD="qemu-ppce500"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="ppc-softmmu"
BUILDMAN="^qemu-ppce500$"
TOOLCHAIN="powerpc"
- name: "test/py qemu-riscv64"
env:
- TEST_PY_BD="qemu-riscv64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="riscv64-softmmu"
BUILDMAN="^qemu-riscv64$"
TOOLCHAIN="riscv"
- name: "test/py qemu-x86"
env:
- TEST_PY_BD="qemu-x86"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="i386-softmmu"
BUILDMAN="^qemu-x86$"
TOOLCHAIN="i386"
BUILD_ROM="yes"
- name: "test/py qemu-x86_64"
env:
- TEST_PY_BD="qemu-x86_64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="x86_64-softmmu"
BUILDMAN="^qemu-x86_64$"
TOOLCHAIN="i386"
BUILD_ROM="yes"
- name: "test/py zynq_zc702"
env:
- TEST_PY_BD="zynq_zc702"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="arm-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^zynq_zc702$"
- name: "test/py xilinx_versal_virt"
env:
- TEST_PY_BD="xilinx_versal_virt"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="aarch64-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^xilinx_versal_virt$"
- name: "test/py xtfpga"
env:
- TEST_PY_BD="xtfpga"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="xtensa-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^xtfpga$"
TOOLCHAIN="xtensa-dc233c-elf"
# TODO make it perfect ;-r

68
sources/uboot-gp3000/Kbuild Normal file
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@ -0,0 +1,68 @@
#
# Kbuild for top-level directory of U-Boot
# This file takes care of the following:
# 1) Generate generic-asm-offsets.h
# 2) Generate asm-offsets.h
# Default sed regexp - multiline due to syntax constraints
define sed-y
"s:[[:space:]]*\.ascii[[:space:]]*\"\(.*\)\":\1:; \
/^->/{s:->#\(.*\):/* \1 */:; \
s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:->::; p;}"
endef
# Use filechk to avoid rebuilds when a header changes, but the resulting file
# does not
define filechk_offsets
(set -e; \
echo "#ifndef $2"; \
echo "#define $2"; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
echo " * This file was generated by Kbuild"; \
echo " */"; \
echo ""; \
sed -ne $(sed-y); \
echo ""; \
echo "#endif" )
endef
#####
# 1) Generate generic-asm-offsets.h
generic-offsets-file := include/generated/generic-asm-offsets.h
always := $(generic-offsets-file)
targets := lib/asm-offsets.s
# We use internal kbuild rules to avoid the "is up to date" message from make
lib/asm-offsets.s: lib/asm-offsets.c FORCE
$(Q)mkdir -p $(dir $@)
$(call if_changed_dep,cc_s_c)
$(obj)/$(generic-offsets-file): lib/asm-offsets.s FORCE
$(call filechk,offsets,__GENERIC_ASM_OFFSETS_H__)
#####
# 2) Generate asm-offsets.h
#
ifneq ($(wildcard $(srctree)/arch/$(ARCH)/lib/asm-offsets.c),)
offsets-file := include/generated/asm-offsets.h
endif
always += $(offsets-file)
targets += arch/$(ARCH)/lib/asm-offsets.s
CFLAGS_asm-offsets.o := -DDO_DEPS_ONLY
# We use internal kbuild rules to avoid the "is up to date" message from make
arch/$(ARCH)/lib/asm-offsets.s: arch/$(ARCH)/lib/asm-offsets.c FORCE
$(Q)mkdir -p $(dir $@)
$(call if_changed_dep,cc_s_c)
$(obj)/$(offsets-file): arch/$(ARCH)/lib/asm-offsets.s FORCE
$(call filechk,offsets,__ASM_OFFSETS_H__)

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#
# For a description of the syntax of this configuration file,
# see the file Documentation/kbuild/kconfig-language.txt in the
# Linux kernel source tree.
#
mainmenu "U-Boot $UBOOTVERSION Configuration"
config UBOOTVERSION
string
option env="UBOOTVERSION"
# Allow defaults in arch-specific code to override any given here
source "arch/Kconfig"
menu "General setup"
config BROKEN
bool
help
This option cannot be enabled. It is used as dependency
for broken and incomplete features.
config DEPRECATED
bool
help
This option cannot be enabled. It it used as a dependency for
code that relies on deprecated features that will be removed and
the conversion deadline has passed.
config LOCALVERSION
string "Local version - append to U-Boot release"
help
Append an extra string to the end of your U-Boot version.
This will show up in your boot log, for example.
The string you set here will be appended after the contents of
any files with a filename matching localversion* in your
object and source tree, in that order. Your total string can
be a maximum of 64 characters.
config LOCALVERSION_AUTO
bool "Automatically append version information to the version string"
default y
help
This will try to automatically determine if the current tree is a
release tree by looking for Git tags that belong to the current
top of tree revision.
A string of the format -gxxxxxxxx will be added to the localversion
if a Git-based tree is found. The string generated by this will be
appended after any matching localversion* files, and after the value
set in CONFIG_LOCALVERSION.
(The actual string used here is the first eight characters produced
by running the command:
$ git rev-parse --verify HEAD
which is done within the script "scripts/setlocalversion".)
config CC_OPTIMIZE_FOR_SIZE
bool "Optimize for size"
default y
help
Enabling this option will pass "-Os" instead of "-O2" to gcc
resulting in a smaller U-Boot image.
This option is enabled by default for U-Boot.
config CC_COVERAGE
bool "Enable code coverage analysis"
depends on SANDBOX
help
Enabling this option will pass "--coverage" to gcc to compile
and link code instrumented for coverage analysis.
config DISTRO_DEFAULTS
bool "Select defaults suitable for booting general purpose Linux distributions"
select AUTO_COMPLETE
select CMDLINE_EDITING
select CMD_BOOTI if ARM64
select CMD_BOOTZ if ARM && !ARM64
select CMD_DHCP if CMD_NET
select CMD_ENV_EXISTS
select CMD_EXT2
select CMD_EXT4
select CMD_FAT
select CMD_FS_GENERIC
select CMD_PART if PARTITIONS
select CMD_PING if CMD_NET
select CMD_PXE if NET
select CMD_SYSBOOT
select ENV_VARS_UBOOT_CONFIG
select HUSH_PARSER
select SUPPORT_RAW_INITRD
select SYS_LONGHELP
imply CMD_MII if NET
imply USB_STORAGE
imply USE_BOOTCOMMAND
help
Select this to enable various options and commands which are suitable
for building u-boot for booting general purpose Linux distributions.
config ENV_VARS_UBOOT_CONFIG
bool "Add arch, board, vendor and soc variables to default environment"
help
Define this in order to add variables describing the
U-Boot build configuration to the default environment.
These will be named arch, cpu, board, vendor, and soc.
Enabling this option will cause the following to be defined:
- CONFIG_SYS_ARCH
- CONFIG_SYS_CPU
- CONFIG_SYS_BOARD
- CONFIG_SYS_VENDOR
- CONFIG_SYS_SOC
config NR_DRAM_BANKS
int "Number of DRAM banks"
default 4
help
This defines the number of DRAM banks.
config SYS_BOOT_GET_CMDLINE
bool "Enable kernel command line setup"
help
Enables allocating and saving kernel cmdline in space between
"bootm_low" and "bootm_low" + BOOTMAPSZ.
config SYS_BOOT_GET_KBD
bool "Enable kernel board information setup"
help
Enables allocating and saving a kernel copy of the bd_info in
space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
config SYS_MALLOC_F
bool "Enable malloc() pool before relocation"
default y if DM
help
Before relocation, memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
config SYS_MALLOC_F_LEN
hex "Size of malloc() pool before relocation"
depends on SYS_MALLOC_F
default 0x1000 if AM33XX
default 0x2800 if SANDBOX
default 0x2000 if (ARCH_IMX8 || ARCH_IMX8M || ARCH_MX7 || \
ARCH_MX7ULP || ARCH_MX6 || ARCH_MX5)
default 0x400
help
Before relocation, memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
config SYS_MALLOC_LEN
hex "Define memory for Dynamic allocation"
depends on ARCH_ZYNQ || ARCH_VERSAL || ARCH_STM32MP || ARCH_ROCKCHIP
default 0x2000000 if ARCH_ROCKCHIP
help
This defines memory to be allocated for Dynamic allocation
TODO: Use for other architectures
config SPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in SPL before relocation"
depends on SYS_MALLOC_F && SPL
default 0x2800 if RCAR_GEN3
default SYS_MALLOC_F_LEN
help
Before relocation, memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
config TPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in TPL before relocation"
depends on SYS_MALLOC_F && TPL
default SYS_MALLOC_F_LEN
help
Before relocation, memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
particular needs this to operate, so that it can allocate the
initial serial device and any others that are needed.
menuconfig EXPERT
bool "Configure standard U-Boot features (expert users)"
default y
help
This option allows certain base U-Boot options and settings
to be disabled or tweaked. This is for specialized
environments which can tolerate a "non-standard" U-Boot.
Use this only if you really know what you are doing.
if EXPERT
config SYS_MALLOC_CLEAR_ON_INIT
bool "Init with zeros the memory reserved for malloc (slow)"
default y
help
This setting is enabled by default. The reserved malloc
memory is initialized with zeros, so first malloc calls
will return the pointer to the zeroed memory. But this
slows the boot time.
It is recommended to disable it, when CONFIG_SYS_MALLOC_LEN
value, has more than few MiB, e.g. when uses bzip2 or bmp logo.
Then the boot time can be significantly reduced.
Warning:
When disabling this, please check if malloc calls, maybe
should be replaced by calloc - if one expects zeroed memory.
config TOOLS_DEBUG
bool "Enable debug information for tools"
help
Enable generation of debug information for tools such as mkimage.
This can be used for debugging purposes. With debug information
it is possible to set breakpoints on particular lines, single-step
debug through the source code, etc.
endif # EXPERT
config PHYS_64BIT
bool "64bit physical address support"
help
Say Y here to support 64bit physical memory address.
This can be used not only for 64bit SoCs, but also for
large physical address extension on 32bit SoCs.
config BUILD_ROM
bool "Build U-Boot as BIOS replacement"
depends on X86
help
This option allows to build a ROM version of U-Boot.
The build process generally requires several binary blobs
which are not shipped in the U-Boot source tree.
Please, see doc/README.x86 for details.
config SPL_IMAGE
string "SPL image used in the combined SPL+U-Boot image"
default "spl/boot.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
default "spl/u-boot-spl.bin"
depends on SPL
help
Select the SPL build target that shall be generated by the SPL
build process (default spl/u-boot-spl.bin). This image will be
used to generate a combined image with SPL and main U-Boot
proper as one single image.
config BUILD_TARGET
string "Build target special images"
default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_ARRIA10
default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5
default "u-boot-spl.kwb" if ARCH_MVEBU && SPL
default "u-boot-elf.srec" if RCAR_GEN3
default "u-boot.itb" if SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
ARCH_SUNXI || RISCV)
default "u-boot.kwb" if KIRKWOOD
default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
default "u-boot-with-spl.imx" if ARCH_MX6 && SPL
help
Some SoCs need special image types (e.g. U-Boot binary
with a special header) as build targets. By defining
CONFIG_BUILD_TARGET in the SoC / board header, this
special image will be automatically built upon calling
make / buildman.
config SYS_CUSTOM_LDSCRIPT
bool "Use a custom location for the U-Boot linker script"
help
Normally when linking U-Boot we will look in the board directory,
the CPU directory and finally the "cpu" directory of the architecture
for the ile "u-boot.lds" and use that as our linker. However, in
some cases we need to provide a different linker script. To do so,
enable this option and then provide the location under
CONFIG_SYS_LDSCRIPT.
config SYS_LDSCRIPT
depends on SYS_CUSTOM_LDSCRIPT
string "Custom ldscript location"
help
Path within the source tree to the linker script to use for the
main U-Boot binary.
config ERR_PTR_OFFSET
hex
default 0x0
help
Some U-Boot pointers have redundant information, so we can use a
scheme where we can return either an error code or a pointer with the
same return value. The default implementation just casts the pointer
to a number, however, this may fail on platforms where the end of the
address range is used for valid pointers (e.g. 0xffffff00 is a valid
heap pointer in socfpga SPL).
For such platforms, this value provides an upper range of those error
pointer values - up to 'MAX_ERRNO' bytes below this value must be
unused/invalid addresses.
endmenu # General setup
menu "Boot images"
config ANDROID_BOOT_IMAGE
bool "Enable support for Android Boot Images"
default y if FASTBOOT
help
This enables support for booting images which use the Android
image format header.
config FIT
bool "Support Flattened Image Tree"
select MD5
select SHA1
help
This option allows you to boot the new uImage structure,
Flattened Image Tree. FIT is formally a FDT, which can include
images of various types (kernel, FDT blob, ramdisk, etc.)
in a single blob. To boot this new uImage structure,
pass the address of the blob to the "bootm" command.
FIT is very flexible, supporting compression, multiple images,
multiple configurations, verification through hashing and also
verified boot (secure boot using RSA).
if FIT
config FIT_EXTERNAL_OFFSET
hex "FIT external data offset"
default 0x0
help
This specifies a data offset in fit image.
The offset is from data payload offset to the beginning of
fit image header. When specifies a offset, specific data
could be put in the hole between data payload and fit image
header, such as CSF data on i.MX platform.
config FIT_ENABLE_SHA256_SUPPORT
bool "Support SHA256 checksum of FIT image contents"
default y
select SHA256
help
Enable this to support SHA256 checksum of FIT image contents. A
SHA256 checksum is a 256-bit (32-byte) hash value used to check that
the image contents have not been corrupted. SHA256 is recommended
for use in secure applications since (as at 2016) there is no known
feasible attack that could produce a 'collision' with differing
input data. Use this for the highest security. Note that only the
SHA256 variant is supported: SHA512 and others are not currently
supported in U-Boot.
config FIT_SIGNATURE
bool "Enable signature verification of FIT uImages"
depends on DM
select HASH
select RSA
help
This option enables signature verification of FIT uImages,
using a hash signed and verified using RSA. If
CONFIG_SHA_PROG_HW_ACCEL is defined, i.e support for progressive
hashing is available using hardware, then the RSA library will use
it. See doc/uImage.FIT/signature.txt for more details.
WARNING: When relying on signed FIT images with a required signature
check the legacy image format is disabled by default, so that
unsigned images cannot be loaded. If a board needs the legacy image
format support in this case, enable it using
CONFIG_LEGACY_IMAGE_FORMAT.
config FIT_SIGNATURE_MAX_SIZE
hex "Max size of signed FIT structures"
depends on FIT_SIGNATURE
default 0x10000000
help
This option sets a max size in bytes for verified FIT uImages.
A sane value of 256MB protects corrupted DTB structures from overlapping
device memory. Assure this size does not extend past expected storage
space.
config FIT_ENABLE_RSASSA_PSS_SUPPORT
bool "Support rsassa-pss signature scheme of FIT image contents"
depends on FIT_SIGNATURE
default n
help
Enable this to support the pss padding algorithm as described
in the rfc8017 (https://tools.ietf.org/html/rfc8017).
config FIT_VERBOSE
bool "Show verbose messages when FIT images fail"
help
Generally a system will have valid FIT images so debug messages
are a waste of code space. If you are debugging your images then
you can enable this option to get more verbose information about
failures.
config FIT_BEST_MATCH
bool "Select the best match for the kernel device tree"
help
When no configuration is explicitly selected, default to the
one whose fdt's compatibility field best matches that of
U-Boot itself. A match is considered "best" if it matches the
most specific compatibility entry of U-Boot's fdt's root node.
The order of entries in the configuration's fdt is ignored.
config FIT_IMAGE_POST_PROCESS
bool "Enable post-processing of FIT artifacts after loading by U-Boot"
depends on TI_SECURE_DEVICE
help
Allows doing any sort of manipulation to blobs after they got extracted
from FIT images like stripping off headers or modifying the size of the
blob, verification, authentication, decryption etc. in a platform or
board specific way. In order to use this feature a platform or board-
specific implementation of board_fit_image_post_process() must be
provided. Also, anything done during this post-processing step would
need to be comprehended in how the images were prepared before being
injected into the FIT creation (i.e. the blobs would have been pre-
processed before being added to the FIT image).
if SPL
config SPL_FIT
bool "Support Flattened Image Tree within SPL"
depends on SPL
select SPL_OF_LIBFDT
config SPL_FIT_PRINT
bool "Support FIT printing within SPL"
depends on SPL_FIT
help
Support printing the content of the fitImage in a verbose manner in SPL.
config SPL_FIT_SIGNATURE
bool "Enable signature verification of FIT firmware within SPL"
depends on SPL_DM
select SPL_FIT
select SPL_RSA
config SPL_LOAD_FIT
bool "Enable SPL loading U-Boot as a FIT (basic fitImage features)"
select SPL_FIT
help
Normally with the SPL framework a legacy image is generated as part
of the build. This contains U-Boot along with information as to
where it should be loaded. This option instead enables generation
of a FIT (Flat Image Tree) which provides more flexibility. In
particular it can handle selecting from multiple device tree
and passing the correct one to U-Boot.
config SPL_LOAD_FIT_FULL
bool "Enable SPL loading U-Boot as a FIT (full fitImage features)"
select SPL_FIT
help
Normally with the SPL framework a legacy image is generated as part
of the build. This contains U-Boot along with information as to
where it should be loaded. This option instead enables generation
of a FIT (Flat Image Tree) which provides more flexibility. In
particular it can handle selecting from multiple device tree
and passing the correct one to U-Boot.
config SPL_FIT_IMAGE_POST_PROCESS
bool "Enable post-processing of FIT artifacts after loading by the SPL"
depends on SPL_LOAD_FIT
help
Allows doing any sort of manipulation to blobs after they got extracted
from the U-Boot FIT image like stripping off headers or modifying the
size of the blob, verification, authentication, decryption etc. in a
platform or board specific way. In order to use this feature a platform
or board-specific implementation of board_fit_image_post_process() must
be provided. Also, anything done during this post-processing step would
need to be comprehended in how the images were prepared before being
injected into the FIT creation (i.e. the blobs would have been pre-
processed before being added to the FIT image).
config SPL_FIT_SOURCE
string ".its source file for U-Boot FIT image"
depends on SPL_FIT
help
Specifies a (platform specific) FIT source file to generate the
U-Boot FIT image. This could specify further image to load and/or
execute.
config SPL_FIT_GENERATOR
string ".its file generator script for U-Boot FIT image"
depends on SPL_FIT
default "board/sunxi/mksunxi_fit_atf.sh" if SPL_LOAD_FIT && ARCH_SUNXI
default "arch/arm/mach-rockchip/make_fit_atf.py" if SPL_LOAD_FIT && ARCH_ROCKCHIP
default "arch/riscv/lib/mkimage_fit_opensbi.sh" if SPL_LOAD_FIT && RISCV
help
Specifies a (platform specific) script file to generate the FIT
source file used to build the U-Boot FIT image file. This gets
passed a list of supported device tree file stub names to
include in the generated image.
endif # SPL
endif # FIT
config LEGACY_IMAGE_FORMAT
bool "Enable support for the legacy image format"
default y if !FIT_SIGNATURE
help
This option enables the legacy image format. It is enabled by
default for backward compatibility, unless FIT_SIGNATURE is
set where it is disabled so that unsigned images cannot be
loaded. If a board needs the legacy image format support in this
case, enable it here.
config OF_BOARD_SETUP
bool "Set up board-specific details in device tree before boot"
depends on OF_LIBFDT
help
This causes U-Boot to call ft_board_setup() before booting into
the Operating System. This function can set up various
board-specific information in the device tree for use by the OS.
The device tree is then passed to the OS.
config OF_SYSTEM_SETUP
bool "Set up system-specific details in device tree before boot"
depends on OF_LIBFDT
help
This causes U-Boot to call ft_system_setup() before booting into
the Operating System. This function can set up various
system-specific information in the device tree for use by the OS.
The device tree is then passed to the OS.
config OF_STDOUT_VIA_ALIAS
bool "Update the device-tree stdout alias from U-Boot"
depends on OF_LIBFDT
help
This uses U-Boot's serial alias from the aliases node to update
the device tree passed to the OS. The "linux,stdout-path" property
in the chosen node is set to point to the correct serial node.
This option currently references CONFIG_CONS_INDEX, which is
incorrect when used with device tree as this option does not
exist / should not be used.
config SYS_EXTRA_OPTIONS
string "Extra Options (DEPRECATED)"
help
The old configuration infrastructure (= mkconfig + boards.cfg)
provided the extra options field. If you have something like
"HAS_BAR,BAZ=64", the optional options
#define CONFIG_HAS
#define CONFIG_BAZ 64
will be defined in include/config.h.
This option was prepared for the smooth migration from the old
configuration to Kconfig. Since this option will be removed sometime,
new boards should not use this option.
config SYS_TEXT_BASE
depends on !NIOS2 && !XTENSA
depends on !EFI_APP
default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
default 0x4a000000 if ARCH_SUNXI && !MACH_SUN9I && !MACH_SUN8I_V3S
default 0x2a000000 if ARCH_SUNXI && MACH_SUN9I
default 0x42e00000 if ARCH_SUNXI && MACH_SUN8I_V3S
hex "Text Base"
help
The address in memory that U-Boot will be running from, initially.
config SYS_CLK_FREQ
depends on ARC || ARCH_SUNXI || MPC83xx
int "CPU clock frequency"
help
TODO: Move CONFIG_SYS_CLK_FREQ for all the architecture
config ARCH_FIXUP_FDT_MEMORY
bool "Enable arch_fixup_memory_banks() call"
default y
help
Enable FDT memory map syncup before OS boot. This feature can be
used for booting OS with different memory setup where the part of
the memory location should be used for different purpose.
endmenu # Boot images
source "api/Kconfig"
source "common/Kconfig"
source "cmd/Kconfig"
source "disk/Kconfig"
source "dts/Kconfig"
source "env/Kconfig"
source "net/Kconfig"
source "drivers/Kconfig"
source "fs/Kconfig"
source "lib/Kconfig"
source "test/Kconfig"

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GPL License Exception:
Even though U-Boot in general is covered by the GPL-2.0/GPL-2.0+,
this does *not* cover the so-called "standalone" applications that
use U-Boot services by means of the jump table provided by U-Boot
exactly for this purpose - this is merely considered normal use of
U-Boot, and does *not* fall under the heading of "derived work".
The header files "include/image.h" and "arch/*/include/asm/u-boot.h"
define interfaces to U-Boot. Including these (unmodified) header
files in another file is considered normal use of U-Boot, and does
*not* fall under the heading of "derived work".
-- Wolfgang Denk

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Copyright (c) 2010, Andrey Makarov (makarov@bmstu.ru, mka-at-mailru@mail.ru),
with Reserved Font Name Anka/Coder Narrow.
Copyright (c) 2011, Pablo Impallari (www.impallari.com|impallari@gmail.com),
Rodrigo Fuenzalida (www.rfuenzalida.com) with Reserved Font Name Cantora.
This Font Software is licensed under the SIL Open Font License, Version 1.1.
This license is copied below, and is also available with a FAQ at:
http://scripts.sil.org/OFL
-----------------------------------------------------------
SIL OPEN FONT LICENSE Version 1.1 - 26 February 2007
-----------------------------------------------------------
PREAMBLE
The goals of the Open Font License (OFL) are to stimulate worldwide
development of collaborative font projects, to support the font creation
efforts of academic and linguistic communities, and to provide a free and
open framework in which fonts may be shared and improved in partnership
with others.
The OFL allows the licensed fonts to be used, studied, modified and
redistributed freely as long as they are not sold by themselves. The
fonts, including any derivative works, can be bundled, embedded,
redistributed and/or sold with any software provided that any reserved
names are not used by derivative works. The fonts and derivatives,
however, cannot be released under any other type of license. The
requirement for fonts to remain under this license does not apply
to any document created using the fonts or their derivatives.
DEFINITIONS
"Font Software" refers to the set of files released by the Copyright
Holder(s) under this license and clearly marked as such. This may
include source files, build scripts and documentation.
"Reserved Font Name" refers to any names specified as such after the
copyright statement(s).
"Original Version" refers to the collection of Font Software components as
distributed by the Copyright Holder(s).
"Modified Version" refers to any derivative made by adding to, deleting,
or substituting -- in part or in whole -- any of the components of the
Original Version, by changing formats or by porting the Font Software to a
new environment.
"Author" refers to any designer, engineer, programmer, technical
writer or other person who contributed to the Font Software.
PERMISSION & CONDITIONS
Permission is hereby granted, free of charge, to any person obtaining
a copy of the Font Software, to use, study, copy, merge, embed, modify,
redistribute, and sell modified and unmodified copies of the Font
Software, subject to the following conditions:
1) Neither the Font Software nor any of its individual components,
in Original or Modified Versions, may be sold by itself.
2) Original or Modified Versions of the Font Software may be bundled,
redistributed and/or sold with any software, provided that each copy
contains the above copyright notice and this license. These can be
included either as stand-alone text files, human-readable headers or
in the appropriate machine-readable metadata fields within text or
binary files as long as those fields can be easily viewed by the user.
3) No Modified Version of the Font Software may use the Reserved Font
Name(s) unless explicit written permission is granted by the corresponding
Copyright Holder. This restriction only applies to the primary font name as
presented to the users.
4) The name(s) of the Copyright Holder(s) or the Author(s) of the Font
Software shall not be used to promote, endorse or advertise any
Modified Version, except to acknowledge the contribution(s) of the
Copyright Holder(s) and the Author(s) or with their explicit written
permission.
5) The Font Software, modified or unmodified, in part or in whole,
must be distributed entirely under this license, and must not be
distributed under any other license. The requirement for fonts to
remain under this license does not apply to any document created
using the Font Software.
TERMINATION
This license becomes null and void if any of the above conditions are
not met.
DISCLAIMER
THE FONT SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT
OF COPYRIGHT, PATENT, TRADEMARK, OR OTHER RIGHT. IN NO EVENT SHALL THE
COPYRIGHT HOLDER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
INCLUDING ANY GENERAL, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
DAMAGES, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM, OUT OF THE USE OR INABILITY TO USE THE FONT SOFTWARE OR FROM
OTHER DEALINGS IN THE FONT SOFTWARE.

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SPDX-License-Identifier: GPL-2.0
U-Boot is Free Software. It is copyrighted by Wolfgang Denk and
many others who contributed code (see the actual source code and the
git commit messages for details). You can redistribute U-Boot and/or
modify it under the terms of version 2 of the GNU General Public
License as published by the Free Software Foundation. Most of it can
also be distributed, at your option, under any later version of the
GNU General Public License -- see individual files for exceptions.
NOTE! This license does *not* cover the so-called "standalone"
applications that use U-Boot services by means of the jump table
provided by U-Boot exactly for this purpose - this is merely
considered normal use of U-Boot, and does *not* fall under the
heading of "derived work" -- see file Licenses/Exceptions for
details.
Also note that the GPL and the other licenses are copyrighted by
the Free Software Foundation and other organizations, but the
instance of code that they refer to (the U-Boot source code) is
copyrighted by me and others who actually wrote it.
-- Wolfgang Denk
Like many other projects, U-Boot has a tradition of including big
blocks of License headers in all files. This not only blows up the
source code with mostly redundant information, but also makes it very
difficult to generate License Clearing Reports. An additional problem
is that even the same licenses are referred to by a number of
slightly varying text blocks (full, abbreviated, different
indentation, line wrapping and/or white space, with obsolete address
information, ...) which makes automatic processing a nightmare.
To make this easier, such license headers in the source files will be
replaced with a single line reference to Unique License Identifiers
as defined by the Linux Foundation's SPDX project [1].
If a "SPDX-License-Identifier:" line references more than one Unique
License Identifier, then this means that the respective file can be
used under the terms of either of these licenses, i. e. with
SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
you can choose between GPL-2.0+ and BSD-3-Clause licensing.
We use the SPDX Unique License Identifiers here; these are available
at [2].
License identifier syntax
-------------------------
1. Placement:
The SPDX license identifier in U-Boot files shall be added at the first
possible line in a file which can contain a comment. For the majority
or files this is the first line, except for scripts which require the
'#!PATH_TO_INTERPRETER' in the first line. For those scripts the SPDX
identifier goes into the second line.
|
2. Style:
The SPDX license identifier is added in form of a comment. The comment
style depends on the file type::
C source: // SPDX-License-Identifier: <SPDX License Expression>
C header: /* SPDX-License-Identifier: <SPDX License Expression> */
ASM: /* SPDX-License-Identifier: <SPDX License Expression> */
scripts: # SPDX-License-Identifier: <SPDX License Expression>
.rst: .. SPDX-License-Identifier: <SPDX License Expression>
.dts{i}: // SPDX-License-Identifier: <SPDX License Expression>
If a specific tool cannot handle the standard comment style, then the
appropriate comment mechanism which the tool accepts shall be used. This
is the reason for having the "/\* \*/" style comment in C header
files. There was build breakage observed with generated .lds files where
'ld' failed to parse the C++ comment. This has been fixed by now, but
there are still older assembler tools which cannot handle C++ style
comments.
|
3. Syntax:
A <SPDX License Expression> is either an SPDX short form license
identifier found on the SPDX License List, or the combination of two
SPDX short form license identifiers separated by "WITH" when a license
exception applies. When multiple licenses apply, an expression consists
of keywords "AND", "OR" separating sub-expressions and surrounded by
"(", ")" .
License identifiers for licenses like [L]GPL with the 'or later' option
are constructed by using a "+" for indicating the 'or later' option.::
// SPDX-License-Identifier: GPL-2.0+
// SPDX-License-Identifier: LGPL-2.1+
WITH should be used when there is a modifier to a license needed.
For example, the linux kernel UAPI files use the expression::
// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
// SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note
Other examples using WITH exceptions found in the linux kernel are::
// SPDX-License-Identifier: GPL-2.0 WITH mif-exception
// SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0
Exceptions can only be used with particular License identifiers. The
valid License identifiers are listed in the tags of the exception text
file.
OR should be used if the file is dual licensed and only one license is
to be selected. For example, some dtsi files are available under dual
licenses::
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
Examples from U-Boot for license expressions in dual licensed files::
// SPDX-License-Identifier: GPL-2.0 OR MIT
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
AND should be used if the file has multiple licenses whose terms all
apply to use the file. For example, if code is inherited from another
project and permission has been given to put it in U-Boot, but the
original license terms need to remain in effect::
// SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) AND MIT
Another other example where both sets of license terms need to be
adhered to is::
// SPDX-License-Identifier: GPL-1.0+ AND LGPL-2.1+
[1] http://spdx.org/
[2] http://spdx.org/licenses/
Full name SPDX Identifier OSI Approved File name URI
=======================================================================================================================================
GNU General Public License v2.0 only GPL-2.0 Y gpl-2.0.txt http://www.gnu.org/licenses/gpl-2.0.txt
GNU General Public License v2.0 or later GPL-2.0+ Y gpl-2.0.txt http://www.gnu.org/licenses/gpl-2.0.txt
GNU Library General Public License v2 or later LGPL-2.0+ Y lgpl-2.0.txt http://www.gnu.org/licenses/old-licenses/lgpl-2.0.txt
GNU Lesser General Public License v2.1 or later LGPL-2.1+ Y lgpl-2.1.txt http://www.gnu.org/licenses/old-licenses/lgpl-2.1.txt
eCos license version 2.0 eCos-2.0 eCos-2.0.txt http://www.gnu.org/licenses/ecos-license.html
BSD 2-Clause License BSD-2-Clause Y bsd-2-clause.txt http://spdx.org/licenses/BSD-2-Clause
BSD 3-clause "New" or "Revised" License BSD-3-Clause Y bsd-3-clause.txt http://spdx.org/licenses/BSD-3-Clause#licenseText
IBM PIBS (PowerPC Initialization and IBM-pibs ibm-pibs.txt
Boot Software) license
ISC License ISC Y isc.txt https://spdx.org/licenses/ISC
SIL OPEN FONT LICENSE (OFL-1.1) OFL-1.1 Y OFL.txt https://spdx.org/licenses/OFL-1.1.html
X11 License X11 x11.txt https://spdx.org/licenses/X11.html

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Redistribution and use in source and binary forms, with or
without modification, are permitted provided that the following
conditions are met:
1. Redistributions of source code must retain the above
copyright notice, this list of conditions and the following
disclaimer.
2. Redistributions in binary form must reproduce the above
copyright notice, this list of conditions and the following
disclaimer in the documentation and/or other materials
provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions, and the following disclaimer,
without modification.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. The names of the above-listed copyright holders may not be used
to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Note that this license is not endorsed by the Free Software Foundation.
It is available here as a convenience to readers of [1]the license
list.
The eCos license version 2.0
This file is part of eCos, the Embedded Configurable Operating System.
Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
eCos is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2 or (at your option) any later
version.
eCos is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License along
with eCos; if not, write to the Free Software Foundation, Inc., 51
Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
As a special exception, if other files instantiate templates or use
macros or inline functions from this file, or you compile this file and
link it with other works to produce a work based on this file, this
file does not by itself cause the resulting work to be covered by the
GNU General Public License. However the source code for this file must
still be made available in accordance with section (3) of the GNU
General Public License.
This exception does not invalidate any other reasons why a work based
on this file might be covered by the GNU General Public License.
Alternative licenses for eCos may be arranged by contacting Red Hat,
Inc. at http://sources.redhat.com/ecos/ecos-license/
-------------------------------------------
####ECOSGPLCOPYRIGHTEND####
References
1. http://www.gnu.org/licenses/license-list.html

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GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
Preamble
The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
License is intended to guarantee your freedom to share and change free
software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
using it. (Some other Free Software Foundation software is covered by
the GNU Lesser General Public License instead.) You can apply it to
your programs, too.
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
this service if you wish), that you receive source code or can get it
if you want it, that you can change the software or use pieces of it
in new free programs; and that you know you can do these things.
To protect your rights, we need to make restrictions that forbid
anyone to deny you these rights or to ask you to surrender the rights.
These restrictions translate to certain responsibilities for you if you
distribute copies of the software, or if you modify it.
For example, if you distribute copies of such a program, whether
gratis or for a fee, you must give the recipients all the rights that
you have. You must make sure that they, too, receive or can get the
source code. And you must show them these terms so they know their
rights.
We protect your rights with two steps: (1) copyright the software, and
(2) offer you this license which gives you legal permission to copy,
distribute and/or modify the software.
Also, for each author's protection and ours, we want to make certain
that everyone understands that there is no warranty for this free
software. If the software is modified by someone else and passed on, we
want its recipients to know that what they have is not the original, so
that any problems introduced by others will not reflect on the original
authors' reputations.
Finally, any free program is threatened constantly by software
patents. We wish to avoid the danger that redistributors of a free
program will individually obtain patent licenses, in effect making the
program proprietary. To prevent this, we have made it clear that any
patent must be licensed for everyone's free use or not licensed at all.
The precise terms and conditions for copying, distribution and
modification follow.
GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License. The "Program", below,
refers to any such program or work, and a "work based on the Program"
means either the Program or any derivative work under copyright law:
that is to say, a work containing the Program or a portion of it,
either verbatim or with modifications and/or translated into another
language. (Hereinafter, translation is included without limitation in
the term "modification".) Each licensee is addressed as "you".
Activities other than copying, distribution and modification are not
covered by this License; they are outside its scope. The act of
running the Program is not restricted, and the output from the Program
is covered only if its contents constitute a work based on the
Program (independent of having been made by running the Program).
Whether that is true depends on what the Program does.
1. You may copy and distribute verbatim copies of the Program's
source code as you receive it, in any medium, provided that you
conspicuously and appropriately publish on each copy an appropriate
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notices that refer to this License and to the absence of any warranty;
and give any other recipients of the Program a copy of this License
along with the Program.
You may charge a fee for the physical act of transferring a copy, and
you may at your option offer warranty protection in exchange for a fee.
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These requirements apply to the modified work as a whole. If
identifiable sections of that work are not derived from the Program,
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Thus, it is not the intent of this section to claim rights or contest
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In addition, mere aggregation of another work not based on the Program
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This section is intended to make thoroughly clear what is believed to
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NO WARRANTY
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FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
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WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
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YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
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END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Programs
If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
Also add information on how to contact you by electronic and paper mail.
If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:
Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.
You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.
<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice
This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.

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This source code has been made available to you by IBM on an AS-IS
basis. Anyone receiving this source is licensed under IBM
copyrights to use it in any way he or she deems fit, including
copying it, modifying it, compiling it, and redistributing it either
with or without modifications. No license under IBM patents or
patent applications is to be implied by the copyright license.
Any user of this software should understand that IBM cannot provide
technical support for this software and will not be responsible for
any consequences resulting from the use of this software.
Any person who transfers this source code or any derivative work
must include the IBM copyright notice, this paragraph, and the
preceding two paragraphs in the transferred software.
COPYRIGHT I B M CORPORATION 1995
LICENSED MATERIAL - PROGRAM PROPERTY OF I B M

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ISC License:
Copyright (c) 2004-2010 by Internet Systems Consortium, Inc. ("ISC")
Copyright (c) 1995-2003 by Internet Software Consortium
Permission to use, copy, modify, and/or distribute this software
for any purpose with or without fee is hereby granted,
provided that the above copyright notice and this permission notice
appear in all copies.
THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES
WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE
FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR
ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF
THIS SOFTWARE.

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GNU LIBRARY GENERAL PUBLIC LICENSE
Version 2, June 1991
Copyright (C) 1991 Free Software Foundation, Inc.
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
[This is the first released version of the library GPL. It is
numbered 2 because it goes with version 2 of the ordinary GPL.]
Preamble
The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
Licenses are intended to guarantee your freedom to share and change
free software--to make sure the software is free for all its users.
This license, the Library General Public License, applies to some
specially designated Free Software Foundation software, and to any
other libraries whose authors decide to use it. You can use it for
your libraries, too.
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
this service if you wish), that you receive source code or can get it
if you want it, that you can change the software or use pieces of it
in new free programs; and that you know you can do these things.
To protect your rights, we need to make restrictions that forbid
anyone to deny you these rights or to ask you to surrender the rights.
These restrictions translate to certain responsibilities for you if
you distribute copies of the library, or if you modify it.
For example, if you distribute copies of the library, whether gratis
or for a fee, you must give the recipients all the rights that we gave
you. You must make sure that they, too, receive or can get the source
code. If you link a program with the library, you must provide
complete object files to the recipients so that they can relink them
with the library, after making changes to the library and recompiling
it. And you must show them these terms so they know their rights.
Our method of protecting your rights has two steps: (1) copyright
the library, and (2) offer you this license which gives you legal
permission to copy, distribute and/or modify the library.
Also, for each distributor's protection, we want to make certain
that everyone understands that there is no warranty for this free
library. If the library is modified by someone else and passed on, we
want its recipients to know that what they have is not the original
version, so that any problems introduced by others will not reflect on
the original authors' reputations.
Finally, any free program is threatened constantly by software
patents. We wish to avoid the danger that companies distributing free
software will individually obtain patent licenses, thus in effect
transforming the program into proprietary software. To prevent this,
we have made it clear that any patent must be licensed for everyone's
free use or not licensed at all.
Most GNU software, including some libraries, is covered by the ordinary
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GNU LIBRARY GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
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14. If you wish to incorporate parts of the Library into other free
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NO WARRANTY
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END OF TERMS AND CONDITIONS
How to Apply These Terms to Your New Libraries
If you develop a new library, and you want it to be of the greatest
possible use to the public, we recommend making it free software that
everyone can redistribute and change. You can do so by permitting
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To apply these terms, attach the following notices to the library. It is
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<one line to give the library's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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You should have received a copy of the GNU Lesser General Public
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Also add information on how to contact you by electronic and paper mail.
You should also get your employer (if you work as a programmer) or your
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necessary. Here is a sample; alter the names:
Yoyodyne, Inc., hereby disclaims all copyright interest in the
library `Frob' (a library for tweaking knobs) written by James Random Hacker.
<signature of Ty Coon>, 1 April 1990
Ty Coon, President of Vice
That's all there is to it!

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Copyright (c) 2014, Renesas Electronics Corporation
All rights reserved.
Redistribution and use in binary form, without modification, are permitted
provided that the following conditions are met:
1. Redistribution in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
2. The name of Renesas Electronics Corporation may not be used to endorse or
promote products derived from this software without specific prior written
permission.
3. Reverse engineering, decompilation, or disassembly of this software is
not permitted.
THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS ELECTRONICS CORPORATION DISCLAIMS
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, AND
NONINFRINGEMENT OF THIRD PARTY RIGHTS. IN NO EVENT SHALL RENESAS ELECTRONICS
CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.

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X11 License
Copyright (C) 1996 X Consortium
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
of the Software, and to permit persons to whom the Software is furnished to do
so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE X
CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name of the X Consortium shall not be
used in advertising or otherwise to promote the sale, use or other dealings in
this Software without prior written authorization from the X Consortium.
X Window System is a trademark of X Consortium, Inc.

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Descriptions of section entries:
P: Person (obsolete)
M: Mail patches to: FullName <address@domain>
R: Designated reviewer: FullName <address@domain>
These reviewers should be CCed on patches.
L: Mailing list that is relevant to this area
W: Web-page with status/info
Q: Patchwork web based patch tracking system site
T: SCM tree type and location.
Type is one of: git, hg, quilt, stgit, topgit
S: Status, one of the following:
Supported: Someone is actually paid to look after this.
Maintained: Someone actually looks after it.
Orphan: No current maintainer [but maybe you could take the
role as you write your new code].
F: Files and directories with wildcard patterns.
A trailing slash includes all files and subdirectory files.
F: drivers/net/ all files in and below drivers/net
F: drivers/net/* all files in drivers/net, but not below
F: */net/* all files in "any top level directory"/net
One pattern per line. Multiple F: lines acceptable.
N: Files and directories with regex patterns.
N: [^a-z]tegra all files whose path contains the word tegra
One pattern per line. Multiple N: lines acceptable.
scripts/get_maintainer.pl has different behavior for files that
match F: pattern and matches of N: patterns. By default,
get_maintainer will not look at git log history when an F: pattern
match occurs. When an N: match occurs, git log history is used
to also notify the people that have git commit signatures.
X: Files and directories that are NOT maintained, same rules as F:
Files exclusions are tested before file matches.
Can be useful for excluding a specific subdirectory, for instance:
F: net/
X: net/ipv6/
matches all files in and below net excluding net/ipv6/
K: Keyword perl extended regex pattern to match content in a
patch or file. For instance:
K: of_get_profile
matches patches or files that contain "of_get_profile"
K: \b(printk|pr_(info|err))\b
matches patches or files that contain one or more of the words
printk, pr_info or pr_err
One regex pattern per line. Multiple K: lines acceptable.
Note: For the hard of thinking, this list is meant to remain in alphabetical
order. If you could add yourselves to it in alphabetical order that would be
so much easier [Ed]
Maintainers List (try to look for most precise areas first)
-----------------------------------
ANDROID AB
M: Igor Opaniuk <igor.opaniuk@gmail.com>
R: Sam Protsenko <semen.protsenko@linaro.org>
S: Maintained
F: cmd/ab_select.c
F: common/android_ab.c
F: doc/android/ab.txt
F: include/android_ab.h
F: test/py/tests/test_android/test_ab.py
ANDROID AVB
M: Igor Opaniuk <igor.opaniuk@gmail.com>
S: Maintained
F: cmd/avb.c
F: common/avb_verify.c
F: doc/android/avb2.txt
F: include/avb_verify.h
F: lib/libavb/
F: test/py/tests/test_android/test_avb.py
ARC
M: Alexey Brodkin <alexey.brodkin@synopsys.com>
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-arc.git
F: arch/arc/
F: board/synopsys/
ARC HSDK CGU CLOCK
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
F: drivers/clk/clk-hsdk-cgu.c
F: include/dt-bindings/clock/snps,hsdk-cgu.h
F: doc/device-tree-bindings/clock/snps,hsdk-cgu.txt
ARC HSDK CREG GPIO
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
F: doc/device-tree-bindings/gpio/snps,creg-gpio.txt
F: drivers/gpio/hsdk-creg-gpio.c
ARC HSDK RESET
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
F: include/dt-bindings/reset/snps,hsdk-reset.h
F: drivers/reset/reset-hsdk.c
ARC SYNOPSYS DW MMC EXTENSIONS
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
F: doc/device-tree-bindings/mmc/snps,dw-mmc.txt
F: drivers/mmc/snps_dw_mmc.c
ARM
M: Tom Rini <trini@konsulko.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-arm.git
F: arch/arm/
F: cmd/arm/
ARM ALTERA SOCFPGA
M: Marek Vasut <marex@denx.de>
M: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
M: Ley Foon Tan <ley.foon.tan@intel.com>
S: Maintainted
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-socfpga.git
F: arch/arm/mach-socfpga/
F: drivers/sysreset/sysreset_socfpga*
ARM AMLOGIC SOC SUPPORT
M: Neil Armstrong <narmstrong@baylibre.com>
S: Maintained
L: u-boot-amlogic@groups.io
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic.git
F: arch/arm/mach-meson/
F: arch/arm/include/asm/arch-meson/
F: drivers/clk/meson/
F: drivers/serial/serial_meson.c
F: drivers/reset/reset-meson.c
F: drivers/i2c/meson_i2c.c
F: drivers/net/phy/meson-gxl.c
F: drivers/adc/meson-saradc.c
F: drivers/phy/meson*
F: drivers/mmc/meson_gx_mmc.c
F: drivers/spi/meson_spifc.c
F: drivers/pinctrl/meson/
F: drivers/power/domain/meson-gx-pwrc-vpu.c
F: drivers/video/meson/
F: include/configs/meson64.h
F: include/configs/meson64_android.h
N: meson
ARM BROADCOM BCM283X
M: Matthias Brugger <mbrugger@suse.com>
S: Maintained
F: arch/arm/dts/bcm283*
F: arch/arm/mach-bcm283x/
F: board/raspberrypi/
F: drivers/gpio/bcm2835_gpio.c
F: drivers/mmc/bcm2835_sdhci.c
F: drivers/mmc/bcm2835_sdhost.c
F: drivers/serial/serial_bcm283x_mu.c
F: drivers/serial/serial_bcm283x_pl011.c
F: drivers/video/bcm2835.c
F: include/dm/platform_data/serial_bcm283x_mu.h
F: include/dt-bindings/pinctrl/bcm2835.h
F: drivers/pinctrl/broadcom/
ARM BROADCOM BCMSTB
M: Thomas Fitzsimmons <fitzsim@fitzsim.org>
S: Maintained
F: arch/arm/mach-bcmstb/
F: board/broadcom/bcmstb/
F: configs/bcm7*_defconfig
F: doc/README.bcm7xxx
F: drivers/mmc/bcmstb_sdhci.c
F: drivers/spi/bcmstb_spi.c
ARM/CZ.NIC TURRIS MOX SUPPORT
M: Marek Behun <marek.behun@nic.cz>
S: Maintained
F: arch/arm/dts/armada-3720-turris-mox.dts
F: board/CZ.NIC/
F: configs/turris_*_defconfig
F: include/configs/turris_*.h
ARM FREESCALE IMX
M: Stefano Babic <sbabic@denx.de>
M: Fabio Estevam <festevam@gmail.com>
R: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git
F: arch/arm/cpu/arm1136/mx*/
F: arch/arm/cpu/arm926ejs/mx*/
F: arch/arm/cpu/armv7/vf610/
F: arch/arm/dts/*imx*
F: arch/arm/mach-imx/
F: arch/arm/include/asm/arch-imx/
F: arch/arm/include/asm/arch-mx*/
F: arch/arm/include/asm/arch-vf610/
F: arch/arm/include/asm/mach-imx/
F: board/freescale/*mx*/
ARM HISILICON
M: Peter Griffin <peter.griffin@linaro.org>
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
S: Maintained
F: arch/arm/cpu/armv8/hisilicon
F: arch/arm/include/asm/arch-hi6220/
F: arch/arm/include/asm/arch-hi3660/
ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX ARMADA-7K/8K
M: Stefan Roese <sr@denx.de>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-marvell.git
F: arch/arm/mach-kirkwood/
F: arch/arm/mach-mvebu/
F: drivers/ata/ahci_mvebu.c
F: drivers/ddr/marvell/
F: drivers/gpio/mvebu_gpio.c
F: drivers/spi/kirkwood_spi.c
F: drivers/pci/pci_mvebu.c
F: drivers/pci/pcie_dw_mvebu.c
F: drivers/watchdog/orion_wdt.c
ARM MARVELL PXA
M: Marek Vasut <marex@denx.de>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-pxa.git
F: arch/arm/cpu/pxa/
F: arch/arm/include/asm/arch-pxa/
ARM MEDIATEK
M: Ryder Lee <ryder.lee@mediatek.com>
M: Weijie Gao <weijie.gao@mediatek.com>
R: GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>
S: Maintained
F: arch/arm/mach-mediatek/
F: arch/arm/include/asm/arch-mediatek/
F: board/mediatek/
F: doc/README.mediatek
F: drivers/clk/mediatek/
F: drivers/mmc/mtk-sd.c
F: drivers/pinctrl/mediatek/
F: drivers/power/domain/mtk-power-domain.c
F: drivers/ram/mediatek/
F: drivers/spi/mtk_snfi_spi.c
F: drivers/timer/mtk_timer.c
F: drivers/watchdog/mtk_wdt.c
F: drivers/net/mtk_eth.c
F: drivers/reset/reset-mediatek.c
F: tools/mtk_image.c
F: tools/mtk_image.h
N: mediatek
ARM MICROCHIP/ATMEL AT91
M: Eugen Hristev <eugen.hristev@microchip.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-atmel.git
F: arch/arm/mach-at91/
F: board/atmel/
F: drivers/misc/microchip_flexcom.c
ARM OWL
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
S: Maintained
F: arch/arm/include/asm/arch-owl/
F: arch/arm/mach-owl/
F: board/ucRobotics/
F: drivers/clk/owl/
F: drivers/serial/serial_owl.c
ARM RENESAS RMOBILE/R-CAR
M: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
M: Marek Vasut <marek.vasut+renesas@gmail.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-sh.git
F: arch/arm/mach-rmobile/
ARM ROCKCHIP
M: Simon Glass <sjg@chromium.org>
M: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
M: Kever Yang <kever.yang@rock-chips.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip.git
F: arch/arm/include/asm/arch-rockchip/
F: arch/arm/mach-rockchip/
F: board/rockchip/
F: drivers/clk/rockchip/
F: drivers/gpio/rk_gpio.c
F: drivers/misc/rockchip-efuse.c
F: drivers/mmc/rockchip_sdhci.c
F: drivers/mmc/rockchip_dw_mmc.c
F: drivers/pinctrl/rockchip/
F: drivers/ram/rockchip/
F: drivers/sysreset/sysreset_rockchip.c
F: drivers/video/rockchip/
F: tools/rkcommon.c
F: tools/rkcommon.h
F: tools/rkimage.c
F: tools/rksd.c
F: tools/rkspi.c
ARM SAMSUNG
M: Minkyu Kang <mk7.kang@samsung.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-samsung.git
F: arch/arm/mach-exynos/
F: arch/arm/mach-s5pc1xx/
F: arch/arm/cpu/armv7/s5p-common/
ARM SNAPDRAGON
M: Ramon Fried <rfried.dev@gmail.com>
S: Maintained
F: arch/arm/mach-snapdragon/
F: drivers/gpio/msm_gpio.c
F: drivers/mmc/msm_sdhci.c
F: drivers/phy/msm8916-usbh-phy.c
F: drivers/serial/serial_msm.c
F: drivers/smem/msm_smem.c
F: drivers/usb/host/ehci-msm.c
ARM STI
M: Patrice Chotard <patrice.chotard@st.com>
S: Maintained
F: arch/arm/mach-sti/
F: arch/arm/include/asm/arch-sti*/
ARM STM SPEAR
#M: Vipin Kumar <vipin.kumar@st.com>
S: Orphaned (Since 2016-02)
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git
F: arch/arm/cpu/arm926ejs/spear/
F: arch/arm/include/asm/arch-spear/
ARM STM STM32MP
M: Patrick Delaunay <patrick.delaunay@st.com>
M: Patrice Chotard <patrice.chotard@st.com>
L: uboot-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers)
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git
S: Maintained
F: arch/arm/mach-stm32mp/
F: drivers/adc/stm32-adc*
F: drivers/clk/clk_stm32mp1.c
F: drivers/gpio/stm32_gpio.c
F: drivers/hwspinlock/stm32_hwspinlock.c
F: drivers/i2c/stm32f7_i2c.c
F: drivers/mailbox/stm32-ipcc.c
F: drivers/misc/stm32mp_fuse.c
F: drivers/misc/stm32_rcc.c
F: drivers/mmc/stm32_sdmmc2.c
F: drivers/mtd/nand/raw/stm32_fmc2_nand.c
F: drivers/phy/phy-stm32-usbphyc.c
F: drivers/pinctrl/pinctrl_stm32.c
F: drivers/power/pmic/stpmic1.c
F: drivers/power/regulator/stm32-vrefbuf.c
F: drivers/power/regulator/stpmic1.c
F: drivers/ram/stm32mp1/
F: drivers/remoteproc/stm32_copro.c
F: drivers/reset/stm32-reset.c
F: drivers/rtc/stm32_rtc.c
F: drivers/serial/serial_stm32.*
F: drivers/spi/stm32_qspi.c
F: drivers/spi/stm32_spi.c
F: drivers/video/stm32/stm32_ltdc.c
F: drivers/watchdog/stm32mp_wdt.c
F: include/dt-bindings/clock/stm32fx-clock.h
F: include/dt-bindings/clock/stm32mp1-clks.h
F: include/dt-bindings/clock/stm32mp1-clksrc.h
F: include/dt-bindings/pinctrl/stm32-pinfunc.h
F: include/dt-bindings/reset/stm32mp1-resets.h
F: include/stm32_rcc.h
F: tools/stm32image.c
ARM STM STV0991
M: Vikas Manocha <vikas.manocha@st.com>
S: Maintained
F: arch/arm/cpu/armv7/stv0991/
F: arch/arm/include/asm/arch-stv0991/
ARM SUNXI
M: Jagan Teki <jagan@amarulasolutions.com>
M: Maxime Ripard <mripard@kernel.org>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi.git
F: arch/arm/cpu/armv7/sunxi/
F: arch/arm/include/asm/arch-sunxi/
F: arch/arm/mach-sunxi/
F: board/sunxi/
ARM TEGRA
M: Tom Warren <twarren@nvidia.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-tegra.git
F: arch/arm/mach-tegra/
F: arch/arm/include/asm/arch-tegra*/
ARM TI
M: Tom Rini <trini@konsulko.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-ti.git
F: arch/arm/mach-davinci/
F: arch/arm/mach-k3/
F: arch/arm/mach-keystone/
F: arch/arm/include/asm/arch-omap*/
F: arch/arm/include/asm/ti-common/
ARM UNIPHIER
M: Masahiro Yamada <yamada.masahiro@socionext.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier.git
F: arch/arm/mach-uniphier/
F: configs/uniphier_*_defconfig
N: uniphier
ARM VERSAL
M: Michal Simek <michal.simek@xilinx.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-versal/
N: (?<!uni)versal
ARM VERSATILE EXPRESS DRIVERS
M: Liviu Dudau <liviu.dudau@foss.arm.com>
S: Maintained
T: git git://github.com/ARM-software/u-boot.git
F: drivers/misc/vexpress_config.c
N: vexpress
ARM ZYNQ
M: Michal Simek <monstr@monstr.eu>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-zynq/
F: drivers/clk/clk_zynq.c
F: drivers/fpga/zynqpl.c
F: drivers/gpio/zynq_gpio.c
F: drivers/i2c/i2c-cdns.c
F: drivers/i2c/muxes/pca954x.c
F: drivers/i2c/zynq_i2c.c
F: drivers/mmc/zynq_sdhci.c
F: drivers/mtd/nand/raw/zynq_nand.c
F: drivers/net/phy/xilinx_phy.c
F: drivers/net/zynq_gem.c
F: drivers/serial/serial_zynq.c
F: drivers/spi/zynq_qspi.c
F: drivers/spi/zynq_spi.c
F: drivers/usb/host/ehci-zynq.c
F: drivers/watchdog/cdns_wdt.c
F: include/zynqpl.h
F: tools/zynqimage.c
N: zynq
ARM ZYNQMP
M: Michal Simek <michal.simek@xilinx.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-zynqmp/
F: drivers/clk/clk_zynqmp.c
F: driver/firmware/firmware-zynqmp.c
F: drivers/fpga/zynqpl.c
F: drivers/gpio/zynq_gpio.c
F: drivers/i2c/i2c-cdns.c
F: drivers/i2c/muxes/pca954x.c
F: drivers/i2c/zynq_i2c.c
F: drivers/mailbox/zynqmp-ipi.c
F: drivers/mmc/zynq_sdhci.c
F: drivers/mtd/nand/raw/zynq_nand.c
F: drivers/net/phy/xilinx_phy.c
F: drivers/net/zynq_gem.c
F: drivers/serial/serial_zynq.c
F: drivers/spi/zynq_qspi.c
F: drivers/spi/zynq_spi.c
F: drivers/timer/cadence-ttc.c
F: drivers/usb/host/ehci-zynq.c
F: drivers/watchdog/cdns_wdt.c
F: include/zynqmppl.h
F: include/zynqmp_firmware.h
F: tools/zynqmp*
N: ultra96
N: zynqmp
ARM ZYNQMP R5
M: Michal Simek <michal.simek@xilinx.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-zynqmp-r5/
ARM PHYTIUM
M: liuhao <liuhao@phytium.com.cn>
M: shuyiqi <shuyiqi@phytium.com.cn>
S: Maintained
F: drivers/pci/pcie_phytium.c
F: arch/arm/dts/phytium-durian.dts
BINMAN
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: tools/binman/
BUILDMAN
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: tools/buildman/
CFI FLASH
M: Stefan Roese <sr@denx.de>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-cfi-flash.git
F: drivers/mtd/cfi_flash.c
F: drivers/mtd/jedec_flash.c
CLOCK
M: Lukasz Majewski <lukma@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-dfu.git
F: drivers/clk/
F: drivers/clk/imx/
COLDFIRE
M: Huan Wang <alison.wang@nxp.com>
M: Angelo Dureghello <angelo@sysam.it>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-coldfire.git
F: arch/m68k/
DFU
M: Lukasz Majewski <lukma@denx.de>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-dfu.git
F: cmd/dfu.c
F: cmd/usb_*.c
F: common/dfu.c
F: common/update.c
F: common/usb_storage.c
F: drivers/dfu/
F: drivers/usb/gadget/
DRIVER MODEL
M: Simon Glass <sjg@chromium.org>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-dm.git
F: drivers/core/
F: include/dm/
F: test/dm/
EFI PAYLOAD
M: Heinrich Schuchardt <xypron.glpk@gmx.de>
R: Alexander Graf <agraf@csgraf.de>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git
F: doc/uefi/*
F: include/capitalization.h
F: include/charset.h
F: include/cp1250.h
F: include/cp437.h
F: include/efi*
F: include/pe.h
F: include/asm-generic/pe.h
F: lib/charset.c
F: lib/efi*/
F: test/py/tests/test_efi*
F: test/unicode_ut.c
F: cmd/bootefi.c
F: cmd/efidebug.c
F: cmd/nvedit_efi.c
F: tools/file2include.c
ENVIRONMENT
M: Joe Hershberger <joe.hershberger@ni.com>
R: Wolfgang Denk <wd@denx.de>
S: Maintained
F: env/
F: include/env*
F: test/env/
F: tools/env*
F: tools/mkenvimage.c
FPGA
M: Michal Simek <michal.simek@xilinx.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git
F: drivers/fpga/
F: cmd/fpga.c
F: include/fpga.h
FLATTENED DEVICE TREE
M: Simon Glass <sjg@chromium.org>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-fdt.git
F: lib/fdtdec*
F: lib/libfdt/
F: include/fdt*
F: include/linux/libfdt*
F: cmd/fdt.c
F: common/fdt_support.c
FREEBSD
M: Rafal Jaworowski <raj@semihalf.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-freebsd.git
FREESCALE QORIQ
M: Priyanka Jain <priyanka.jain@nxp.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq.git
F: drivers/watchdog/sp805_wdt.c
I2C
M: Heiko Schocher <hs@denx.de>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-i2c.git
F: drivers/i2c/
LOGGING
M: Simon Glass <sjg@chromium.org>
S: Maintained
T: git https://gitlab.denx.de/u-boot/u-boot.git
F: common/log.c
F: cmd/log.c
F: test/log/log_test.c
F: test/py/tests/test_log.py
MALI DISPLAY PROCESSORS
M: Liviu Dudau <liviu.dudau@foss.arm.com>
S: Supported
T: git git://github.com/ARM-software/u-boot.git
F: drivers/video/mali_dp.c
F: drivers/i2c/i2c-versatile.c
MICROBLAZE
M: Michal Simek <monstr@monstr.eu>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/microblaze/
F: cmd/mfsl.c
F: drivers/gpio/xilinx_gpio.c
F: drivers/net/xilinx_axi_emac.c
F: drivers/net/xilinx_emaclite.c
F: drivers/serial/serial_xuartlite.c
F: drivers/spi/xilinx_spi.c
F: drivers/sysreset/sysreset_gpio.c
F: drivers/watchdog/xilinx_tb_wdt.c
N: xilinx
MIPS
M: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-mips.git
F: arch/mips/
MIPS MSCC
M: Gregory CLEMENT <gregory.clement@bootlin.com>
M: Lars Povlsen <lars.povlsen@microchip.com>
M: Horatiu Vultur <horatiu.vultur@microchip.com>
S: Maintained
F: arch/mips/mach-mscc/
F: arch/mips/dts/luton*
F: arch/mips/dts/mscc*
F: arch/mips/dts/ocelot*
F: arch/mips/dts/jr2*
F: arch/mips/dts/serval*
F: board/mscc/
F: configs/mscc*
F: drivers/gpio/mscc_sgpio.c
F: drivers/spi/mscc_bb_spi.c
F: include/configs/vcoreiii.h
F: include/dt-bindings/mscc/
F: drivers/pinctrl/mscc/
F: drivers/net/mscc_eswitch/
MIPS JZ4780
M: Ezequiel Garcia <ezequiel@collabora.com>
S: Maintained
F: arch/mips/mach-jz47xx/
MMC
M: Peng Fan <peng.fan@nxp.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-mmc.git
F: drivers/mmc/
NAND FLASH
#M: Scott Wood <oss@buserror.net>
S: Orphaned (Since 2018-07)
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-nand-flash.git
F: drivers/mtd/nand/raw/
NDS32
M: Rick Chen <rick@andestech.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-nds32.git
F: arch/nds32/
NETWORK
M: Joe Hershberger <joe.hershberger@ni.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-net.git
F: drivers/net/
F: include/net.h
F: net/
NIOS
M: Thomas Chou <thomas@wytron.com.tw>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-nios.git
F: arch/nios2/
ONENAND
#M: Lukasz Majewski <l.majewski@majess.pl>
S: Orphaned (Since 2017-01)
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-onenand.git
F: drivers/mtd/onenand/
PATMAN
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: tools/patman/
PCI Endpoint
M: Ramon Fried <rfried.dev@gmail.com>
S: Maintained
F: drivers/pci_endpoint/
F: include/pci_ep.h
PCI MPC85xx
M: Heiko Schocher <hs@denx.de>
S: Maintained
F: drivers/pci/pci_mpc85xx.c
POWER
M: Jaehoon Chung <jh80.chung@samsung.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-pmic.git
F: drivers/power/
POWERPC
M: Wolfgang Denk <wd@denx.de>
S: Maintained
F: arch/powerpc/
POWERPC MPC8XX
M: Christophe Leroy <christophe.leroy@c-s.fr>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-mpc8xx.git
F: arch/powerpc/cpu/mpc8xx/
POWERPC MPC83XX
M: Mario Six <mario.six@gdsys.cc>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-mpc83xx.git
F: drivers/ram/mpc83xx_sdram.c
F: include/dt-bindings/memory/mpc83xx-sdram.h
F: drivers/sysreset/sysreset_mpc83xx.c
F: drivers/sysreset/sysreset_mpc83xx.h
F: drivers/clk/mpc83xx_clk.c
F: drivers/clk/mpc83xx_clk.h
F: include/dt-bindings/clk/mpc83xx-clk.h
F: drivers/timer/mpc83xx_timer.c
F: drivers/cpu/mpc83xx_cpu.c
F: drivers/cpu/mpc83xx_cpu.h
F: drivers/misc/mpc83xx_serdes.c
F: arch/powerpc/cpu/mpc83xx/
F: arch/powerpc/include/asm/arch-mpc83xx/
POWERPC MPC85XX
M: Priyanka Jain <priyanka.jain@nxp.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx.git
F: arch/powerpc/cpu/mpc85xx/
POWERPC MPC86XX
M: Priyanka Jain <priyanka.jain@nxp.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-mpc86xx.git
F: arch/powerpc/cpu/mpc86xx/
RISC-V
M: Rick Chen <rick@andestech.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-riscv.git
F: arch/riscv/
F: cmd/riscv/
F: tools/prelink-riscv.c
ROCKUSB
M: Eddie Cai <eddie.cai.linux@gmail.com>
S: Maintained
F: drivers/usb/gadget/f_rockusb.c
F: cmd/rockusb.c
F: doc/README.rockusb
SANDBOX
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: arch/sandbox/
SH
M: Marek Vasut <marek.vasut+renesas@gmail.com>
M: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-sh.git
F: arch/sh/
SPI
M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-spi.git
F: drivers/spi/
F: include/spi*
SPI-NOR
M: Jagan Teki <jagan@amarulasolutions.com>
M: Vignesh R <vigneshr@ti.com>
S: Maintained
F: drivers/mtd/spi/
F: include/spi_flash.h
F: include/linux/mtd/cfi.h
F: include/linux/mtd/spi-nor.h
SPMI
M: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
S: Maintained
F: drivers/spmi/
F: include/spmi/
TDA19988 HDMI ENCODER
M: Liviu Dudau <liviu.dudau@foss.arm.com>
S: Maintained
F: drivers/video/tda19988.c
TI SYSTEM SECURITY
M: Andrew F. Davis <afd@ti.com>
S: Supported
F: arch/arm/mach-omap2/omap5/sec_entry_cpu1.S
F: arch/arm/mach-omap2/sec-common.c
F: arch/arm/mach-omap2/config_secure.mk
F: arch/arm/mach-k3/security.c
F: arch/arm/mach-k3/config_secure.mk
F: configs/am335x_hs_evm_defconfig
F: configs/am335x_hs_evm_uart_defconfig
F: configs/am43xx_hs_evm_defconfig
F: configs/am57xx_hs_evm_defconfig
F: configs/am57xx_hs_evm_usb_defconfig
F: configs/dra7xx_hs_evm_defconfig
F: configs/dra7xx_hs_evm_usb_defconfig
F: configs/k2hk_hs_evm_defconfig
F: configs/k2e_hs_evm_defconfig
F: configs/k2g_hs_evm_defconfig
F: configs/k2l_hs_evm_defconfig
F: configs/am65x_hs_evm_r5_defconfig
F: configs/am65x_hs_evm_a53_defconfig
TQ GROUP
#M: Martin Krause <martin.krause@tq-systems.de>
S: Orphaned (Since 2016-02)
T: git git://git.denx.de/u-boot-tq-group.git
TEE
M: Jens Wiklander <jens.wiklander@linaro.org>
S: Maintained
F: drivers/tee/
F: include/tee.h
F: include/tee/
TEE-lib
M: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
S: Maintained
F: lib/optee
UBI
M: Kyungmin Park <kmpark@infradead.org>
M: Heiko Schocher <hs@denx.de>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-ubi.git
F: drivers/mtd/ubi/
UFS
M: Faiz Abbas <faiz_abbas@ti.com>
S: Maintained
F: drivers/ufs/
USB
M: Marek Vasut <marex@denx.de>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-usb.git
F: drivers/usb/
F: common/usb.c
F: common/usb_kbd.c
USB xHCI
M: Bin Meng <bmeng.cn@gmail.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-usb.git topic-xhci
F: drivers/usb/host/xhci*
F: include/usb/xhci.h
VIDEO
M: Anatolij Gustschin <agust@denx.de>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-video.git
F: drivers/video/
F: common/lcd*.c
F: include/lcd*.h
F: include/video*.h
X86
M: Simon Glass <sjg@chromium.org>
M: Bin Meng <bmeng.cn@gmail.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-x86.git
F: arch/x86/
F: cmd/x86/
XTENSA
M: Max Filippov <jcmvbkbc@gmail.com>
S: Maintained
F: arch/xtensa/
THE REST
M: Tom Rini <trini@konsulko.com>
L: u-boot@lists.denx.de
Q: http://patchwork.ozlabs.org/project/uboot/list/
S: Maintained
T: git https://gitlab.denx.de/u-boot/u-boot.git
F: configs/tools-only_defconfig
F: *
F: */

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@ -0,0 +1,9 @@
menu "API"
config API
bool "Enable U-Boot API"
default n
help
This option enables the U-Boot API. See api/README for more information.
endmenu

8
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# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2007 Semihalf
obj-y += api.o api_display.o api_net.o api_storage.o
obj-$(CONFIG_ARM) += api_platform-arm.o
obj-$(CONFIG_PPC) += api_platform-powerpc.o
obj-$(CONFIG_MIPS) += api_platform-mips.o

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U-Boot machine/arch independent API for external apps
=====================================================
1. Main assumptions
- there is a single entry point (syscall) to the API
- per current design the syscall is a C-callable function in the U-Boot
text, which might evolve into a real syscall using machine exception trap
once this initial version proves functional
- the consumer app is responsible for producing appropriate context (call
number and arguments)
- upon entry, the syscall dispatches the call to other (existing) U-Boot
functional areas like networking or storage operations
- consumer application will recognize the API is available by searching
a specified (assumed by convention) range of address space for the
signature
- the U-Boot integral part of the API is meant to be thin and non-intrusive,
leaving as much processing as possible on the consumer application side,
for example it doesn't keep states, but relies on hints from the app and
so on
- optional (CONFIG_API)
2. Calls
- console related (getc, putc, tstc etc.)
- system (reset, platform info)
- time (delay, current)
- env vars (enumerate all, get, set)
- devices (enumerate all, open, close, read, write); currently two classes
of devices are recognized and supported: network and storage (ide, scsi,
usb etc.)
3. Structure overview
- core API, integral part of U-Boot, mandatory
- implements the single entry point (mimics UNIX syscall)
- glue
- entry point at the consumer side, allows to make syscall, mandatory
part
- helper conveniency wrappers so that consumer app does not have to use
the syscall directly, but in a more friendly manner (a la libc calls),
optional part
- consumer application
- calls directly, or leverages the provided glue mid-layer

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// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*/
#include <config.h>
#include <command.h>
#include <common.h>
#include <env.h>
#include <malloc.h>
#include <env_internal.h>
#include <linux/types.h>
#include <api_public.h>
#include <u-boot/crc.h>
#include "api_private.h"
#define DEBUG
#undef DEBUG
/*****************************************************************************
*
* This is the API core.
*
* API_ functions are part of U-Boot code and constitute the lowest level
* calls:
*
* - they know what values they need as arguments
* - their direct return value pertains to the API_ "shell" itself (0 on
* success, some error code otherwise)
* - if the call returns a value it is buried within arguments
*
****************************************************************************/
#ifdef DEBUG
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
#else
#define debugf(fmt, args...)
#endif
typedef int (*cfp_t)(va_list argp);
static int calls_no;
/*
* pseudo signature:
*
* int API_getc(int *c)
*/
static int API_getc(va_list ap)
{
int *c;
if ((c = (int *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
*c = getc();
return 0;
}
/*
* pseudo signature:
*
* int API_tstc(int *c)
*/
static int API_tstc(va_list ap)
{
int *t;
if ((t = (int *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
*t = tstc();
return 0;
}
/*
* pseudo signature:
*
* int API_putc(char *ch)
*/
static int API_putc(va_list ap)
{
char *c;
if ((c = (char *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
putc(*c);
return 0;
}
/*
* pseudo signature:
*
* int API_puts(char **s)
*/
static int API_puts(va_list ap)
{
char *s;
if ((s = (char *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
puts(s);
return 0;
}
/*
* pseudo signature:
*
* int API_reset(void)
*/
static int API_reset(va_list ap)
{
do_reset(NULL, 0, 0, NULL);
/* NOT REACHED */
return 0;
}
/*
* pseudo signature:
*
* int API_get_sys_info(struct sys_info *si)
*
* fill out the sys_info struct containing selected parameters about the
* machine
*/
static int API_get_sys_info(va_list ap)
{
struct sys_info *si;
si = (struct sys_info *)va_arg(ap, uintptr_t);
if (si == NULL)
return API_ENOMEM;
return (platform_sys_info(si)) ? 0 : API_ENODEV;
}
/*
* pseudo signature:
*
* int API_udelay(unsigned long *udelay)
*/
static int API_udelay(va_list ap)
{
unsigned long *d;
if ((d = (unsigned long *)va_arg(ap, unsigned long)) == NULL)
return API_EINVAL;
udelay(*d);
return 0;
}
/*
* pseudo signature:
*
* int API_get_timer(unsigned long *current, unsigned long *base)
*/
static int API_get_timer(va_list ap)
{
unsigned long *base, *cur;
cur = (unsigned long *)va_arg(ap, unsigned long);
if (cur == NULL)
return API_EINVAL;
base = (unsigned long *)va_arg(ap, unsigned long);
if (base == NULL)
return API_EINVAL;
*cur = get_timer(*base);
return 0;
}
/*****************************************************************************
*
* pseudo signature:
*
* int API_dev_enum(struct device_info *)
*
*
* cookies uniqely identify the previously enumerated device instance and
* provide a hint for what to inspect in current enum iteration:
*
* - net: &eth_device struct address from list pointed to by eth_devices
*
* - storage: struct blk_desc struct address from &ide_dev_desc[n],
* &scsi_dev_desc[n] and similar tables
*
****************************************************************************/
static int API_dev_enum(va_list ap)
{
struct device_info *di;
/* arg is ptr to the device_info struct we are going to fill out */
di = (struct device_info *)va_arg(ap, uintptr_t);
if (di == NULL)
return API_EINVAL;
if (di->cookie == NULL) {
/* start over - clean up enumeration */
dev_enum_reset(); /* XXX shouldn't the name contain 'stor'? */
debugf("RESTART ENUM\n");
/* net device enumeration first */
if (dev_enum_net(di))
return 0;
}
/*
* The hidden assumption is there can only be one active network
* device and it is identified upon enumeration (re)start, so there's
* no point in trying to find network devices in other cases than the
* (re)start and hence the 'next' device can only be storage
*/
if (!dev_enum_storage(di))
/* make sure we mark there are no more devices */
di->cookie = NULL;
return 0;
}
static int API_dev_open(va_list ap)
{
struct device_info *di;
int err = 0;
/* arg is ptr to the device_info struct */
di = (struct device_info *)va_arg(ap, uintptr_t);
if (di == NULL)
return API_EINVAL;
/* Allow only one consumer of the device at a time */
if (di->state == DEV_STA_OPEN)
return API_EBUSY;
if (di->cookie == NULL)
return API_ENODEV;
if (di->type & DEV_TYP_STOR)
err = dev_open_stor(di->cookie);
else if (di->type & DEV_TYP_NET)
err = dev_open_net(di->cookie);
else
err = API_ENODEV;
if (!err)
di->state = DEV_STA_OPEN;
return err;
}
static int API_dev_close(va_list ap)
{
struct device_info *di;
int err = 0;
/* arg is ptr to the device_info struct */
di = (struct device_info *)va_arg(ap, uintptr_t);
if (di == NULL)
return API_EINVAL;
if (di->state == DEV_STA_CLOSED)
return 0;
if (di->cookie == NULL)
return API_ENODEV;
if (di->type & DEV_TYP_STOR)
err = dev_close_stor(di->cookie);
else if (di->type & DEV_TYP_NET)
err = dev_close_net(di->cookie);
else
/*
* In case of unknown device we cannot change its state, so
* only return error code
*/
err = API_ENODEV;
if (!err)
di->state = DEV_STA_CLOSED;
return err;
}
/*
* pseudo signature:
*
* int API_dev_write(
* struct device_info *di,
* void *buf,
* int *len,
* unsigned long *start
* )
*
* buf: ptr to buffer from where to get the data to send
*
* len: ptr to length to be read
* - network: len of packet to be sent (in bytes)
* - storage: # of blocks to write (can vary in size depending on define)
*
* start: ptr to start block (only used for storage devices, ignored for
* network)
*/
static int API_dev_write(va_list ap)
{
struct device_info *di;
void *buf;
lbasize_t *len_stor, act_len_stor;
lbastart_t *start;
int *len_net;
int err = 0;
/* 1. arg is ptr to the device_info struct */
di = (struct device_info *)va_arg(ap, uintptr_t);
if (di == NULL)
return API_EINVAL;
/* XXX should we check if device is open? i.e. the ->state ? */
if (di->cookie == NULL)
return API_ENODEV;
/* 2. arg is ptr to buffer from where to get data to write */
buf = (void *)va_arg(ap, uintptr_t);
if (buf == NULL)
return API_EINVAL;
if (di->type & DEV_TYP_STOR) {
/* 3. arg - ptr to var with # of blocks to write */
len_stor = (lbasize_t *)va_arg(ap, uintptr_t);
if (!len_stor)
return API_EINVAL;
if (*len_stor <= 0)
return API_EINVAL;
/* 4. arg - ptr to var with start block */
start = (lbastart_t *)va_arg(ap, uintptr_t);
act_len_stor = dev_write_stor(di->cookie, buf, *len_stor, *start);
if (act_len_stor != *len_stor) {
debugf("write @ %llu: done %llu out of %llu blocks",
(uint64_t)blk, (uint64_t)act_len_stor,
(uint64_t)len_stor);
return API_EIO;
}
} else if (di->type & DEV_TYP_NET) {
/* 3. arg points to the var with length of packet to write */
len_net = (int *)va_arg(ap, uintptr_t);
if (!len_net)
return API_EINVAL;
if (*len_net <= 0)
return API_EINVAL;
err = dev_write_net(di->cookie, buf, *len_net);
} else
err = API_ENODEV;
return err;
}
/*
* pseudo signature:
*
* int API_dev_read(
* struct device_info *di,
* void *buf,
* size_t *len,
* unsigned long *start
* size_t *act_len
* )
*
* buf: ptr to buffer where to put the read data
*
* len: ptr to length to be read
* - network: len of packet to read (in bytes)
* - storage: # of blocks to read (can vary in size depending on define)
*
* start: ptr to start block (only used for storage devices, ignored for
* network)
*
* act_len: ptr to where to put the len actually read
*/
static int API_dev_read(va_list ap)
{
struct device_info *di;
void *buf;
lbasize_t *len_stor, *act_len_stor;
lbastart_t *start;
int *len_net, *act_len_net;
/* 1. arg is ptr to the device_info struct */
di = (struct device_info *)va_arg(ap, uintptr_t);
if (di == NULL)
return API_EINVAL;
/* XXX should we check if device is open? i.e. the ->state ? */
if (di->cookie == NULL)
return API_ENODEV;
/* 2. arg is ptr to buffer from where to put the read data */
buf = (void *)va_arg(ap, uintptr_t);
if (buf == NULL)
return API_EINVAL;
if (di->type & DEV_TYP_STOR) {
/* 3. arg - ptr to var with # of blocks to read */
len_stor = (lbasize_t *)va_arg(ap, uintptr_t);
if (!len_stor)
return API_EINVAL;
if (*len_stor <= 0)
return API_EINVAL;
/* 4. arg - ptr to var with start block */
start = (lbastart_t *)va_arg(ap, uintptr_t);
/* 5. arg - ptr to var where to put the len actually read */
act_len_stor = (lbasize_t *)va_arg(ap, uintptr_t);
if (!act_len_stor)
return API_EINVAL;
*act_len_stor = dev_read_stor(di->cookie, buf, *len_stor, *start);
} else if (di->type & DEV_TYP_NET) {
/* 3. arg points to the var with length of packet to read */
len_net = (int *)va_arg(ap, uintptr_t);
if (!len_net)
return API_EINVAL;
if (*len_net <= 0)
return API_EINVAL;
/* 4. - ptr to var where to put the len actually read */
act_len_net = (int *)va_arg(ap, uintptr_t);
if (!act_len_net)
return API_EINVAL;
*act_len_net = dev_read_net(di->cookie, buf, *len_net);
} else
return API_ENODEV;
return 0;
}
/*
* pseudo signature:
*
* int API_env_get(const char *name, char **value)
*
* name: ptr to name of env var
*/
static int API_env_get(va_list ap)
{
char *name, **value;
if ((name = (char *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
if ((value = (char **)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
*value = env_get(name);
return 0;
}
/*
* pseudo signature:
*
* int API_env_set(const char *name, const char *value)
*
* name: ptr to name of env var
*
* value: ptr to value to be set
*/
static int API_env_set(va_list ap)
{
char *name, *value;
if ((name = (char *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
if ((value = (char *)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
env_set(name, value);
return 0;
}
/*
* pseudo signature:
*
* int API_env_enum(const char *last, char **next)
*
* last: ptr to name of env var found in last iteration
*/
static int API_env_enum(va_list ap)
{
int i, buflen;
char *last, **next, *s;
struct env_entry *match, search;
static char *var;
last = (char *)va_arg(ap, unsigned long);
if ((next = (char **)va_arg(ap, uintptr_t)) == NULL)
return API_EINVAL;
if (last == NULL) {
var = NULL;
i = 0;
} else {
var = strdup(last);
s = strchr(var, '=');
if (s != NULL)
*s = 0;
search.key = var;
i = hsearch_r(search, ENV_FIND, &match, &env_htab, 0);
if (i == 0) {
i = API_EINVAL;
goto done;
}
}
/* match the next entry after i */
i = hmatch_r("", i, &match, &env_htab);
if (i == 0)
goto done;
buflen = strlen(match->key) + strlen(match->data) + 2;
var = realloc(var, buflen);
snprintf(var, buflen, "%s=%s", match->key, match->data);
*next = var;
return 0;
done:
free(var);
var = NULL;
*next = NULL;
return i;
}
/*
* pseudo signature:
*
* int API_display_get_info(int type, struct display_info *di)
*/
static int API_display_get_info(va_list ap)
{
int type;
struct display_info *di;
type = va_arg(ap, int);
di = va_arg(ap, struct display_info *);
return display_get_info(type, di);
}
/*
* pseudo signature:
*
* int API_display_draw_bitmap(ulong bitmap, int x, int y)
*/
static int API_display_draw_bitmap(va_list ap)
{
ulong bitmap;
int x, y;
bitmap = va_arg(ap, ulong);
x = va_arg(ap, int);
y = va_arg(ap, int);
return display_draw_bitmap(bitmap, x, y);
}
/*
* pseudo signature:
*
* void API_display_clear(void)
*/
static int API_display_clear(va_list ap)
{
display_clear();
return 0;
}
static cfp_t calls_table[API_MAXCALL] = { NULL, };
/*
* The main syscall entry point - this is not reentrant, only one call is
* serviced until finished.
*
* e.g. syscall(1, int *, u_int32_t, u_int32_t, u_int32_t, u_int32_t);
*
* call: syscall number
*
* retval: points to the return value placeholder, this is the place the
* syscall puts its return value, if NULL the caller does not
* expect a return value
*
* ... syscall arguments (variable number)
*
* returns: 0 if the call not found, 1 if serviced
*/
int syscall(int call, int *retval, ...)
{
va_list ap;
int rv;
if (call < 0 || call >= calls_no) {
debugf("invalid call #%d\n", call);
return 0;
}
if (calls_table[call] == NULL) {
debugf("syscall #%d does not have a handler\n", call);
return 0;
}
va_start(ap, retval);
rv = calls_table[call](ap);
if (retval != NULL)
*retval = rv;
return 1;
}
void api_init(void)
{
struct api_signature *sig;
/* TODO put this into linker set one day... */
calls_table[API_RSVD] = NULL;
calls_table[API_GETC] = &API_getc;
calls_table[API_PUTC] = &API_putc;
calls_table[API_TSTC] = &API_tstc;
calls_table[API_PUTS] = &API_puts;
calls_table[API_RESET] = &API_reset;
calls_table[API_GET_SYS_INFO] = &API_get_sys_info;
calls_table[API_UDELAY] = &API_udelay;
calls_table[API_GET_TIMER] = &API_get_timer;
calls_table[API_DEV_ENUM] = &API_dev_enum;
calls_table[API_DEV_OPEN] = &API_dev_open;
calls_table[API_DEV_CLOSE] = &API_dev_close;
calls_table[API_DEV_READ] = &API_dev_read;
calls_table[API_DEV_WRITE] = &API_dev_write;
calls_table[API_ENV_GET] = &API_env_get;
calls_table[API_ENV_SET] = &API_env_set;
calls_table[API_ENV_ENUM] = &API_env_enum;
calls_table[API_DISPLAY_GET_INFO] = &API_display_get_info;
calls_table[API_DISPLAY_DRAW_BITMAP] = &API_display_draw_bitmap;
calls_table[API_DISPLAY_CLEAR] = &API_display_clear;
calls_no = API_MAXCALL;
debugf("API initialized with %d calls\n", calls_no);
dev_stor_init();
/*
* Produce the signature so the API consumers can find it
*/
sig = malloc(sizeof(struct api_signature));
if (sig == NULL) {
printf("API: could not allocate memory for the signature!\n");
return;
}
env_set_hex("api_address", (unsigned long)sig);
debugf("API sig @ 0x%lX\n", (unsigned long)sig);
memcpy(sig->magic, API_SIG_MAGIC, 8);
sig->version = API_SIG_VERSION;
sig->syscall = &syscall;
sig->checksum = 0;
sig->checksum = crc32(0, (unsigned char *)sig,
sizeof(struct api_signature));
debugf("syscall entry: 0x%lX\n", (unsigned long)sig->syscall);
}
void platform_set_mr(struct sys_info *si, unsigned long start, unsigned long size,
int flags)
{
int i;
if (!si->mr || !size || (flags == 0))
return;
/* find free slot */
for (i = 0; i < si->mr_no; i++)
if (si->mr[i].flags == 0) {
/* insert new mem region */
si->mr[i].start = start;
si->mr[i].size = size;
si->mr[i].flags = flags;
return;
}
}

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2011 The Chromium OS Authors.
*/
#include <common.h>
#include <api_public.h>
#include <lcd.h>
#include <video_font.h> /* Get font width and height */
/* lcd.h needs BMP_LOGO_HEIGHT to calculate CONSOLE_ROWS */
#if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
#include <bmp_logo.h>
#endif
/* TODO(clchiou): add support of video device */
int display_get_info(int type, struct display_info *di)
{
if (!di)
return API_EINVAL;
switch (type) {
default:
debug("%s: unsupport display device type: %d\n",
__FILE__, type);
return API_ENODEV;
#ifdef CONFIG_LCD
case DISPLAY_TYPE_LCD:
di->pixel_width = panel_info.vl_col;
di->pixel_height = panel_info.vl_row;
di->screen_rows = lcd_get_screen_rows();
di->screen_cols = lcd_get_screen_columns();
break;
#endif
}
di->type = type;
return 0;
}
int display_draw_bitmap(ulong bitmap, int x, int y)
{
if (!bitmap)
return API_EINVAL;
#ifdef CONFIG_LCD
return lcd_display_bitmap(bitmap, x, y);
#else
return API_ENODEV;
#endif
}
void display_clear(void)
{
#ifdef CONFIG_LCD
lcd_clear();
#endif
}

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// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*/
#include <config.h>
#include <common.h>
#include <net.h>
#include <linux/types.h>
#include <api_public.h>
#define DEBUG
#undef DEBUG
#ifdef DEBUG
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
#else
#define debugf(fmt, args...)
#endif
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
static int dev_valid_net(void *cookie)
{
return ((void *)eth_get_dev() == cookie) ? 1 : 0;
}
int dev_open_net(void *cookie)
{
if (!dev_valid_net(cookie))
return API_ENODEV;
if (eth_init() < 0)
return API_EIO;
return 0;
}
int dev_close_net(void *cookie)
{
if (!dev_valid_net(cookie))
return API_ENODEV;
eth_halt();
return 0;
}
/*
* There can only be one active eth interface at a time - use what is
* currently set to eth_current
*/
int dev_enum_net(struct device_info *di)
{
struct eth_device *eth_current = eth_get_dev();
di->type = DEV_TYP_NET;
di->cookie = (void *)eth_current;
if (di->cookie == NULL)
return 0;
memcpy(di->di_net.hwaddr, eth_current->enetaddr, 6);
debugf("device found, returning cookie 0x%08x\n",
(u_int32_t)di->cookie);
return 1;
}
int dev_write_net(void *cookie, void *buf, int len)
{
/* XXX verify that cookie points to a valid net device??? */
return eth_send(buf, len);
}
int dev_read_net(void *cookie, void *buf, int len)
{
/* XXX verify that cookie points to a valid net device??? */
return eth_receive(buf, len);
}
#else
int dev_open_net(void *cookie)
{
return API_ENODEV;
}
int dev_close_net(void *cookie)
{
return API_ENODEV;
}
int dev_enum_net(struct device_info *di)
{
return 0;
}
int dev_write_net(void *cookie, void *buf, int len)
{
return API_ENODEV;
}
int dev_read_net(void *cookie, void *buf, int len)
{
return API_ENODEV;
}
#endif

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// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* This file contains routines that fetch data from ARM-dependent sources
* (bd_info etc.)
*/
#include <config.h>
#include <linux/types.h>
#include <api_public.h>
#include <asm/u-boot.h>
#include <asm/global_data.h>
#include "api_private.h"
DECLARE_GLOBAL_DATA_PTR;
/*
* Important notice: handling of individual fields MUST be kept in sync with
* include/asm-arm/u-boot.h and include/asm-arm/global_data.h, so any changes
* need to reflect their current state and layout of structures involved!
*/
int platform_sys_info(struct sys_info *si)
{
int i;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
platform_set_mr(si, gd->bd->bi_dram[i].start,
gd->bd->bi_dram[i].size, MR_ATTR_DRAM);
return 1;
}

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// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Stanislav Galabov <sgalabov@gmail.com>
*
* This file contains routines that fetch data from bd_info sources
*/
#include <config.h>
#include <linux/types.h>
#include <api_public.h>
#include <asm/u-boot.h>
#include <asm/global_data.h>
#include "api_private.h"
DECLARE_GLOBAL_DATA_PTR;
/*
* Important notice: handling of individual fields MUST be kept in sync with
* include/asm-generic/u-boot.h, so any changes
* need to reflect their current state and layout of structures involved!
*/
int platform_sys_info(struct sys_info *si)
{
platform_set_mr(si, gd->bd->bi_memstart,
gd->bd->bi_memsize, MR_ATTR_DRAM);
return 1;
}

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// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
* This file contains routines that fetch data from PowerPC-dependent sources
* (bd_info etc.)
*/
#include <config.h>
#include <linux/types.h>
#include <api_public.h>
#include <asm/u-boot.h>
#include <asm/global_data.h>
#include "api_private.h"
DECLARE_GLOBAL_DATA_PTR;
/*
* Important notice: handling of individual fields MUST be kept in sync with
* include/asm-ppc/u-boot.h and include/asm-ppc/global_data.h, so any changes
* need to reflect their current state and layout of structures involved!
*/
int platform_sys_info(struct sys_info *si)
{
si->clk_bus = gd->bus_clk;
si->clk_cpu = gd->cpu_clk;
#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#define bi_bar bi_immr_base
#elif defined(CONFIG_MPC83xx)
#define bi_bar bi_immrbar
#endif
#if defined(bi_bar)
si->bar = gd->bd->bi_bar;
#undef bi_bar
#else
si->bar = 0;
#endif
platform_set_mr(si, gd->bd->bi_memstart, gd->bd->bi_memsize, MR_ATTR_DRAM);
platform_set_mr(si, gd->bd->bi_flashstart, gd->bd->bi_flashsize, MR_ATTR_FLASH);
platform_set_mr(si, gd->bd->bi_sramstart, gd->bd->bi_sramsize, MR_ATTR_SRAM);
return 1;
}

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2007 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*/
#ifndef _API_PRIVATE_H_
#define _API_PRIVATE_H_
void api_init(void);
void platform_set_mr(struct sys_info *, unsigned long, unsigned long, int);
int platform_sys_info(struct sys_info *);
void dev_enum_reset(void);
int dev_enum_storage(struct device_info *);
int dev_enum_net(struct device_info *);
int dev_open_stor(void *);
int dev_open_net(void *);
int dev_close_stor(void *);
int dev_close_net(void *);
lbasize_t dev_read_stor(void *, void *, lbasize_t, lbastart_t);
lbasize_t dev_write_stor(void *, void *, lbasize_t, lbastart_t);
int dev_read_net(void *, void *, int);
int dev_write_net(void *, void *, int);
void dev_stor_init(void);
int display_get_info(int type, struct display_info *di);
int display_draw_bitmap(ulong bitmap, int x, int y);
void display_clear(void);
#endif /* _API_PRIVATE_H_ */

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// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007-2008 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*/
#include <config.h>
#include <common.h>
#include <api_public.h>
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
#include <usb.h>
#endif
#define DEBUG
#undef DEBUG
#ifdef DEBUG
#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0)
#else
#define debugf(fmt, args...)
#endif
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
#define ENUM_IDE 0
#define ENUM_USB 1
#define ENUM_SCSI 2
#define ENUM_MMC 3
#define ENUM_SATA 4
#define ENUM_MAX 5
struct stor_spec {
int max_dev;
int enum_started;
int enum_ended;
int type; /* "external" type: DT_STOR_{IDE,USB,etc} */
char *name;
};
static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, NULL }, };
#ifndef CONFIG_SYS_MMC_MAX_DEVICE
#define CONFIG_SYS_MMC_MAX_DEVICE 1
#endif
void dev_stor_init(void)
{
#if defined(CONFIG_IDE)
specs[ENUM_IDE].max_dev = CONFIG_SYS_IDE_MAXDEVICE;
specs[ENUM_IDE].enum_started = 0;
specs[ENUM_IDE].enum_ended = 0;
specs[ENUM_IDE].type = DEV_TYP_STOR | DT_STOR_IDE;
specs[ENUM_IDE].name = "ide";
#endif
#if defined(CONFIG_CMD_MMC)
specs[ENUM_MMC].max_dev = CONFIG_SYS_MMC_MAX_DEVICE;
specs[ENUM_MMC].enum_started = 0;
specs[ENUM_MMC].enum_ended = 0;
specs[ENUM_MMC].type = DEV_TYP_STOR | DT_STOR_MMC;
specs[ENUM_MMC].name = "mmc";
#endif
#if defined(CONFIG_SATA)
specs[ENUM_SATA].max_dev = CONFIG_SYS_SATA_MAX_DEVICE;
specs[ENUM_SATA].enum_started = 0;
specs[ENUM_SATA].enum_ended = 0;
specs[ENUM_SATA].type = DEV_TYP_STOR | DT_STOR_SATA;
specs[ENUM_SATA].name = "sata";
#endif
#if defined(CONFIG_SCSI)
specs[ENUM_SCSI].max_dev = CONFIG_SYS_SCSI_MAX_DEVICE;
specs[ENUM_SCSI].enum_started = 0;
specs[ENUM_SCSI].enum_ended = 0;
specs[ENUM_SCSI].type = DEV_TYP_STOR | DT_STOR_SCSI;
specs[ENUM_SCSI].name = "scsi";
#endif
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV;
specs[ENUM_USB].enum_started = 0;
specs[ENUM_USB].enum_ended = 0;
specs[ENUM_USB].type = DEV_TYP_STOR | DT_STOR_USB;
specs[ENUM_USB].name = "usb";
#endif
}
/*
* Finds next available device in the storage group
*
* type: storage group type - ENUM_IDE, ENUM_SCSI etc.
*
* more: returns 0/1 depending if there are more devices in this group
* available (for future iterations)
*
* returns: 0/1 depending if device found in this iteration
*/
static int dev_stor_get(int type, int *more, struct device_info *di)
{
struct blk_desc *dd;
int found = 0;
int found_last = 0;
int i = 0;
/* Wasn't configured for this type, return 0 directly */
if (specs[type].name == NULL)
return 0;
if (di->cookie != NULL) {
/* Find the last device we've returned */
for (i = 0; i < specs[type].max_dev; i++) {
if (di->cookie ==
(void *)blk_get_dev(specs[type].name, i)) {
i += 1;
found_last = 1;
break;
}
}
if (!found_last)
i = 0;
}
for (; i < specs[type].max_dev; i++) {
di->cookie = (void *)blk_get_dev(specs[type].name, i);
if (di->cookie != NULL) {
found = 1;
break;
}
}
if (i == specs[type].max_dev)
*more = 0;
else
*more = 1;
if (found) {
di->type = specs[type].type;
dd = (struct blk_desc *)di->cookie;
if (dd->type == DEV_TYPE_UNKNOWN) {
debugf("device instance exists, but is not active..");
found = 0;
} else {
di->di_stor.block_count = dd->lba;
di->di_stor.block_size = dd->blksz;
}
} else {
di->cookie = NULL;
}
return found;
}
/* returns: ENUM_IDE, ENUM_USB etc. based on struct blk_desc */
static int dev_stor_type(struct blk_desc *dd)
{
int i, j;
for (i = ENUM_IDE; i < ENUM_MAX; i++)
for (j = 0; j < specs[i].max_dev; j++)
if (dd == blk_get_dev(specs[i].name, j))
return i;
return ENUM_MAX;
}
/* returns: 0/1 whether cookie points to some device in this group */
static int dev_is_stor(int type, struct device_info *di)
{
return (dev_stor_type(di->cookie) == type) ? 1 : 0;
}
static int dev_enum_stor(int type, struct device_info *di)
{
int found = 0, more = 0;
debugf("called, type %d\n", type);
/*
* Formulae for enumerating storage devices:
* 1. if cookie (hint from previous enum call) is NULL we start again
* with enumeration, so return the first available device, done.
*
* 2. if cookie is not NULL, check if it identifies some device in
* this group:
*
* 2a. if cookie is a storage device from our group (IDE, USB etc.),
* return next available (if exists) in this group
*
* 2b. if it isn't device from our group, check if such devices were
* ever enumerated before:
* - if not, return the first available device from this group
* - else return 0
*/
if (di->cookie == NULL) {
debugf("group%d - enum restart\n", type);
/*
* 1. Enumeration (re-)started: take the first available
* device, if exists
*/
found = dev_stor_get(type, &more, di);
specs[type].enum_started = 1;
} else if (dev_is_stor(type, di)) {
debugf("group%d - enum continued for the next device\n", type);
if (specs[type].enum_ended) {
debugf("group%d - nothing more to enum!\n", type);
return 0;
}
/* 2a. Attempt to take a next available device in the group */
found = dev_stor_get(type, &more, di);
} else {
if (specs[type].enum_ended) {
debugf("group %d - already enumerated, skipping\n", type);
return 0;
}
debugf("group%d - first time enum\n", type);
if (specs[type].enum_started == 0) {
/*
* 2b. If enumerating devices in this group did not
* happen before, it means the cookie pointed to a
* device from some other group (another storage
* group, or network); in this case try to take the
* first available device from our group
*/
specs[type].enum_started = 1;
/*
* Attempt to take the first device in this group:
*'first element' flag is set
*/
found = dev_stor_get(type, &more, di);
} else {
errf("group%d - out of order iteration\n", type);
found = 0;
more = 0;
}
}
/*
* If there are no more devices in this group, consider its
* enumeration finished
*/
specs[type].enum_ended = (!more) ? 1 : 0;
if (found)
debugf("device found, returning cookie 0x%08x\n",
(u_int32_t)di->cookie);
else
debugf("no device found\n");
return found;
}
void dev_enum_reset(void)
{
int i;
for (i = 0; i < ENUM_MAX; i ++) {
specs[i].enum_started = 0;
specs[i].enum_ended = 0;
}
}
int dev_enum_storage(struct device_info *di)
{
int i;
/* check: ide, usb, scsi, mmc */
for (i = ENUM_IDE; i < ENUM_MAX; i ++) {
if (dev_enum_stor(i, di))
return 1;
}
return 0;
}
static int dev_stor_is_valid(int type, struct blk_desc *dd)
{
int i;
for (i = 0; i < specs[type].max_dev; i++)
if (dd == blk_get_dev(specs[type].name, i))
if (dd->type != DEV_TYPE_UNKNOWN)
return 1;
return 0;
}
int dev_open_stor(void *cookie)
{
int type = dev_stor_type(cookie);
if (type == ENUM_MAX)
return API_ENODEV;
if (dev_stor_is_valid(type, (struct blk_desc *)cookie))
return 0;
return API_ENODEV;
}
int dev_close_stor(void *cookie)
{
/*
* Not much to do as we actually do not alter storage devices upon
* close
*/
return 0;
}
lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start)
{
int type;
struct blk_desc *dd = (struct blk_desc *)cookie;
if ((type = dev_stor_type(dd)) == ENUM_MAX)
return 0;
if (!dev_stor_is_valid(type, dd))
return 0;
#ifdef CONFIG_BLK
return blk_dread(dd, start, len, buf);
#else
if ((dd->block_read) == NULL) {
debugf("no block_read() for device 0x%08x\n", cookie);
return 0;
}
return dd->block_read(dd, start, len, buf);
#endif /* defined(CONFIG_BLK) */
}
lbasize_t dev_write_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start)
{
struct blk_desc *dd = (struct blk_desc *)cookie;
int type = dev_stor_type(dd);
if (type == ENUM_MAX)
return 0;
if (!dev_stor_is_valid(type, dd))
return 0;
#ifdef CONFIG_BLK
return blk_dwrite(dd, start, len, buf);
#else
if (dd->block_write == NULL) {
debugf("no block_write() for device 0x%08x\n", cookie);
return 0;
}
return dd->block_write(dd, start, len, buf);
#endif /* defined(CONFIG_BLK) */
}

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config CREATE_ARCH_SYMLINK
bool
config HAVE_ARCH_IOREMAP
bool
choice
prompt "Architecture select"
default SANDBOX
config ARC
bool "ARC architecture"
select ARCH_EARLY_INIT_R
select ARC_TIMER
select CLK
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select TIMER
config ARM
bool "ARM architecture"
select CREATE_ARCH_SYMLINK
select HAVE_PRIVATE_LIBGCC if !ARM64
select SUPPORT_OF_CONTROL
config M68K
bool "M68000 architecture"
select HAVE_PRIVATE_LIBGCC
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
select SUPPORT_OF_CONTROL
config MICROBLAZE
bool "MicroBlaze architecture"
select SUPPORT_OF_CONTROL
imply CMD_IRQ
config MIPS
bool "MIPS architecture"
select HAVE_ARCH_IOREMAP
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
config NDS32
bool "NDS32 architecture"
select SUPPORT_OF_CONTROL
config NIOS2
bool "Nios II architecture"
select CPU
select DM
select OF_CONTROL
select SUPPORT_OF_CONTROL
imply CMD_DM
config OTTO
bool "Realtek Otto framework"
select HAVE_ARCH_IOREMAP
select HAVE_PRIVATE_LIBGCC
select USE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
config PPC
bool "PowerPC architecture"
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
config RISCV
bool "RISC-V architecture"
select CREATE_ARCH_SYMLINK
select SUPPORT_OF_CONTROL
select OF_CONTROL
select DM
imply DM_SERIAL
imply DM_ETH
imply DM_MMC
imply DM_SPI
imply DM_SPI_FLASH
imply BLK
imply CLK
imply MTD
imply TIMER
imply CMD_DM
imply SPL_DM
imply SPL_OF_CONTROL
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_SERIAL_SUPPORT
imply SPL_TIMER
config SANDBOX
bool "Sandbox"
select BOARD_LATE_INIT
select DM
select DM_GPIO
select DM_I2C
select DM_KEYBOARD
select DM_MMC
select DM_SERIAL
select DM_SPI
select DM_SPI_FLASH
select HAVE_BLOCK_DEVICE
select LZO
select PCI_ENDPOINT
select SPI
select SUPPORT_OF_CONTROL
select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
imply BITREVERSE
select BLOBLIST
imply CMD_DM
imply CMD_GETTIME
imply CMD_HASH
imply CMD_IO
imply CMD_IOTRACE
imply CMD_LZMADEC
imply CMD_SATA
imply CMD_SF
imply CMD_SF_TEST
imply CRC32_VERIFY
imply FAT_WRITE
imply FIRMWARE
imply HASH_VERIFY
imply LZMA
imply SCSI
imply TEE
imply AVB_VERIFY
imply LIBAVB
imply CMD_AVB
imply UDP_FUNCTION_FASTBOOT
imply VIRTIO_MMIO
imply VIRTIO_PCI
imply VIRTIO_SANDBOX
imply VIRTIO_BLK
imply VIRTIO_NET
imply DM_SOUND
imply PCI_SANDBOX_EP
imply PCH
imply PHYLIB
imply DM_MDIO
imply DM_MDIO_MUX
config SH
bool "SuperH architecture"
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
config X86
bool "x86 architecture"
select SUPPORT_SPL
select SUPPORT_TPL
select CREATE_ARCH_SYMLINK
select DM
select DM_PCI
select HAVE_ARCH_IOMAP
select HAVE_PRIVATE_LIBGCC
select OF_CONTROL
select PCI
select SUPPORT_OF_CONTROL
select TIMER
select USE_PRIVATE_LIBGCC
select X86_TSC_TIMER
imply BLK
imply CMD_DM
imply CMD_FPGA_LOADMK
imply CMD_GETTIME
imply CMD_IO
imply CMD_IRQ
imply CMD_PCI
imply CMD_SF
imply CMD_SF_TEST
imply CMD_ZBOOT
imply DM_ETH
imply DM_GPIO
imply DM_KEYBOARD
imply DM_MMC
imply DM_RTC
imply DM_SCSI
imply DM_SERIAL
imply DM_SPI
imply DM_SPI_FLASH
imply DM_USB
imply DM_VIDEO
imply SYSRESET
imply SPL_SYSRESET
imply SYSRESET_X86
imply USB_ETHER_ASIX
imply USB_ETHER_SMSC95XX
imply USB_HOST_ETHER
imply PCH
imply RTC_MC146818
# Thing to enable for when SPL/TPL are enabled: SPL
imply SPL_DM
imply SPL_OF_LIBFDT
imply SPL_DRIVERS_MISC_SUPPORT
imply SPL_GPIO_SUPPORT
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_SERIAL_SUPPORT
imply SPL_SPI_FLASH_SUPPORT
imply SPL_SPI_SUPPORT
imply SPL_OF_CONTROL
imply SPL_TIMER
imply SPL_REGMAP
imply SPL_SYSCON
# TPL
imply TPL_DM
imply TPL_OF_LIBFDT
imply TPL_DRIVERS_MISC_SUPPORT
imply TPL_GPIO_SUPPORT
imply TPL_LIBCOMMON_SUPPORT
imply TPL_LIBGENERIC_SUPPORT
imply TPL_SERIAL_SUPPORT
imply TPL_SPI_FLASH_SUPPORT
imply TPL_SPI_SUPPORT
imply TPL_OF_CONTROL
imply TPL_TIMER
imply TPL_REGMAP
imply TPL_SYSCON
config XTENSA
bool "Xtensa architecture"
select CREATE_ARCH_SYMLINK
select SUPPORT_OF_CONTROL
endchoice
config SYS_ARCH
string
help
This option should contain the architecture name to build the
appropriate arch/<CONFIG_SYS_ARCH> directory.
All the architectures should specify this option correctly.
config SYS_CPU
string
help
This option should contain the CPU name to build the correct
arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
This is optional. For those targets without the CPU directory,
leave this option empty.
config SYS_SOC
string
help
This option should contain the SoC name to build the directory
arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
This is optional. For those targets without the SoC directory,
leave this option empty.
config SYS_VENDOR
string
help
This option should contain the vendor name of the target board.
If it is set and
board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
directory is compiled.
If CONFIG_SYS_BOARD is also set, the sources under
board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
This is optional. For those targets without the vendor directory,
leave this option empty.
config SYS_BOARD
string
help
This option should contain the name of the target board.
If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
or board/<CONFIG_SYS_BOARD> directory is compiled depending on
whether CONFIG_SYS_VENDOR is set or not.
This is optional. For those targets without the board directory,
leave this option empty.
config SYS_CONFIG_NAME
string
help
This option should contain the base name of board header file.
The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
should be included from include/config.h.
config SYS_DISABLE_DCACHE_OPS
bool
help
This option disables dcache flush and dcache invalidation
operations. For example, on coherent systems where cache
operatios are not required, enable this option to avoid them.
Note that, its up to the individual architectures to implement
this functionality.
source "arch/arc/Kconfig"
source "arch/arm/Kconfig"
source "arch/m68k/Kconfig"
source "arch/microblaze/Kconfig"
source "arch/mips/Kconfig"
source "arch/nds32/Kconfig"
source "arch/nios2/Kconfig"
source "arch/otto/Kconfig"
source "arch/powerpc/Kconfig"
source "arch/sandbox/Kconfig"
source "arch/sh/Kconfig"
source "arch/x86/Kconfig"
source "arch/xtensa/Kconfig"
source "arch/riscv/Kconfig"

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menu "ARC architecture"
depends on ARC
config SYS_ARCH
default "arc"
config SYS_CPU
default "arcv1" if ISA_ARCOMPACT
default "arcv2" if ISA_ARCV2
choice
prompt "ARC Instruction Set"
default ISA_ARCOMPACT
config ISA_ARCOMPACT
bool "ARCompact ISA"
help
The original ARC ISA of ARC600/700 cores
config ISA_ARCV2
bool "ARC ISA v2"
help
ISA for the Next Generation ARC-HS cores
endchoice
choice
prompt "CPU selection"
default CPU_ARC770D if ISA_ARCOMPACT
default CPU_ARCHS38 if ISA_ARCV2
config CPU_ARC750D
bool "ARC 750D"
depends on ISA_ARCOMPACT
select ARC_MMU_V2
help
Choose this option to build an U-Boot for ARC750D CPU.
config CPU_ARC770D
bool "ARC 770D"
depends on ISA_ARCOMPACT
select ARC_MMU_V3
help
Choose this option to build an U-Boot for ARC770D CPU.
config CPU_ARCEM6
bool "ARC EM6"
depends on ISA_ARCV2
select ARC_MMU_ABSENT
help
Next Generation ARC Core based on ISA-v2 ISA without MMU.
config CPU_ARCHS36
bool "ARC HS36"
depends on ISA_ARCV2
select ARC_MMU_ABSENT
help
Next Generation ARC Core based on ISA-v2 ISA without MMU.
config CPU_ARCHS38
bool "ARC HS38"
depends on ISA_ARCV2
select ARC_MMU_V4
help
Next Generation ARC Core based on ISA-v2 ISA with MMU.
endchoice
choice
prompt "MMU Version"
default ARC_MMU_V3 if CPU_ARC770D
default ARC_MMU_V2 if CPU_ARC750D
default ARC_MMU_ABSENT if CPU_ARCEM6
default ARC_MMU_ABSENT if CPU_ARCHS36
default ARC_MMU_V4 if CPU_ARCHS38
config ARC_MMU_ABSENT
bool "No MMU"
help
No MMU
config ARC_MMU_V2
bool "MMU v2"
depends on CPU_ARC750D
help
Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
when 2 D-TLB and 1 I-TLB entries index into same 2way set.
config ARC_MMU_V3
bool "MMU v3"
depends on CPU_ARC770D
help
Introduced with ARC700 4.10: New Features
Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
Shared Address Spaces (SASID)
config ARC_MMU_V4
bool "MMU v4"
depends on CPU_ARCHS38
help
Introduced as a part of ARC HS38 release.
endchoice
config CPU_BIG_ENDIAN
bool "Enable Big Endian Mode"
default n
help
Build kernel for Big Endian Mode of ARC CPU
config SYS_ICACHE_OFF
bool "Do not enable icache"
default n
help
Do not enable instruction cache in U-Boot.
config SPL_SYS_ICACHE_OFF
bool "Do not enable icache in SPL"
depends on SPL
default SYS_ICACHE_OFF
help
Do not enable instruction cache in SPL.
config SYS_DCACHE_OFF
bool "Do not enable dcache"
default n
help
Do not enable data cache in U-Boot.
config SPL_SYS_DCACHE_OFF
bool "Do not enable dcache in SPL"
depends on SPL
default SYS_DCACHE_OFF
help
Do not enable data cache in SPL.
menuconfig ARC_DBG
bool "ARC debugging"
default n
if ARC_DBG
config ARC_DBG_IOC_ENABLE
bool "Enable IO coherency unit"
depends on CPU_ARCHS38
default n
help
Enable IO coherency unit to debug problems with caches and
DMA peripherals.
NOTE: as of today linux will not work properly if this option
is enabled in u-boot!
endif
choice
prompt "Target select"
default TARGET_AXS103
config TARGET_TB100
bool "Support tb100"
config TARGET_NSIM
bool "Support standalone nSIM & Free nSIM"
config TARGET_AXS101
bool "Support Synopsys Designware SDP board AXS101"
select BOUNCE_BUFFER if CMD_NAND
config TARGET_AXS103
bool "Support Synopsys Designware SDP board AXS103"
select BOUNCE_BUFFER if CMD_NAND
config TARGET_EMSDP
bool "Synopsys EM Software Development Platform"
select CPU_ARCEM6
config TARGET_HSDK
bool "Support Synpsys HS DevelopmentKit board"
config TARGET_IOT_DEVKIT
bool "Synopsys Brite IoT Development kit"
select CPU_ARCEM6
endchoice
source "board/abilis/tb100/Kconfig"
source "board/synopsys/Kconfig"
source "board/synopsys/axs10x/Kconfig"
source "board/synopsys/emsdp/Kconfig"
source "board/synopsys/hsdk/Kconfig"
source "board/synopsys/iot_devkit/Kconfig"
endmenu

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# SPDX-License-Identifier: GPL-2.0+
libs-y += arch/arc/cpu/$(CPU)/
libs-y += arch/arc/lib/
# MetaWare debugger doesn't support PIE (position-independent executable)
# so the only way to load U-Boot in MDB is to fake it by:
# 1. Reset PIE flag in ELF header
# 2. Strip all debug information from elf
ifdef CONFIG_SYS_LITTLE_ENDIAN
EXEC_TYPE_OFFSET=16
else
EXEC_TYPE_OFFSET=17
endif
mdbtrick: u-boot
$(Q)printf '\x02' | dd of=u-boot bs=1 seek=$(EXEC_TYPE_OFFSET) count=1 \
conv=notrunc &> /dev/null
$(Q)$(CROSS_COMPILE)strip -g u-boot

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# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
ifndef CONFIG_CPU_BIG_ENDIAN
CONFIG_SYS_LITTLE_ENDIAN = 1
else
CONFIG_SYS_BIG_ENDIAN = 1
endif
ifdef CONFIG_SYS_LITTLE_ENDIAN
PLATFORM_LDFLAGS += -EL
PLATFORM_CPPFLAGS += -mlittle-endian
endif
ifdef CONFIG_SYS_BIG_ENDIAN
PLATFORM_LDFLAGS += -EB
PLATFORM_CPPFLAGS += -mbig-endian
endif
ifdef CONFIG_ARC_MMU_VER
CONFIG_MMU = 1
endif
ifdef CONFIG_CPU_ARC750D
PLATFORM_CPPFLAGS += -mcpu=arc700
endif
ifdef CONFIG_CPU_ARC770D
PLATFORM_CPPFLAGS += -mcpu=arc700 -mlock -mswape
endif
ifdef CONFIG_CPU_ARCEM6
PLATFORM_CPPFLAGS += -mcpu=arcem
endif
ifdef CONFIG_CPU_ARCHS34
PLATFORM_CPPFLAGS += -mcpu=archs
endif
ifdef CONFIG_CPU_ARCHS38
PLATFORM_CPPFLAGS += -mcpu=archs
endif
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 -mno-sdata
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections -fno-common
# Needed for relocation
LDFLAGS_FINAL += -pie --gc-sections
# Load address for standalone apps
CONFIG_STANDALONE_LOAD_ADDR ?= 0x82000000

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# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
obj-y += ivt.o

26
sources/uboot-gp3000/arch/arc/cpu/arcv1/ivt.S Normal file
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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
.section .ivt, "ax",@progbits
.align 4
_ivt:
/* Critical system events */
j _start /* 0 - 0x000 */
j memory_error /* 1 - 0x008 */
j instruction_error /* 2 - 0x010 */
/* Device interrupts */
.rept 29
j interrupt_handler /* 3:31 - 0x018:0xF8 */
.endr
/* Exceptions */
j EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */
j EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */
j EV_TLBMissD /* 0x110, Data TLB miss (0x22) */
j EV_TLBProtV /* 0x118, Protection Violation (0x23)
or Misaligned Access */
j EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */
j EV_Trap /* 0x128, Trap exception (0x25) */
j EV_Extension /* 0x130, Extn Intruction Excp (0x26) */

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sources/uboot-gp3000/arch/arc/cpu/arcv2/Makefile Normal file
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# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
obj-y += ivt.o

31
sources/uboot-gp3000/arch/arc/cpu/arcv2/ivt.S Normal file
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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*/
.section .ivt, "a",@progbits
.align 4
/* Critical system events */
.word _start /* 0x00 - Reset */
.word memory_error /* 0x01 - Memory Error */
.word instruction_error /* 0x02 - Instruction Error */
/* Exceptions */
.word EV_MachineCheck /* 0x03 - Fatal Machine check */
.word EV_TLBMissI /* 0x04 - Intruction TLB miss */
.word EV_TLBMissD /* 0x05 - Data TLB miss */
.word EV_TLBProtV /* 0x06 - Protection Violation or Misaligned Access */
.word EV_PrivilegeV /* 0x07 - Privilege Violation */
.word EV_SWI /* 0x08 - Software Interrupt */
.word EV_Trap /* 0x09 - Trap */
.word EV_Extension /* 0x0A - Extension Intruction Exception */
.word EV_DivZero /* 0x0B - Division by Zero */
.word EV_DCError /* 0x0C - Data cache consistency error */
.word EV_Maligned /* 0x0D - Misaligned data access */
.word 0 /* 0x0E - Unused */
.word 0 /* 0x0F - Unused */
/* Device interrupts */
.rept 240
.word interrupt_handler /* 0x10 - 0xFF */
.endr

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#include <config.h>
OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc")
OUTPUT_ARCH(arc)
ENTRY(_start)
SECTIONS
{
. = CONFIG_SYS_TEXT_BASE;
__image_copy_start = .;
. = ALIGN(1024);
__ivt_start = .;
.ivt :
{
KEEP(*(.ivt))
}
__ivt_end = .;
. = ALIGN(1024);
__text_start = .;
.text : {
arch/arc/lib/start.o (.text*)
*(.text*)
}
__text_end = .;
. = ALIGN(4);
.rodata : {
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
. = ALIGN(4);
.data : {
*(.data*)
}
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
. = ALIGN(4);
__rel_dyn_start = .;
.rela.dyn : {
*(.rela.dyn)
}
__rel_dyn_end = .;
. = ALIGN(4);
__bss_start = .;
.bss : {
*(.bss*)
}
__bss_end = .;
. = ALIGN(4);
__image_copy_end = .;
__init_end = .;
}

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# SPDX-License-Identifier: GPL-2.0+
dtb-$(CONFIG_TARGET_AXS101) += axs101.dtb
dtb-$(CONFIG_TARGET_AXS103) += axs103.dtb
dtb-$(CONFIG_TARGET_NSIM) += nsim.dtb
dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb
dtb-$(CONFIG_TARGET_EMSDP) += emsdp.dtb
dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb
dtb-$(CONFIG_TARGET_IOT_DEVKIT) += iot_devkit.dtb
targets += $(dtb-y)
DTC_FLAGS += -R 4 -p 0x1000
PHONY += dtbs
dtbs: $(addprefix $(obj)/, $(dtb-y))
@:
clean-files := *.dtb

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sources/uboot-gp3000/arch/arc/dts/abilis_tb100.dts Normal file
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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com)
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
model = "abilis,tb100";
aliases {
console = &uart0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <500000000>;
u-boot,dm-pre-reloc;
};
};
uart0: serial@ff100000 {
compatible = "snps,dw-apb-uart";
reg = <0xff100000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
};

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sources/uboot-gp3000/arch/arc/dts/axc001.dtsi Normal file
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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/include/ "skeleton.dtsi"
/ {
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <750000000>;
u-boot,dm-pre-reloc;
};
};
};

18
sources/uboot-gp3000/arch/arc/dts/axc003.dtsi Normal file
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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/include/ "skeleton.dtsi"
/ {
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
u-boot,dm-pre-reloc;
};
};
};

18
sources/uboot-gp3000/arch/arc/dts/axs101.dts Normal file
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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
/include/ "axc001.dtsi"
/include/ "axs10x_mb.dtsi"
/ {
model = "snps,axs101";
chosen {
stdout-path = &uart0;
};
};

18
sources/uboot-gp3000/arch/arc/dts/axs103.dts Normal file
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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
/include/ "axc003.dtsi"
/include/ "axs10x_mb.dtsi"
/ {
model = "snps,axs103";
chosen {
stdout-path = &uart0;
};
};

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sources/uboot-gp3000/arch/arc/dts/axs10x_mb.dtsi Normal file
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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/ {
aliases {
spi0 = &spi0;
};
axs10x_mb@e0000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0xe0000000 0x10000000>;
u-boot,dm-pre-reloc;
clocks {
compatible = "simple-bus";
u-boot,dm-pre-reloc;
apbclk: apbclk {
compatible = "fixed-clock";
clock-frequency = <50000000>;
#clock-cells = <0>;
};
uartclk: uartclk {
compatible = "fixed-clock";
clock-frequency = <33333333>;
#clock-cells = <0>;
u-boot,dm-pre-reloc;
};
mmcclk_ciu: mmcclk-ciu {
compatible = "fixed-clock";
/*
* DW sdio controller has external ciu clock divider
* controlled via register in SDIO IP. It divides
* sdio_ref_clk (which comes from CGU) by 16 for
* default. So default mmcclk clock (which comes
* to sdk_in) is 25000000 Hz.
*/
clock-frequency = <25000000>;
#clock-cells = <0>;
};
mmcclk_biu: mmcclk-biu {
compatible = "fixed-clock";
clock-frequency = <50000000>;
#clock-cells = <0>;
};
};
ethernet@18000 {
compatible = "snps,arc-dwmac-3.70a";
reg = < 0x18000 0x2000 >;
phy-mode = "gmii";
snps,pbl = < 32 >;
clocks = <&apbclk>;
clock-names = "stmmaceth";
max-speed = <100>;
};
ehci@0x40000 {
compatible = "generic-ehci";
reg = < 0x40000 0x100 >;
};
ohci@0x60000 {
compatible = "generic-ohci";
reg = < 0x60000 0x100 >;
};
mmc: mmc@15000 {
compatible = "snps,dw-mshc";
reg = <0x15000 0x400>;
bus-width = <4>;
clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
clock-names = "biu", "ciu";
max-frequency = <25000000>;
};
uart0: serial0@22000 {
compatible = "snps,dw-apb-uart";
reg = <0x22000 0x100>;
clocks = <&uartclk>;
reg-shift = <2>;
reg-io-width = <4>;
};
spi0: spi@0 {
compatible = "snps,dw-apb-ssi";
reg = <0x0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <4000000>;
clocks = <&apbclk>;
clock-names = "spi_clk";
cs-gpio = <&cs_gpio 0>;
spi_flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <4000000>;
};
};
cs_gpio: gpio@11218 {
compatible = "snps,creg-gpio";
reg = <0x11218 0x4>;
gpio-controller;
#gpio-cells = <1>;
gpio-bank-name = "axs-spi-cs";
gpio-count = <1>;
gpio-first-shift = <0>;
gpio-bit-per-line = <2>;
gpio-activate-val = <1>;
gpio-deactivate-val = <3>;
gpio-default-val = <1>;
};
};
};

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sources/uboot-gp3000/arch/arc/dts/emsdp.dts Normal file
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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
model = "snps,emsdp";
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <40000000>;
u-boot,dm-pre-reloc;
};
};
uart0: serial0@f0004000 {
compatible = "snps,dw-apb-uart";
clock-frequency = <100000000>;
reg = <0xf0004000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
mmcclk_biu: mmcclk-biu {
compatible = "fixed-clock";
clock-frequency = <50000000>;
#clock-cells = <0>;
};
mmcclk_ciu: mmcclk-ciu {
compatible = "fixed-clock";
clock-frequency = <100000000>;
#clock-cells = <0>;
};
mmc: mmc0@f0010000 {
compatible = "snps,dw-mshc";
reg = <0xf0010000 0x400>;
bus-width = <4>;
fifo-depth = <256>;
clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
clock-names = "biu", "ciu";
max-frequency = <25000000>;
};
};

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
#include "skeleton.dtsi"
#include "dt-bindings/clock/snps,hsdk-cgu.h"
/ {
model = "snps,hsdk";
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
spi0 = &spi0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <500000000>;
u-boot,dm-pre-reloc;
};
};
clk-fmeas {
clocks = <&cgu_clk CLK_ARC_PLL>, <&cgu_clk CLK_SYS_PLL>,
<&cgu_clk CLK_TUN_PLL>, <&cgu_clk CLK_DDR_PLL>,
<&cgu_clk CLK_ARC>, <&cgu_clk CLK_HDMI_PLL>,
<&cgu_clk CLK_TUN_TUN>, <&cgu_clk CLK_HDMI>,
<&cgu_clk CLK_SYS_APB>, <&cgu_clk CLK_SYS_AXI>,
<&cgu_clk CLK_SYS_ETH>, <&cgu_clk CLK_SYS_USB>,
<&cgu_clk CLK_SYS_SDIO>, <&cgu_clk CLK_SYS_HDMI>,
<&cgu_clk CLK_SYS_GFX_CORE>, <&cgu_clk CLK_SYS_GFX_DMA>,
<&cgu_clk CLK_SYS_GFX_CFG>, <&cgu_clk CLK_SYS_DMAC_CORE>,
<&cgu_clk CLK_SYS_DMAC_CFG>, <&cgu_clk CLK_SYS_SDIO_REF>,
<&cgu_clk CLK_SYS_SPI_REF>, <&cgu_clk CLK_SYS_I2C_REF>,
<&cgu_clk CLK_SYS_UART_REF>, <&cgu_clk CLK_SYS_EBI_REF>,
<&cgu_clk CLK_TUN_ROM>, <&cgu_clk CLK_TUN_PWM>;
clock-names = "cpu-pll", "sys-pll",
"tun-pll", "ddr-clk",
"cpu-clk", "hdmi-pll",
"tun-clk", "hdmi-clk",
"apb-clk", "axi-clk",
"eth-clk", "usb-clk",
"sdio-clk", "hdmi-sys-clk",
"gfx-core-clk", "gfx-dma-clk",
"gfx-cfg-clk", "dmac-core-clk",
"dmac-cfg-clk", "sdio-ref-clk",
"spi-clk", "i2c-clk",
"uart-clk", "ebi-clk",
"rom-clk", "pwm-clk";
};
cgu_clk: cgu-clk@f0000000 {
compatible = "snps,hsdk-cgu-clock";
reg = <0xf0000000 0x10>, <0xf00014B8 0x4>;
#clock-cells = <1>;
};
uart0: serial0@f0005000 {
compatible = "snps,dw-apb-uart";
reg = <0xf0005000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
ethernet@f0008000 {
#interrupt-cells = <1>;
compatible = "snps,arc-dwmac-3.70a";
reg = <0xf0008000 0x2000>;
phy-mode = "gmii";
};
ehci@0xf0040000 {
compatible = "generic-ehci";
reg = <0xf0040000 0x100>;
};
ohci@0xf0060000 {
compatible = "generic-ohci";
reg = <0xf0060000 0x100>;
};
mmcclk_ciu: mmcclk-ciu {
compatible = "fixed-clock";
/*
* DW sdio controller has external ciu clock divider
* controlled via register in SDIO IP. Due to its
* unexpected default value (it should divide by 1
* but it divides by 8) SDIO IP uses wrong clock and
* works unstable (see STAR 9001204800)
* We switched to the minimum possible value of the
* divisor (div-by-2) in HSDK platform code.
* So default mmcclk ciu clock is 50000000 Hz.
*/
clock-frequency = <50000000>;
#clock-cells = <0>;
};
mmc: mmc0@f000a000 {
compatible = "snps,dw-mshc";
reg = <0xf000a000 0x400>;
bus-width = <4>;
fifo-depth = <256>;
clocks = <&cgu_clk CLK_SYS_SDIO>, <&mmcclk_ciu>;
clock-names = "biu", "ciu";
max-frequency = <25000000>;
};
spi0: spi@f0020000 {
compatible = "snps,dw-apb-ssi";
reg = <0xf0020000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <4000000>;
clocks = <&cgu_clk CLK_SYS_SPI_REF>;
clock-names = "spi_clk";
cs-gpio = <&cs_gpio 0>;
spi_flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <4000000>;
};
};
cs_gpio: gpio@f00014b0 {
compatible = "snps,creg-gpio";
reg = <0xf00014b0 0x4>;
gpio-controller;
#gpio-cells = <1>;
gpio-bank-name = "hsdk-spi-cs";
gpio-count = <1>;
gpio-first-shift = <0>;
gpio-bit-per-line = <2>;
gpio-activate-val = <2>;
gpio-deactivate-val = <3>;
gpio-default-val = <1>;
};
};

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Synopsys, Inc. All rights reserved.
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <144000000>;
u-boot,dm-pre-reloc;
};
};
uart0: serial0@80014000 {
compatible = "snps,dw-apb-uart";
clock-frequency = <16000000>;
reg = <0x80014000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
usb: usb@f0040000 {
compatible = "snps,dwc2";
reg = <0xf0040000 0x10000>;
phys = <&usbphy>;
phy-names = "usb2-phy";
};
usbphy: phy {
compatible = "nop-phy";
#phy-cells = <0>;
};
mmcclk_biu: mmcclk-biu {
compatible = "fixed-clock";
clock-frequency = <50000000>;
#clock-cells = <0>;
};
mmcclk_ciu: mmcclk-ciu {
compatible = "fixed-clock";
clock-frequency = <50000000>;
#clock-cells = <0>;
};
mmc: mmc0@f000b000 {
compatible = "snps,dw-mshc";
reg = <0xf000b000 0x400>;
bus-width = <4>;
fifo-depth = <128>;
clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
clock-names = "biu", "ciu";
max-frequency = <25000000>;
};
};

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sources/uboot-gp3000/arch/arc/dts/nsim.dts Normal file
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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
model = "snps,nsim";
aliases {
console = &arcuart0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <70000000>;
u-boot,dm-pre-reloc;
};
};
arcuart0: serial@0xc0fc1000 {
compatible = "snps,arc-uart";
reg = <0xc0fc1000 0x100>;
clock-frequency = <70000000>;
};
};

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sources/uboot-gp3000/arch/arc/dts/skeleton.dtsi Normal file
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/*
* Skeleton device tree; the bare minimum needed to boot; just include and
* add a compatible value. The bootloader will typically populate the memory
* node.
*/
/ {
#address-cells = <1>;
#size-cells = <1>;
chosen { };
aliases { };
cpu_card {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
timer@0 {
compatible = "snps,arc-timer";
clocks = <&core_clk>;
reg = <0 1>;
};
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256M */
};
};

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/*
* ARC Build Configuration Registers, with encoded hardware config
*
* Copyright (C) 2018 Synopsys
* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ARC_BCR_H
#define __ARC_BCR_H
#ifndef __ASSEMBLY__
#include <config.h>
union bcr_di_cache {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
#else
unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
#endif
} fields;
unsigned int word;
};
union bcr_slc_cfg {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:24, way:2, lsz:2, sz:4;
#else
unsigned int sz:4, lsz:2, way:2, pad:24;
#endif
} fields;
unsigned int word;
};
union bcr_generic {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:24, ver:8;
#else
unsigned int ver:8, pad:24;
#endif
} fields;
unsigned int word;
};
union bcr_clust_cfg {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
#else
unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
#endif
} fields;
unsigned int word;
};
union bcr_mmu_4 {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
#else
/* DTLB ITLB JES JE JA */
unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,
pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;
#endif
} fields;
unsigned int word;
};
#endif /* __ASSEMBLY__ */
#endif /* __ARC_BCR_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
*/
#ifndef _ASM_ARC_ARCREGS_H
#define _ASM_ARC_ARCREGS_H
#include <asm/cache.h>
#include <config.h>
/*
* ARC architecture has additional address space - auxiliary registers.
* These registers are mostly used for configuration purposes.
* These registers are not memory mapped and special commands are used for
* access: "lr"/"sr".
*/
/*
* Typically 8 least significant bits of Build Configuration Register (BCR)
* describe version of the HW block in question. Moreover if decoded version
* is 0 this means given HW block is absent - this is especially useful because
* we may safely read BRC regardless HW block existence while an attempt to
* access any other AUX regs associated with this HW block lead to imediate
* "instruction error" exception.
*
* I.e. before using any cofigurable HW block it's required to make sure it
* exists at all, and for that we introduce a special macro below.
*/
#define ARC_BCR_VERSION_MASK GENMASK(7, 0)
#define ARC_FEATURE_EXISTS(bcr) !!(__builtin_arc_lr(bcr) & ARC_BCR_VERSION_MASK)
#define ARC_AUX_IDENTITY 0x04
#define ARC_AUX_STATUS32 0x0a
/* STATUS32 Bits Positions */
#define STATUS_AD_BIT 19 /* Enable unaligned access */
/* Instruction cache related auxiliary registers */
#define ARC_AUX_IC_IVIC 0x10
#define ARC_AUX_IC_CTRL 0x11
#define ARC_AUX_IC_IVIL 0x19
#if (CONFIG_ARC_MMU_VER == 3)
#define ARC_AUX_IC_PTAG 0x1E
#endif
#define ARC_BCR_IC_BUILD 0x77
#define AUX_AUX_CACHE_LIMIT 0x5D
#define ARC_AUX_NON_VOLATILE_LIMIT 0x5E
/* ICCM and DCCM auxiliary registers */
#define ARC_AUX_DCCM_BASE 0x18 /* DCCM Base Addr ARCv2 */
#define ARC_AUX_ICCM_BASE 0x208 /* ICCM Base Addr ARCv2 */
/* Timer related auxiliary registers */
#define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */
#define ARC_AUX_TIMER0_CTRL 0x22 /* Timer 0 control */
#define ARC_AUX_TIMER0_LIMIT 0x23 /* Timer 0 limit */
#define ARC_AUX_TIMER1_CNT 0x100 /* Timer 1 count */
#define ARC_AUX_TIMER1_CTRL 0x101 /* Timer 1 control */
#define ARC_AUX_TIMER1_LIMIT 0x102 /* Timer 1 limit */
#define ARC_AUX_INTR_VEC_BASE 0x25
/* Data cache related auxiliary registers */
#define ARC_AUX_DC_IVDC 0x47
#define ARC_AUX_DC_CTRL 0x48
#define ARC_AUX_DC_IVDL 0x4A
#define ARC_AUX_DC_FLSH 0x4B
#define ARC_AUX_DC_FLDL 0x4C
#if (CONFIG_ARC_MMU_VER == 3)
#define ARC_AUX_DC_PTAG 0x5C
#endif
#define ARC_BCR_DC_BUILD 0x72
#define ARC_BCR_SLC 0xce
#define ARC_AUX_SLC_CONFIG 0x901
#define ARC_AUX_SLC_CTRL 0x903
#define ARC_AUX_SLC_FLUSH 0x904
#define ARC_AUX_SLC_INVALIDATE 0x905
#define ARC_AUX_SLC_IVDL 0x910
#define ARC_AUX_SLC_FLDL 0x912
#define ARC_AUX_SLC_RGN_START 0x914
#define ARC_AUX_SLC_RGN_START1 0x915
#define ARC_AUX_SLC_RGN_END 0x916
#define ARC_AUX_SLC_RGN_END1 0x917
#define ARC_BCR_CLUSTER 0xcf
/* MMU Management regs */
#define ARC_AUX_MMU_BCR 0x6f
/* IO coherency related auxiliary registers */
#define ARC_AUX_IO_COH_ENABLE 0x500
#define ARC_AUX_IO_COH_PARTIAL 0x501
#define ARC_AUX_IO_COH_AP0_BASE 0x508
#define ARC_AUX_IO_COH_AP0_SIZE 0x509
/* XY-memory related */
#define ARC_AUX_XY_BUILD 0x79
/* DSP-extensions related auxiliary registers */
#define ARC_AUX_DSP_BUILD 0x7A
/* ARC Subsystems related auxiliary registers */
#define ARC_AUX_SUBSYS_BUILD 0xF0
#ifndef __ASSEMBLY__
/* Accessors for auxiliary registers */
#define read_aux_reg(reg) __builtin_arc_lr(reg)
/* gcc builtin sr needs reg param to be long immediate */
#define write_aux_reg(reg_immed, val) \
__builtin_arc_sr((unsigned int)val, reg_immed)
/* ARCNUM [15:8] - field to identify each core in a multi-core system */
#define CPU_ID_GET() ((read_aux_reg(ARC_AUX_IDENTITY) & 0xFF00) >> 8)
static const inline int is_isa_arcv2(void)
{
return IS_ENABLED(CONFIG_ISA_ARCV2);
}
static const inline int is_isa_arcompact(void)
{
return IS_ENABLED(CONFIG_ISA_ARCOMPACT);
}
#endif /* __ASSEMBLY__ */
#endif /* _ASM_ARC_ARCREGS_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_BITOPS_H
#define __ASM_ARC_BITOPS_H
/*
* hweightN: returns the hamming weight (i.e. the number
* of bits set) of a N-bit word
*/
#define hweight32(x) generic_hweight32(x)
#define hweight16(x) generic_hweight16(x)
#define hweight8(x) generic_hweight8(x)
#include <asm-generic/bitops/fls.h>
#include <asm-generic/bitops/__fls.h>
#include <asm-generic/bitops/fls64.h>
#include <asm-generic/bitops/__ffs.h>
#endif /* __ASM_ARC_BITOPS_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_BYTEORDER_H
#define __ASM_ARC_BYTEORDER_H
#include <asm/types.h>
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
#define __BYTEORDER_HAS_U64__
#define __SWAB_64_THRU_32__
#endif
#ifdef __LITTLE_ENDIAN__
#include <linux/byteorder/little_endian.h>
#else
#include <linux/byteorder/big_endian.h>
#endif /* CONFIG_SYS_BIG_ENDIAN */
#endif /* ASM_ARC_BYTEORDER_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_CACHE_H
#define __ASM_ARC_CACHE_H
#include <config.h>
/*
* As of today we may handle any L1 cache line length right in software.
* For that essentially cache line length is a variable not constant.
* And to satisfy users of ARCH_DMA_MINALIGN we just use largest line length
* that may exist in either L1 or L2 (AKA SLC) caches on ARC.
*/
#define ARCH_DMA_MINALIGN 128
/* CONFIG_SYS_CACHELINE_SIZE is used a lot in drivers */
#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN
#if defined(ARC_MMU_ABSENT)
#define CONFIG_ARC_MMU_VER 0
#elif defined(CONFIG_ARC_MMU_V2)
#define CONFIG_ARC_MMU_VER 2
#elif defined(CONFIG_ARC_MMU_V3)
#define CONFIG_ARC_MMU_VER 3
#elif defined(CONFIG_ARC_MMU_V4)
#define CONFIG_ARC_MMU_VER 4
#endif
#ifndef __ASSEMBLY__
void cache_init(void);
void flush_n_invalidate_dcache_all(void);
void sync_n_cleanup_cache_all(void);
static const inline int is_ioc_enabled(void)
{
return IS_ENABLED(CONFIG_ARC_DBG_IOC_ENABLE);
}
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARC_CACHE_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_CONFIG_H_
#define __ASM_ARC_CONFIG_H_
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#define CONFIG_LMB
#endif /*__ASM_ARC_CONFIG_H_ */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_GLOBAL_DATA_H
#define __ASM_ARC_GLOBAL_DATA_H
#include <config.h>
#ifndef __ASSEMBLY__
/* Architecture-specific global data */
struct arch_global_data {
int l1_line_sz;
#if defined(CONFIG_ISA_ARCV2)
int slc_line_sz;
#endif
};
#endif /* __ASSEMBLY__ */
#include <asm-generic/global_data.h>
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r25")
#endif /* __ASM_ARC_GLOBAL_DATA_H */

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#include <asm-generic/gpio.h>

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_IO_H
#define __ASM_ARC_IO_H
#include <linux/types.h>
#include <asm/byteorder.h>
#ifdef __ARCHS__
/*
* ARCv2 based HS38 cores are in-order issue, but still weakly ordered
* due to micro-arch buffering/queuing of load/store, cache hit vs. miss ...
*
* Explicit barrier provided by DMB instruction
* - Operand supports fine grained load/store/load+store semantics
* - Ensures that selected memory operation issued before it will complete
* before any subsequent memory operation of same type
* - DMB guarantees SMP as well as local barrier semantics
* (asm-generic/barrier.h ensures sane smp_*mb if not defined here, i.e.
* UP: barrier(), SMP: smp_*mb == *mb)
* - DSYNC provides DMB+completion_of_cache_bpu_maintenance_ops hence not needed
* in the general case. Plus it only provides full barrier.
*/
#define mb() asm volatile("dmb 3\n" : : : "memory")
#define rmb() asm volatile("dmb 1\n" : : : "memory")
#define wmb() asm volatile("dmb 2\n" : : : "memory")
#else
/*
* ARCompact based cores (ARC700) only have SYNC instruction which is super
* heavy weight as it flushes the pipeline as well.
* There are no real SMP implementations of such cores.
*/
#define mb() asm volatile("sync\n" : : : "memory")
#endif
#ifdef __ARCHS__
#define __iormb() rmb()
#define __iowmb() wmb()
#else
#define __iormb() asm volatile("" : : : "memory")
#define __iowmb() asm volatile("" : : : "memory")
#endif
static inline void sync(void)
{
/* Not yet implemented */
}
static inline u8 __raw_readb(const volatile void __iomem *addr)
{
u8 b;
__asm__ __volatile__("ldb%U1 %0, %1\n"
: "=r" (b)
: "m" (*(volatile u8 __force *)addr)
: "memory");
return b;
}
static inline u16 __raw_readw(const volatile void __iomem *addr)
{
u16 s;
__asm__ __volatile__("ldw%U1 %0, %1\n"
: "=r" (s)
: "m" (*(volatile u16 __force *)addr)
: "memory");
return s;
}
static inline u32 __raw_readl(const volatile void __iomem *addr)
{
u32 w;
__asm__ __volatile__("ld%U1 %0, %1\n"
: "=r" (w)
: "m" (*(volatile u32 __force *)addr)
: "memory");
return w;
}
static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
{
__asm__ __volatile__("stb%U1 %0, %1\n"
:
: "r" (b), "m" (*(volatile u8 __force *)addr)
: "memory");
}
static inline void __raw_writew(u16 s, volatile void __iomem *addr)
{
__asm__ __volatile__("stw%U1 %0, %1\n"
:
: "r" (s), "m" (*(volatile u16 __force *)addr)
: "memory");
}
static inline void __raw_writel(u32 w, volatile void __iomem *addr)
{
__asm__ __volatile__("st%U1 %0, %1\n"
:
: "r" (w), "m" (*(volatile u32 __force *)addr)
: "memory");
}
static inline int __raw_readsb(unsigned int addr, void *data, int bytelen)
{
__asm__ __volatile__ ("1:ld.di r8, [r0]\n"
"sub.f r2, r2, 1\n"
"bnz.d 1b\n"
"stb.ab r8, [r1, 1]\n"
:
: "r" (addr), "r" (data), "r" (bytelen)
: "r8");
return bytelen;
}
static inline int __raw_readsw(unsigned int addr, void *data, int wordlen)
{
__asm__ __volatile__ ("1:ld.di r8, [r0]\n"
"sub.f r2, r2, 1\n"
"bnz.d 1b\n"
"stw.ab r8, [r1, 2]\n"
:
: "r" (addr), "r" (data), "r" (wordlen)
: "r8");
return wordlen;
}
static inline int __raw_readsl(unsigned int addr, void *data, int longlen)
{
__asm__ __volatile__ ("1:ld.di r8, [r0]\n"
"sub.f r2, r2, 1\n"
"bnz.d 1b\n"
"st.ab r8, [r1, 4]\n"
:
: "r" (addr), "r" (data), "r" (longlen)
: "r8");
return longlen;
}
static inline int __raw_writesb(unsigned int addr, void *data, int bytelen)
{
__asm__ __volatile__ ("1:ldb.ab r8, [r1, 1]\n"
"sub.f r2, r2, 1\n"
"bnz.d 1b\n"
"st.di r8, [r0, 0]\n"
:
: "r" (addr), "r" (data), "r" (bytelen)
: "r8");
return bytelen;
}
static inline int __raw_writesw(unsigned int addr, void *data, int wordlen)
{
__asm__ __volatile__ ("1:ldw.ab r8, [r1, 2]\n"
"sub.f r2, r2, 1\n"
"bnz.d 1b\n"
"st.ab.di r8, [r0, 0]\n"
:
: "r" (addr), "r" (data), "r" (wordlen)
: "r8");
return wordlen;
}
static inline int __raw_writesl(unsigned int addr, void *data, int longlen)
{
__asm__ __volatile__ ("1:ld.ab r8, [r1, 4]\n"
"sub.f r2, r2, 1\n"
"bnz.d 1b\n"
"st.ab.di r8, [r0, 0]\n"
:
: "r" (addr), "r" (data), "r" (longlen)
: "r8");
return longlen;
}
/*
* MMIO can also get buffered/optimized in micro-arch, so barriers needed
* Based on ARM model for the typical use case
*
* <ST [DMA buffer]>
* <writel MMIO "go" reg>
* or:
* <readl MMIO "status" reg>
* <LD [DMA buffer]>
*
* http://lkml.kernel.org/r/20150622133656.GG1583@arm.com
*/
#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
#define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); })
#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
/*
* Relaxed API for drivers which can handle barrier ordering themselves
*
* Also these are defined to perform little endian accesses.
* To provide the typical device register semantics of fixed endian,
* swap the byte order for Big Endian
*
* http://lkml.kernel.org/r/201603100845.30602.arnd@arndb.de
*/
#define readb_relaxed(c) __raw_readb(c)
#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
__raw_readw(c)); __r; })
#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
__raw_readl(c)); __r; })
#define writeb_relaxed(v,c) __raw_writeb(v,c)
#define writew_relaxed(v,c) __raw_writew((__force u16) cpu_to_le16(v),c)
#define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
#define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a)
#define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a))
#define out_le32(a, v) out_arch(l, le32, a, v)
#define out_le16(a, v) out_arch(w, le16, a, v)
#define in_le32(a) in_arch(l, le32, a)
#define in_le16(a) in_arch(w, le16, a)
#define out_be32(a, v) out_arch(l, be32, a, v)
#define out_be16(a, v) out_arch(w, be16, a, v)
#define in_be32(a) in_arch(l, be32, a)
#define in_be16(a) in_arch(w, be16, a)
#define out_8(a, v) __raw_writeb(v, a)
#define in_8(a) __raw_readb(a)
/*
* Clear and set bits in one shot. These macros can be used to clear and
* set multiple bits in a register using a single call. These macros can
* also be used to set a multiple-bit bit pattern using a mask, by
* specifying the mask in the 'clear' parameter and the new bit pattern
* in the 'set' parameter.
*/
#define clrbits(type, addr, clear) \
out_##type((addr), in_##type(addr) & ~(clear))
#define setbits(type, addr, set) \
out_##type((addr), in_##type(addr) | (set))
#define clrsetbits(type, addr, clear, set) \
out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
#define setbits_be32(addr, set) setbits(be32, addr, set)
#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
#define setbits_le32(addr, set) setbits(le32, addr, set)
#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
#define setbits_be16(addr, set) setbits(be16, addr, set)
#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
#define setbits_le16(addr, set) setbits(le16, addr, set)
#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
#define clrbits_8(addr, clear) clrbits(8, addr, clear)
#define setbits_8(addr, set) setbits(8, addr, set)
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
#include <asm-generic/io.h>
#endif /* __ASM_ARC_IO_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2004, 2007-2010, 2011-2015 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_LINKAGE_H
#define __ASM_ARC_LINKAGE_H
#define ASM_NL ` /* use '`' to mark new line in macro */
#endif /* __ASM_ARC_LINKAGE_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_POSIX_TYPES_H
#define __ASM_ARC_POSIX_TYPES_H
typedef unsigned short __kernel_dev_t;
typedef unsigned long __kernel_ino_t;
typedef unsigned short __kernel_mode_t;
typedef unsigned short __kernel_nlink_t;
typedef long __kernel_off_t;
typedef int __kernel_pid_t;
typedef unsigned short __kernel_ipc_pid_t;
typedef unsigned short __kernel_uid_t;
typedef unsigned short __kernel_gid_t;
#ifdef __GNUC__
typedef __SIZE_TYPE__ __kernel_size_t;
#else
typedef unsigned int __kernel_size_t;
#endif
typedef int __kernel_ssize_t;
typedef int __kernel_ptrdiff_t;
typedef long __kernel_time_t;
typedef long __kernel_suseconds_t;
typedef long __kernel_clock_t;
typedef int __kernel_daddr_t;
typedef char *__kernel_caddr_t;
typedef unsigned short __kernel_uid16_t;
typedef unsigned short __kernel_gid16_t;
typedef unsigned int __kernel_uid32_t;
typedef unsigned int __kernel_gid32_t;
typedef unsigned short __kernel_old_uid_t;
typedef unsigned short __kernel_old_gid_t;
#ifdef __GNUC__
typedef long long __kernel_loff_t;
#endif
#endif /* __ASM_ARC_POSIX_TYPES_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015 Synopsys, Inc. All rights reserved.
*/
#ifndef _ASM_ARC_PROCESSOR_H
#define _ASM_ARC_PROCESSOR_H
/* This file is required by some generic code like USB etc */
#endif /* _ASM_ARC_PROCESSOR_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_PTRACE_H
#define __ASM_ARC_PTRACE_H
struct pt_regs {
long bta;
long lp_start;
long lp_end;
long lp_count;
long status32;
long ret;
long blink;
long fp;
long r26; /* gp */
long r25;
long r24;
long r23;
long r22;
long r21;
long r20;
long r19;
long r18;
long r17;
long r16;
long r15;
long r14;
long r13;
long r12;
long r11;
long r10;
long r9;
long r8;
long r7;
long r6;
long r5;
long r4;
long r3;
long r2;
long r1;
long r0;
long sp;
long ecr;
};
#endif /* __ASM_ARC_PTRACE_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_SECTIONS_H
#define __ASM_ARC_SECTIONS_H
#include <asm-generic/sections.h>
extern ulong __ivt_start;
extern ulong __ivt_end;
#endif /* __ASM_ARC_SECTIONS_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_TYPES_H
#define __ASM_ARC_TYPES_H
#include <asm-generic/int-ll64.h>
typedef unsigned short umode_t;
#define BITS_PER_LONG 32
/* Dma addresses are 32-bits wide. */
typedef u32 dma_addr_t;
typedef unsigned long phys_addr_t;
typedef unsigned long phys_size_t;
#endif /* __ASM_ARC_TYPES_H */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_U_BOOT_ARC_H__
#define __ASM_ARC_U_BOOT_ARC_H__
int arch_early_init_r(void);
void board_init_f_r_trampoline(ulong) __attribute__ ((noreturn));
void board_init_f_r(void) __attribute__ ((noreturn));
#endif /* __ASM_ARC_U_BOOT_ARC_H__ */

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#ifndef __ASM_ARC_U_BOOT_H__
#define __ASM_ARC_U_BOOT_H__
#include <asm-generic/u-boot.h>
#include <asm/u-boot-arc.h>
/* For image.h:image_check_target_arch() */
#define IH_ARCH_DEFAULT IH_ARCH_ARC
#endif /* __ASM_ARC_U_BOOT_H__ */

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#include <asm-generic/unaligned.h>

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# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
extra-y = start.o
head-y := start.o
obj-y += cache.o
obj-y += cpu.o
obj-y += interrupts.o
obj-y += relocate.o
obj-y += reset.o
obj-y += ints_low.o
obj-y += init_helpers.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
lib-$(CONFIG_USE_PRIVATE_LIBGCC) += _millicodethunk.o libgcc2.o

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 1995, 1997, 2007-2013 Free Software Foundation, Inc.
*/
/* ANSI concatenation macros. */
#define CONCAT1(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a ## b
/* Use the right prefix for global labels. */
#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
#ifndef WORKING_ASSEMBLER
#define abs_l abs
#define asl_l asl
#define mov_l mov
#endif
#define FUNC(X) .type SYM(X),@function
#define HIDDEN_FUNC(X) FUNC(X)` .hidden X
#define ENDFUNC0(X) .Lfe_##X: .size X,.Lfe_##X-X
#define ENDFUNC(X) ENDFUNC0(X)
.section .text
.align 4
.global SYM(__st_r13_to_r15)
.global SYM(__st_r13_to_r16)
.global SYM(__st_r13_to_r17)
.global SYM(__st_r13_to_r18)
.global SYM(__st_r13_to_r19)
.global SYM(__st_r13_to_r20)
.global SYM(__st_r13_to_r21)
.global SYM(__st_r13_to_r22)
.global SYM(__st_r13_to_r23)
.global SYM(__st_r13_to_r24)
.global SYM(__st_r13_to_r25)
HIDDEN_FUNC(__st_r13_to_r15)
HIDDEN_FUNC(__st_r13_to_r16)
HIDDEN_FUNC(__st_r13_to_r17)
HIDDEN_FUNC(__st_r13_to_r18)
HIDDEN_FUNC(__st_r13_to_r19)
HIDDEN_FUNC(__st_r13_to_r20)
HIDDEN_FUNC(__st_r13_to_r21)
HIDDEN_FUNC(__st_r13_to_r22)
HIDDEN_FUNC(__st_r13_to_r23)
HIDDEN_FUNC(__st_r13_to_r24)
HIDDEN_FUNC(__st_r13_to_r25)
.align 4
SYM(__st_r13_to_r25):
st r25, [sp,48]
SYM(__st_r13_to_r24):
st r24, [sp,44]
SYM(__st_r13_to_r23):
st r23, [sp,40]
SYM(__st_r13_to_r22):
st r22, [sp,36]
SYM(__st_r13_to_r21):
st r21, [sp,32]
SYM(__st_r13_to_r20):
st r20, [sp,28]
SYM(__st_r13_to_r19):
st r19, [sp,24]
SYM(__st_r13_to_r18):
st r18, [sp,20]
SYM(__st_r13_to_r17):
st r17, [sp,16]
SYM(__st_r13_to_r16):
st r16, [sp,12]
SYM(__st_r13_to_r15):
#ifdef __ARC700__
st r15, [sp,8] ; minimum function size to avoid stall: 6 bytes.
#else
st_s r15, [sp,8]
#endif
st_s r14, [sp,4]
j_s.d [%blink]
st_s r13, [sp,0]
ENDFUNC(__st_r13_to_r15)
ENDFUNC(__st_r13_to_r16)
ENDFUNC(__st_r13_to_r17)
ENDFUNC(__st_r13_to_r18)
ENDFUNC(__st_r13_to_r19)
ENDFUNC(__st_r13_to_r20)
ENDFUNC(__st_r13_to_r21)
ENDFUNC(__st_r13_to_r22)
ENDFUNC(__st_r13_to_r23)
ENDFUNC(__st_r13_to_r24)
ENDFUNC(__st_r13_to_r25)
.section .text
.align 4
; ==================================
; the loads
.global SYM(__ld_r13_to_r15)
.global SYM(__ld_r13_to_r16)
.global SYM(__ld_r13_to_r17)
.global SYM(__ld_r13_to_r18)
.global SYM(__ld_r13_to_r19)
.global SYM(__ld_r13_to_r20)
.global SYM(__ld_r13_to_r21)
.global SYM(__ld_r13_to_r22)
.global SYM(__ld_r13_to_r23)
.global SYM(__ld_r13_to_r24)
.global SYM(__ld_r13_to_r25)
HIDDEN_FUNC(__ld_r13_to_r15)
HIDDEN_FUNC(__ld_r13_to_r16)
HIDDEN_FUNC(__ld_r13_to_r17)
HIDDEN_FUNC(__ld_r13_to_r18)
HIDDEN_FUNC(__ld_r13_to_r19)
HIDDEN_FUNC(__ld_r13_to_r20)
HIDDEN_FUNC(__ld_r13_to_r21)
HIDDEN_FUNC(__ld_r13_to_r22)
HIDDEN_FUNC(__ld_r13_to_r23)
HIDDEN_FUNC(__ld_r13_to_r24)
HIDDEN_FUNC(__ld_r13_to_r25)
SYM(__ld_r13_to_r25):
ld r25, [sp,48]
SYM(__ld_r13_to_r24):
ld r24, [sp,44]
SYM(__ld_r13_to_r23):
ld r23, [sp,40]
SYM(__ld_r13_to_r22):
ld r22, [sp,36]
SYM(__ld_r13_to_r21):
ld r21, [sp,32]
SYM(__ld_r13_to_r20):
ld r20, [sp,28]
SYM(__ld_r13_to_r19):
ld r19, [sp,24]
SYM(__ld_r13_to_r18):
ld r18, [sp,20]
SYM(__ld_r13_to_r17):
ld r17, [sp,16]
SYM(__ld_r13_to_r16):
ld r16, [sp,12]
SYM(__ld_r13_to_r15):
#ifdef __ARC700__
ld r15, [sp,8] ; minimum function size to avoid stall: 6 bytes.
#else
ld_s r15, [sp,8]
#endif
ld_s r14, [sp,4]
j_s.d [%blink]
ld_s r13, [sp,0]
ENDFUNC(__ld_r13_to_r15)
ENDFUNC(__ld_r13_to_r16)
ENDFUNC(__ld_r13_to_r17)
ENDFUNC(__ld_r13_to_r18)
ENDFUNC(__ld_r13_to_r19)
ENDFUNC(__ld_r13_to_r20)
ENDFUNC(__ld_r13_to_r21)
ENDFUNC(__ld_r13_to_r22)
ENDFUNC(__ld_r13_to_r23)
ENDFUNC(__ld_r13_to_r24)
ENDFUNC(__ld_r13_to_r25)
.global SYM(__ld_r13_to_r14_ret)
.global SYM(__ld_r13_to_r15_ret)
.global SYM(__ld_r13_to_r16_ret)
.global SYM(__ld_r13_to_r17_ret)
.global SYM(__ld_r13_to_r18_ret)
.global SYM(__ld_r13_to_r19_ret)
.global SYM(__ld_r13_to_r20_ret)
.global SYM(__ld_r13_to_r21_ret)
.global SYM(__ld_r13_to_r22_ret)
.global SYM(__ld_r13_to_r23_ret)
.global SYM(__ld_r13_to_r24_ret)
.global SYM(__ld_r13_to_r25_ret)
HIDDEN_FUNC(__ld_r13_to_r14_ret)
HIDDEN_FUNC(__ld_r13_to_r15_ret)
HIDDEN_FUNC(__ld_r13_to_r16_ret)
HIDDEN_FUNC(__ld_r13_to_r17_ret)
HIDDEN_FUNC(__ld_r13_to_r18_ret)
HIDDEN_FUNC(__ld_r13_to_r19_ret)
HIDDEN_FUNC(__ld_r13_to_r20_ret)
HIDDEN_FUNC(__ld_r13_to_r21_ret)
HIDDEN_FUNC(__ld_r13_to_r22_ret)
HIDDEN_FUNC(__ld_r13_to_r23_ret)
HIDDEN_FUNC(__ld_r13_to_r24_ret)
HIDDEN_FUNC(__ld_r13_to_r25_ret)
.section .text
.align 4
SYM(__ld_r13_to_r25_ret):
ld r25, [sp,48]
SYM(__ld_r13_to_r24_ret):
ld r24, [sp,44]
SYM(__ld_r13_to_r23_ret):
ld r23, [sp,40]
SYM(__ld_r13_to_r22_ret):
ld r22, [sp,36]
SYM(__ld_r13_to_r21_ret):
ld r21, [sp,32]
SYM(__ld_r13_to_r20_ret):
ld r20, [sp,28]
SYM(__ld_r13_to_r19_ret):
ld r19, [sp,24]
SYM(__ld_r13_to_r18_ret):
ld r18, [sp,20]
SYM(__ld_r13_to_r17_ret):
ld r17, [sp,16]
SYM(__ld_r13_to_r16_ret):
ld r16, [sp,12]
SYM(__ld_r13_to_r15_ret):
ld r15, [sp,8]
SYM(__ld_r13_to_r14_ret):
ld blink,[sp,r12]
ld_s r14, [sp,4]
ld.ab r13, [sp,r12]
j_s.d [%blink]
add_s sp,sp,4
ENDFUNC(__ld_r13_to_r14_ret)
ENDFUNC(__ld_r13_to_r15_ret)
ENDFUNC(__ld_r13_to_r16_ret)
ENDFUNC(__ld_r13_to_r17_ret)
ENDFUNC(__ld_r13_to_r18_ret)
ENDFUNC(__ld_r13_to_r19_ret)
ENDFUNC(__ld_r13_to_r20_ret)
ENDFUNC(__ld_r13_to_r21_ret)
ENDFUNC(__ld_r13_to_r22_ret)
ENDFUNC(__ld_r13_to_r23_ret)
ENDFUNC(__ld_r13_to_r24_ret)
ENDFUNC(__ld_r13_to_r25_ret)

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#include <irq_func.h>
#include <asm/cache.h>
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
static ulong get_sp(void)
{
ulong ret;
asm("mov %0, sp" : "=r"(ret) : );
return ret;
}
void arch_lmb_reserve(struct lmb *lmb)
{
ulong sp;
/*
* Booting a (Linux) kernel image
*
* Allocate space for command line and board info - the
* address should be as high as possible within the reach of
* the kernel (see CONFIG_SYS_BOOTMAPSZ settings), but in unused
* memory, which means far enough below the current stack
* pointer.
*/
sp = get_sp();
debug("## Current stack ends at 0x%08lx ", sp);
/* adjust sp by 4K to be safe */
sp -= 4096;
lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
}
static int cleanup_before_linux(void)
{
disable_interrupts();
sync_n_cleanup_cache_all();
return 0;
}
__weak int board_prep_linux(bootm_headers_t *images) { return 0; }
/* Subcommand: PREP */
static int boot_prep_linux(bootm_headers_t *images)
{
int ret;
ret = image_setup_linux(images);
if (ret)
return ret;
return board_prep_linux(images);
}
/* Generic implementation for single core CPU */
__weak void board_jump_and_run(ulong entry, int zero, int arch, uint params)
{
void (*kernel_entry)(int zero, int arch, uint params);
kernel_entry = (void (*)(int, int, uint))entry;
kernel_entry(zero, arch, params);
}
/* Subcommand: GO */
static void boot_jump_linux(bootm_headers_t *images, int flag)
{
ulong kernel_entry;
unsigned int r0, r2;
int fake = (flag & BOOTM_STATE_OS_FAKE_GO);
kernel_entry = images->ep;
debug("## Transferring control to Linux (at address %08lx)...\n",
kernel_entry);
bootstage_mark(BOOTSTAGE_ID_RUN_OS);
printf("\nStarting kernel ...%s\n\n", fake ?
"(fake run for tracing)" : "");
bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
r0 = 2;
r2 = (unsigned int)images->ft_addr;
} else {
r0 = 1;
r2 = (unsigned int)env_get("bootargs");
}
cleanup_before_linux();
if (!fake)
board_jump_and_run(kernel_entry, r0, 0, r2);
}
int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
{
/* No need for those on ARC */
if ((flag & BOOTM_STATE_OS_BD_T) || (flag & BOOTM_STATE_OS_CMDLINE))
return -1;
if (flag & BOOTM_STATE_OS_PREP)
return boot_prep_linux(images);
if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) {
boot_jump_linux(images, flag);
return 0;
}
return -1;
}

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#include <config.h>
#include <common.h>
#include <cpu_func.h>
#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/log2.h>
#include <asm/arcregs.h>
#include <asm/arc-bcr.h>
#include <asm/cache.h>
/*
* [ NOTE 1 ]:
* Data cache (L1 D$ or SL$) entire invalidate operation or data cache disable
* operation may result in unexpected behavior and data loss even if we flush
* data cache right before invalidation. That may happens if we store any context
* on stack (like we store BLINK register on stack before function call).
* BLINK register is the register where return address is automatically saved
* when we do function call with instructions like 'bl'.
*
* There is the real example:
* We may hang in the next code as we store any BLINK register on stack in
* invalidate_dcache_all() function.
*
* void flush_dcache_all() {
* __dc_entire_op(OP_FLUSH);
* // Other code //
* }
*
* void invalidate_dcache_all() {
* __dc_entire_op(OP_INV);
* // Other code //
* }
*
* void foo(void) {
* flush_dcache_all();
* invalidate_dcache_all();
* }
*
* Now let's see what really happens during that code execution:
*
* foo()
* |->> call flush_dcache_all
* [return address is saved to BLINK register]
* [push BLINK] (save to stack) ![point 1]
* |->> call __dc_entire_op(OP_FLUSH)
* [return address is saved to BLINK register]
* [flush L1 D$]
* return [jump to BLINK]
* <<------
* [other flush_dcache_all code]
* [pop BLINK] (get from stack)
* return [jump to BLINK]
* <<------
* |->> call invalidate_dcache_all
* [return address is saved to BLINK register]
* [push BLINK] (save to stack) ![point 2]
* |->> call __dc_entire_op(OP_FLUSH)
* [return address is saved to BLINK register]
* [invalidate L1 D$] ![point 3]
* // Oops!!!
* // We lose return address from invalidate_dcache_all function:
* // we save it to stack and invalidate L1 D$ after that!
* return [jump to BLINK]
* <<------
* [other invalidate_dcache_all code]
* [pop BLINK] (get from stack)
* // we don't have this data in L1 dcache as we invalidated it in [point 3]
* // so we get it from next memory level (for example DDR memory)
* // but in the memory we have value which we save in [point 1], which
* // is return address from flush_dcache_all function (instead of
* // address from current invalidate_dcache_all function which we
* // saved in [point 2] !)
* return [jump to BLINK]
* <<------
* // As BLINK points to invalidate_dcache_all, we call it again and
* // loop forever.
*
* Fortunately we may fix that by using flush & invalidation of D$ with a single
* one instruction (instead of flush and invalidation instructions pair) and
* enabling force function inline with '__attribute__((always_inline))' gcc
* attribute to avoid any function call (and BLINK store) between cache flush
* and disable.
*
*
* [ NOTE 2 ]:
* As of today we only support the following cache configurations on ARC.
* Other configurations may exist in HW (for example, since version 3.0 HS
* supports SL$ (L2 system level cache) disable) but we don't support it in SW.
* Configuration 1:
* ______________________
* | |
* | ARC CPU |
* |______________________|
* ___|___ ___|___
* | | | |
* | L1 I$ | | L1 D$ |
* |_______| |_______|
* on/off on/off
* ___|______________|____
* | |
* | main memory |
* |______________________|
*
* Configuration 2:
* ______________________
* | |
* | ARC CPU |
* |______________________|
* ___|___ ___|___
* | | | |
* | L1 I$ | | L1 D$ |
* |_______| |_______|
* on/off on/off
* ___|______________|____
* | |
* | L2 (SL$) |
* |______________________|
* always must be on
* ___|______________|____
* | |
* | main memory |
* |______________________|
*
* Configuration 3:
* ______________________
* | |
* | ARC CPU |
* |______________________|
* ___|___ ___|___
* | | | |
* | L1 I$ | | L1 D$ |
* |_______| |_______|
* on/off must be on
* ___|______________|____ _______
* | | | |
* | L2 (SL$) |-----| IOC |
* |______________________| |_______|
* always must be on on/off
* ___|______________|____
* | |
* | main memory |
* |______________________|
*/
DECLARE_GLOBAL_DATA_PTR;
/* Bit values in IC_CTRL */
#define IC_CTRL_CACHE_DISABLE BIT(0)
/* Bit values in DC_CTRL */
#define DC_CTRL_CACHE_DISABLE BIT(0)
#define DC_CTRL_INV_MODE_FLUSH BIT(6)
#define DC_CTRL_FLUSH_STATUS BIT(8)
#define OP_INV BIT(0)
#define OP_FLUSH BIT(1)
#define OP_FLUSH_N_INV (OP_FLUSH | OP_INV)
/* Bit val in SLC_CONTROL */
#define SLC_CTRL_DIS 0x001
#define SLC_CTRL_IM 0x040
#define SLC_CTRL_BUSY 0x100
#define SLC_CTRL_RGN_OP_INV 0x200
#define CACHE_LINE_MASK (~(gd->arch.l1_line_sz - 1))
/*
* We don't want to use '__always_inline' macro here as it can be redefined
* to simple 'inline' in some cases which breaks stuff. See [ NOTE 1 ] for more
* details about the reasons we need to use always_inline functions.
*/
#define inlined_cachefunc inline __attribute__((always_inline))
static inlined_cachefunc void __ic_entire_invalidate(void);
static inlined_cachefunc void __dc_entire_op(const int cacheop);
static inline bool pae_exists(void)
{
/* TODO: should we compare mmu version from BCR and from CONFIG? */
#if (CONFIG_ARC_MMU_VER >= 4)
union bcr_mmu_4 mmu4;
mmu4.word = read_aux_reg(ARC_AUX_MMU_BCR);
if (mmu4.fields.pae)
return true;
#endif /* (CONFIG_ARC_MMU_VER >= 4) */
return false;
}
static inlined_cachefunc bool icache_exists(void)
{
union bcr_di_cache ibcr;
ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD);
return !!ibcr.fields.ver;
}
static inlined_cachefunc bool icache_enabled(void)
{
if (!icache_exists())
return false;
return !(read_aux_reg(ARC_AUX_IC_CTRL) & IC_CTRL_CACHE_DISABLE);
}
static inlined_cachefunc bool dcache_exists(void)
{
union bcr_di_cache dbcr;
dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD);
return !!dbcr.fields.ver;
}
static inlined_cachefunc bool dcache_enabled(void)
{
if (!dcache_exists())
return false;
return !(read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_CACHE_DISABLE);
}
static inlined_cachefunc bool slc_exists(void)
{
if (is_isa_arcv2()) {
union bcr_generic sbcr;
sbcr.word = read_aux_reg(ARC_BCR_SLC);
return !!sbcr.fields.ver;
}
return false;
}
static inlined_cachefunc bool slc_data_bypass(void)
{
/*
* If L1 data cache is disabled SL$ is bypassed and all load/store
* requests are sent directly to main memory.
*/
return !dcache_enabled();
}
static inline bool ioc_exists(void)
{
if (is_isa_arcv2()) {
union bcr_clust_cfg cbcr;
cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
return cbcr.fields.c;
}
return false;
}
static inline bool ioc_enabled(void)
{
/*
* We check only CONFIG option instead of IOC HW state check as IOC
* must be disabled by default.
*/
if (is_ioc_enabled())
return ioc_exists();
return false;
}
static inlined_cachefunc void __slc_entire_op(const int op)
{
unsigned int ctrl;
if (!slc_exists())
return;
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
if (!(op & OP_FLUSH)) /* i.e. OP_INV */
ctrl &= ~SLC_CTRL_IM; /* clear IM: Disable flush before Inv */
else
ctrl |= SLC_CTRL_IM;
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
if (op & OP_INV) /* Inv or flush-n-inv use same cmd reg */
write_aux_reg(ARC_AUX_SLC_INVALIDATE, 0x1);
else
write_aux_reg(ARC_AUX_SLC_FLUSH, 0x1);
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
read_aux_reg(ARC_AUX_SLC_CTRL);
/* Important to wait for flush to complete */
while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
}
static void slc_upper_region_init(void)
{
/*
* ARC_AUX_SLC_RGN_START1 and ARC_AUX_SLC_RGN_END1 register exist
* only if PAE exists in current HW. So we had to check pae_exist
* before using them.
*/
if (!pae_exists())
return;
/*
* ARC_AUX_SLC_RGN_END1 and ARC_AUX_SLC_RGN_START1 are always == 0
* as we don't use PAE40.
*/
write_aux_reg(ARC_AUX_SLC_RGN_END1, 0);
write_aux_reg(ARC_AUX_SLC_RGN_START1, 0);
}
static void __slc_rgn_op(unsigned long paddr, unsigned long sz, const int op)
{
#ifdef CONFIG_ISA_ARCV2
unsigned int ctrl;
unsigned long end;
if (!slc_exists())
return;
/*
* The Region Flush operation is specified by CTRL.RGN_OP[11..9]
* - b'000 (default) is Flush,
* - b'001 is Invalidate if CTRL.IM == 0
* - b'001 is Flush-n-Invalidate if CTRL.IM == 1
*/
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
/* Don't rely on default value of IM bit */
if (!(op & OP_FLUSH)) /* i.e. OP_INV */
ctrl &= ~SLC_CTRL_IM; /* clear IM: Disable flush before Inv */
else
ctrl |= SLC_CTRL_IM;
if (op & OP_INV)
ctrl |= SLC_CTRL_RGN_OP_INV; /* Inv or flush-n-inv */
else
ctrl &= ~SLC_CTRL_RGN_OP_INV;
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
/*
* Lower bits are ignored, no need to clip
* END needs to be setup before START (latter triggers the operation)
* END can't be same as START, so add (l2_line_sz - 1) to sz
*/
end = paddr + sz + gd->arch.slc_line_sz - 1;
/*
* Upper addresses (ARC_AUX_SLC_RGN_END1 and ARC_AUX_SLC_RGN_START1)
* are always == 0 as we don't use PAE40, so we only setup lower ones
* (ARC_AUX_SLC_RGN_END and ARC_AUX_SLC_RGN_START)
*/
write_aux_reg(ARC_AUX_SLC_RGN_END, end);
write_aux_reg(ARC_AUX_SLC_RGN_START, paddr);
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
read_aux_reg(ARC_AUX_SLC_CTRL);
while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
#endif /* CONFIG_ISA_ARCV2 */
}
static void arc_ioc_setup(void)
{
/* IOC Aperture start is equal to DDR start */
unsigned int ap_base = CONFIG_SYS_SDRAM_BASE;
/* IOC Aperture size is equal to DDR size */
long ap_size = CONFIG_SYS_SDRAM_SIZE;
/* Unsupported configuration. See [ NOTE 2 ] for more details. */
if (!slc_exists())
panic("Try to enable IOC but SLC is not present");
/* Unsupported configuration. See [ NOTE 2 ] for more details. */
if (!dcache_enabled())
panic("Try to enable IOC but L1 D$ is disabled");
if (!is_power_of_2(ap_size) || ap_size < 4096)
panic("IOC Aperture size must be power of 2 and bigger 4Kib");
/* IOC Aperture start must be aligned to the size of the aperture */
if (ap_base % ap_size != 0)
panic("IOC Aperture start must be aligned to the size of the aperture");
flush_n_invalidate_dcache_all();
/*
* IOC Aperture size decoded as 2 ^ (SIZE + 2) KB,
* so setting 0x11 implies 512M, 0x12 implies 1G...
*/
write_aux_reg(ARC_AUX_IO_COH_AP0_SIZE,
order_base_2(ap_size / 1024) - 2);
write_aux_reg(ARC_AUX_IO_COH_AP0_BASE, ap_base >> 12);
write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1);
write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1);
}
static void read_decode_cache_bcr_arcv2(void)
{
#ifdef CONFIG_ISA_ARCV2
union bcr_slc_cfg slc_cfg;
if (slc_exists()) {
slc_cfg.word = read_aux_reg(ARC_AUX_SLC_CONFIG);
gd->arch.slc_line_sz = (slc_cfg.fields.lsz == 0) ? 128 : 64;
/*
* We don't support configuration where L1 I$ or L1 D$ is
* absent but SL$ exists. See [ NOTE 2 ] for more details.
*/
if (!icache_exists() || !dcache_exists())
panic("Unsupported cache configuration: SLC exists but one of L1 caches is absent");
}
#endif /* CONFIG_ISA_ARCV2 */
}
void read_decode_cache_bcr(void)
{
int dc_line_sz = 0, ic_line_sz = 0;
union bcr_di_cache ibcr, dbcr;
/*
* We don't care much about I$ line length really as there're
* no per-line ops on I$ instead we only do full invalidation of it
* on occasion of relocation and right before jumping to the OS.
* Still we check insane config with zero-encoded line length in
* presense of version field in I$ BCR. Just in case.
*/
ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD);
if (ibcr.fields.ver) {
ic_line_sz = 8 << ibcr.fields.line_len;
if (!ic_line_sz)
panic("Instruction exists but line length is 0\n");
}
dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD);
if (dbcr.fields.ver) {
gd->arch.l1_line_sz = dc_line_sz = 16 << dbcr.fields.line_len;
if (!dc_line_sz)
panic("Data cache exists but line length is 0\n");
}
}
void cache_init(void)
{
read_decode_cache_bcr();
if (is_isa_arcv2())
read_decode_cache_bcr_arcv2();
if (is_isa_arcv2() && ioc_enabled())
arc_ioc_setup();
if (is_isa_arcv2() && slc_exists())
slc_upper_region_init();
}
int icache_status(void)
{
return icache_enabled();
}
void icache_enable(void)
{
if (icache_exists())
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) &
~IC_CTRL_CACHE_DISABLE);
}
void icache_disable(void)
{
if (!icache_exists())
return;
__ic_entire_invalidate();
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) |
IC_CTRL_CACHE_DISABLE);
}
/* IC supports only invalidation */
static inlined_cachefunc void __ic_entire_invalidate(void)
{
if (!icache_enabled())
return;
/* Any write to IC_IVIC register triggers invalidation of entire I$ */
write_aux_reg(ARC_AUX_IC_IVIC, 1);
/*
* As per ARC HS databook (see chapter 5.3.3.2)
* it is required to add 3 NOPs after each write to IC_IVIC.
*/
__builtin_arc_nop();
__builtin_arc_nop();
__builtin_arc_nop();
read_aux_reg(ARC_AUX_IC_CTRL); /* blocks */
}
void invalidate_icache_all(void)
{
__ic_entire_invalidate();
/*
* If SL$ is bypassed for data it is used only for instructions,
* so we need to invalidate it too.
* TODO: HS 3.0 supports SLC disable so we need to check slc
* enable/disable status here.
*/
if (is_isa_arcv2() && slc_data_bypass())
__slc_entire_op(OP_INV);
}
int dcache_status(void)
{
return dcache_enabled();
}
void dcache_enable(void)
{
if (!dcache_exists())
return;
write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) &
~(DC_CTRL_INV_MODE_FLUSH | DC_CTRL_CACHE_DISABLE));
}
void dcache_disable(void)
{
if (!dcache_exists())
return;
__dc_entire_op(OP_FLUSH_N_INV);
/*
* As SLC will be bypassed for data after L1 D$ disable we need to
* flush it first before L1 D$ disable. Also we invalidate SLC to
* avoid any inconsistent data problems after enabling L1 D$ again with
* dcache_enable function.
*/
if (is_isa_arcv2())
__slc_entire_op(OP_FLUSH_N_INV);
write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) |
DC_CTRL_CACHE_DISABLE);
}
/* Common Helper for Line Operations on D-cache */
static inline void __dcache_line_loop(unsigned long paddr, unsigned long sz,
const int cacheop)
{
unsigned int aux_cmd;
int num_lines;
/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */
aux_cmd = cacheop & OP_INV ? ARC_AUX_DC_IVDL : ARC_AUX_DC_FLDL;
sz += paddr & ~CACHE_LINE_MASK;
paddr &= CACHE_LINE_MASK;
num_lines = DIV_ROUND_UP(sz, gd->arch.l1_line_sz);
while (num_lines-- > 0) {
#if (CONFIG_ARC_MMU_VER == 3)
write_aux_reg(ARC_AUX_DC_PTAG, paddr);
#endif
write_aux_reg(aux_cmd, paddr);
paddr += gd->arch.l1_line_sz;
}
}
static inlined_cachefunc void __before_dc_op(const int op)
{
unsigned int ctrl;
ctrl = read_aux_reg(ARC_AUX_DC_CTRL);
/* IM bit implies flush-n-inv, instead of vanilla inv */
if (op == OP_INV)
ctrl &= ~DC_CTRL_INV_MODE_FLUSH;
else
ctrl |= DC_CTRL_INV_MODE_FLUSH;
write_aux_reg(ARC_AUX_DC_CTRL, ctrl);
}
static inlined_cachefunc void __after_dc_op(const int op)
{
if (op & OP_FLUSH) /* flush / flush-n-inv both wait */
while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS);
}
static inlined_cachefunc void __dc_entire_op(const int cacheop)
{
int aux;
if (!dcache_enabled())
return;
__before_dc_op(cacheop);
if (cacheop & OP_INV) /* Inv or flush-n-inv use same cmd reg */
aux = ARC_AUX_DC_IVDC;
else
aux = ARC_AUX_DC_FLSH;
write_aux_reg(aux, 0x1);
__after_dc_op(cacheop);
}
static inline void __dc_line_op(unsigned long paddr, unsigned long sz,
const int cacheop)
{
if (!dcache_enabled())
return;
__before_dc_op(cacheop);
__dcache_line_loop(paddr, sz, cacheop);
__after_dc_op(cacheop);
}
void invalidate_dcache_range(unsigned long start, unsigned long end)
{
if (start >= end)
return;
/*
* ARCv1 -> call __dc_line_op
* ARCv2 && L1 D$ disabled -> nothing
* ARCv2 && L1 D$ enabled && IOC enabled -> nothing
* ARCv2 && L1 D$ enabled && no IOC -> call __dc_line_op; call __slc_rgn_op
*/
if (!is_isa_arcv2() || !ioc_enabled())
__dc_line_op(start, end - start, OP_INV);
if (is_isa_arcv2() && !ioc_enabled() && !slc_data_bypass())
__slc_rgn_op(start, end - start, OP_INV);
}
void flush_dcache_range(unsigned long start, unsigned long end)
{
if (start >= end)
return;
/*
* ARCv1 -> call __dc_line_op
* ARCv2 && L1 D$ disabled -> nothing
* ARCv2 && L1 D$ enabled && IOC enabled -> nothing
* ARCv2 && L1 D$ enabled && no IOC -> call __dc_line_op; call __slc_rgn_op
*/
if (!is_isa_arcv2() || !ioc_enabled())
__dc_line_op(start, end - start, OP_FLUSH);
if (is_isa_arcv2() && !ioc_enabled() && !slc_data_bypass())
__slc_rgn_op(start, end - start, OP_FLUSH);
}
void flush_cache(unsigned long start, unsigned long size)
{
flush_dcache_range(start, start + size);
}
/*
* As invalidate_dcache_all() is not used in generic U-Boot code and as we
* don't need it in arch/arc code alone (invalidate without flush) we implement
* flush_n_invalidate_dcache_all (flush and invalidate in 1 operation) because
* it's much safer. See [ NOTE 1 ] for more details.
*/
void flush_n_invalidate_dcache_all(void)
{
__dc_entire_op(OP_FLUSH_N_INV);
if (is_isa_arcv2() && !slc_data_bypass())
__slc_entire_op(OP_FLUSH_N_INV);
}
void flush_dcache_all(void)
{
__dc_entire_op(OP_FLUSH);
if (is_isa_arcv2() && !slc_data_bypass())
__slc_entire_op(OP_FLUSH);
}
/*
* This is function to cleanup all caches (and therefore sync I/D caches) which
* can be used for cleanup before linux launch or to sync caches during
* relocation.
*/
void sync_n_cleanup_cache_all(void)
{
__dc_entire_op(OP_FLUSH_N_INV);
/*
* If SL$ is bypassed for data it is used only for instructions,
* and we shouldn't flush it. So invalidate it instead of flush_n_inv.
*/
if (is_isa_arcv2()) {
if (slc_data_bypass())
__slc_entire_op(OP_INV);
else
__slc_entire_op(OP_FLUSH_N_INV);
}
__ic_entire_invalidate();
}

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014, 2018 Synopsys, Inc. All rights reserved.
*/
#include <common.h>
#include <malloc.h>
#include <vsprintf.h>
#include <asm/arcregs.h>
#include <asm/cache.h>
DECLARE_GLOBAL_DATA_PTR;
int arch_cpu_init(void)
{
timer_init();
gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
cache_init();
return 0;
}
int arch_early_init_r(void)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
return 0;
}
/* This is a dummy function on arc */
int dram_init(void)
{
return 0;
}
#ifdef CONFIG_DISPLAY_CPUINFO
const char *arc_700_version(int arcver, char *name, int name_len)
{
const char *arc_ver;
switch (arcver) {
case 0x32:
arc_ver = "v4.4-4.5";
break;
case 0x33:
arc_ver = "v4.6-v4.9";
break;
case 0x34:
arc_ver = "v4.10";
break;
case 0x35:
arc_ver = "v4.11";
break;
default:
arc_ver = "unknown version";
}
snprintf(name, name_len, "ARC 700 %s", arc_ver);
return name;
}
struct em_template_t {
const bool cache;
const bool dsp;
const bool xymem;
const char name[8];
};
static const struct em_template_t em_versions[] = {
{false, false, false, "EM4"},
{true, false, false, "EM6"},
{false, true, false, "EM5D"},
{true, true, false, "EM7D"},
{false, true, true, "EM9D"},
{true, true, true, "EM11D"},
};
const char *arc_em_version(int arcver, char *name, int name_len)
{
const char *arc_name = "EM";
const char *arc_ver;
bool cache = ARC_FEATURE_EXISTS(ARC_BCR_IC_BUILD);
bool dsp = ARC_FEATURE_EXISTS(ARC_AUX_DSP_BUILD);
bool xymem = ARC_FEATURE_EXISTS(ARC_AUX_XY_BUILD);
int i;
for (i = 0; i < sizeof(em_versions) / sizeof(struct em_template_t); i++) {
if (em_versions[i].cache == cache &&
em_versions[i].dsp == dsp &&
em_versions[i].xymem == xymem) {
arc_name = em_versions[i].name;
break;
}
}
switch (arcver) {
case 0x41:
arc_ver = "v1.1a";
break;
case 0x42:
arc_ver = "v3.0";
break;
case 0x43:
arc_ver = "v4.0";
break;
case 0x44:
arc_ver = "v5.0";
break;
default:
arc_ver = "unknown version";
}
snprintf(name, name_len, "ARC %s %s", arc_name, arc_ver);
return name;
}
struct hs_template_t {
const bool cache;
const bool mmu;
const bool dual_issue;
const bool dsp;
const char name[8];
};
static const struct hs_template_t hs_versions[] = {
{false, false, false, false, "HS34"},
{true, false, false, false, "HS36"},
{true, true, false, false, "HS38"},
{false, false, true, false, "HS44"},
{true, false, true, false, "HS46"},
{true, true, true, false, "HS48"},
{false, false, true, true, "HS45D"},
{true, false, true, true, "HS47D"},
};
const char *arc_hs_version(int arcver, char *name, int name_len)
{
const char *arc_name = "HS";
const char *arc_ver;
bool cache = ARC_FEATURE_EXISTS(ARC_BCR_IC_BUILD);
bool dsp = ARC_FEATURE_EXISTS(ARC_AUX_DSP_BUILD);
bool mmu = !!read_aux_reg(ARC_AUX_MMU_BCR);
bool dual_issue = arcver == 0x54 ? true : false;
int i;
for (i = 0; i < sizeof(hs_versions) / sizeof(struct hs_template_t); i++) {
if (hs_versions[i].cache == cache &&
hs_versions[i].mmu == mmu &&
hs_versions[i].dual_issue == dual_issue &&
hs_versions[i].dsp == dsp) {
arc_name = hs_versions[i].name;
break;
}
}
switch (arcver) {
case 0x50:
arc_ver = "v1.0";
break;
case 0x51:
arc_ver = "v2.0";
break;
case 0x52:
arc_ver = "v2.1c";
break;
case 0x53:
arc_ver = "v3.0";
break;
case 0x54:
arc_ver = "v4.0";
break;
default:
arc_ver = "unknown version";
}
snprintf(name, name_len, "ARC %s %s", arc_name, arc_ver);
return name;
}
const char *decode_identity(void)
{
#define MAX_CPU_NAME_LEN 64
int arcver = read_aux_reg(ARC_AUX_IDENTITY) & 0xff;
char *name = malloc(MAX_CPU_NAME_LEN);
if (arcver >= 0x50)
return arc_hs_version(arcver, name, MAX_CPU_NAME_LEN);
else if (arcver >= 0x40)
return arc_em_version(arcver, name, MAX_CPU_NAME_LEN);
else if (arcver >= 0x30)
return arc_700_version(arcver, name, MAX_CPU_NAME_LEN);
else
return "Unknown ARC core";
}
const char *decode_subsystem(void)
{
int subsys_type = read_aux_reg(ARC_AUX_SUBSYS_BUILD) & GENMASK(3, 0);
switch (subsys_type) {
case 0: return NULL;
case 2: return "ARC Sensor & Control IP Subsystem";
case 3: return "ARC Data Fusion IP Subsystem";
case 4: return "ARC Secure Subsystem";
default: return "Unknown subsystem";
};
}
__weak int print_cpuinfo(void)
{
const char *subsys_name = decode_subsystem();
char mhz[8];
printf("CPU: %s at %s MHz\n", decode_identity(),
strmhz(mhz, gd->cpu_clk));
if (subsys_name)
printf("Subsys:%s\n", subsys_name);
return 0;
}
#endif /* CONFIG_DISPLAY_CPUINFO */

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*/
#include <asm/cache.h>
#include <common.h>
int init_cache_f_r(void)
{
sync_n_cleanup_cache_all();
return 0;
}

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#include <common.h>
#include <irq_func.h>
#include <asm/arcregs.h>
#include <asm/ptrace.h>
/* Bit values in STATUS32 */
#define E1_MASK (1 << 1) /* Level 1 interrupts enable */
#define E2_MASK (1 << 2) /* Level 2 interrupts enable */
int interrupt_init(void)
{
return 0;
}
/*
* returns true if interrupts had been enabled before we disabled them
*/
int disable_interrupts(void)
{
int status = read_aux_reg(ARC_AUX_STATUS32);
int state = (status & (E1_MASK | E2_MASK)) ? 1 : 0;
status &= ~(E1_MASK | E2_MASK);
/* STATUS32 register is updated indirectly with "FLAG" instruction */
__asm__("flag %0" : : "r" (status));
return state;
}
void enable_interrupts(void)
{
unsigned int status = read_aux_reg(ARC_AUX_STATUS32);
status |= E1_MASK | E2_MASK;
/* STATUS32 register is updated indirectly with "FLAG" instruction */
__asm__("flag %0" : : "r" (status));
}
static void print_reg_file(long *reg_rev, int start_num)
{
unsigned int i;
/* Print 3 registers per line */
for (i = start_num; i < start_num + 25; i++) {
printf("r%02u: 0x%08lx\t", i, (unsigned long)*reg_rev);
if (((i + 1) % 3) == 0)
printf("\n");
/* Because pt_regs has registers reversed */
reg_rev--;
}
/* Add new-line if none was inserted in the end of loop above */
if (((i + 1) % 3) != 0)
printf("\n");
}
void show_regs(struct pt_regs *regs)
{
printf("ECR:\t0x%08lx\n", regs->ecr);
printf("RET:\t0x%08lx\nBLINK:\t0x%08lx\nSTAT32:\t0x%08lx\n",
regs->ret, regs->blink, regs->status32);
printf("GP: 0x%08lx\t r25: 0x%08lx\t\n", regs->r26, regs->r25);
printf("BTA: 0x%08lx\t SP: 0x%08lx\t FP: 0x%08lx\n", regs->bta,
regs->sp, regs->fp);
printf("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n", regs->lp_start,
regs->lp_end, regs->lp_count);
print_reg_file(&(regs->r0), 0);
}
void bad_mode(struct pt_regs *regs)
{
if (regs)
show_regs(regs);
panic("Resetting CPU ...\n");
}
void do_memory_error(unsigned long address, struct pt_regs *regs)
{
printf("Memory error exception @ 0x%lx\n", address);
bad_mode(regs);
}
void do_instruction_error(unsigned long address, struct pt_regs *regs)
{
printf("Instruction error exception @ 0x%lx\n", address);
bad_mode(regs);
}
void do_machine_check_fault(unsigned long address, struct pt_regs *regs)
{
printf("Machine check exception @ 0x%lx\n", address);
bad_mode(regs);
}
void do_interrupt_handler(void)
{
printf("Interrupt fired\n");
bad_mode(0);
}
void do_itlb_miss(struct pt_regs *regs)
{
printf("I TLB miss exception\n");
bad_mode(regs);
}
void do_dtlb_miss(struct pt_regs *regs)
{
printf("D TLB miss exception\n");
bad_mode(regs);
}
void do_tlb_prot_violation(unsigned long address, struct pt_regs *regs)
{
printf("TLB protection violation or misaligned access @ 0x%lx\n",
address);
bad_mode(regs);
}
void do_privilege_violation(struct pt_regs *regs)
{
printf("Privilege violation exception\n");
bad_mode(regs);
}
void do_trap(struct pt_regs *regs)
{
printf("Trap exception\n");
bad_mode(regs);
}
void do_extension(struct pt_regs *regs)
{
printf("Extension instruction exception\n");
bad_mode(regs);
}
#ifdef CONFIG_ISA_ARCV2
void do_swi(struct pt_regs *regs)
{
printf("Software Interrupt exception\n");
bad_mode(regs);
}
void do_divzero(unsigned long address, struct pt_regs *regs)
{
printf("Division by zero exception @ 0x%lx\n", address);
bad_mode(regs);
}
void do_dcerror(struct pt_regs *regs)
{
printf("Data cache consistency error exception\n");
bad_mode(regs);
}
void do_maligned(unsigned long address, struct pt_regs *regs)
{
printf("Misaligned data access exception @ 0x%lx\n", address);
bad_mode(regs);
}
#endif

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*/
#include <linux/linkage.h>
/*
* Note on the LD/ST addressing modes with address register write-back
*
* LD.a same as LD.aw
*
* LD.a reg1, [reg2, x] => Pre Incr
* Eff Addr for load = [reg2 + x]
*
* LD.ab reg1, [reg2, x] => Post Incr
* Eff Addr for load = [reg2]
*/
.macro PUSH reg
st.a \reg, [%sp, -4]
.endm
.macro PUSHAX aux
lr %r9, [\aux]
PUSH %r9
.endm
.macro SAVE_R1_TO_R24
PUSH %r1
PUSH %r2
PUSH %r3
PUSH %r4
PUSH %r5
PUSH %r6
PUSH %r7
PUSH %r8
PUSH %r9
PUSH %r10
PUSH %r11
PUSH %r12
PUSH %r13
PUSH %r14
PUSH %r15
PUSH %r16
PUSH %r17
PUSH %r18
PUSH %r19
PUSH %r20
PUSH %r21
PUSH %r22
PUSH %r23
PUSH %r24
.endm
.macro SAVE_ALL_SYS
/* saving %r0 to reg->r0 in advance since we read %ecr into it */
st %r0, [%sp, -8]
lr %r0, [%ecr] /* all stack addressing is manual so far */
st %r0, [%sp]
st %sp, [%sp, -4]
/* now move %sp to reg->r0 position so we can do "push" automatically */
sub %sp, %sp, 8
SAVE_R1_TO_R24
PUSH %r25
PUSH %gp
PUSH %fp
PUSH %blink
PUSHAX %eret
PUSHAX %erstatus
PUSH %lp_count
PUSHAX %lp_end
PUSHAX %lp_start
PUSHAX %erbta
.endm
.macro SAVE_EXCEPTION_SOURCE
#ifdef CONFIG_MMU
/* If MMU exists exception faulting address is loaded in EFA reg */
lr %r0, [%efa]
#else
/* Otherwise in ERET (exception return) reg */
lr %r0, [%eret]
#endif
.endm
ENTRY(memory_error)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_memory_error
ENDPROC(memory_error)
ENTRY(instruction_error)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_instruction_error
ENDPROC(instruction_error)
ENTRY(interrupt_handler)
/* Todo - save and restore CPU context when interrupts will be in use */
bl do_interrupt_handler
rtie
ENDPROC(interrupt_handler)
ENTRY(EV_MachineCheck)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_machine_check_fault
ENDPROC(EV_MachineCheck)
ENTRY(EV_TLBMissI)
SAVE_ALL_SYS
mov %r0, %sp
j do_itlb_miss
ENDPROC(EV_TLBMissI)
ENTRY(EV_TLBMissD)
SAVE_ALL_SYS
mov %r0, %sp
j do_dtlb_miss
ENDPROC(EV_TLBMissD)
ENTRY(EV_TLBProtV)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_tlb_prot_violation
ENDPROC(EV_TLBProtV)
ENTRY(EV_PrivilegeV)
SAVE_ALL_SYS
mov %r0, %sp
j do_privilege_violation
ENDPROC(EV_PrivilegeV)
ENTRY(EV_Trap)
SAVE_ALL_SYS
mov %r0, %sp
j do_trap
ENDPROC(EV_Trap)
ENTRY(EV_Extension)
SAVE_ALL_SYS
mov %r0, %sp
j do_extension
ENDPROC(EV_Extension)
#ifdef CONFIG_ISA_ARCV2
ENTRY(EV_SWI)
SAVE_ALL_SYS
mov %r0, %sp
j do_swi
ENDPROC(EV_SWI)
ENTRY(EV_DivZero)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_divzero
ENDPROC(EV_DivZero)
ENTRY(EV_DCError)
SAVE_ALL_SYS
mov %r0, %sp
j do_dcerror
ENDPROC(EV_DCError)
ENTRY(EV_Maligned)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_maligned
ENDPROC(EV_Maligned)
#endif

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 1989-2013 Free Software Foundation, Inc.
*/
#include "libgcc2.h"
DWtype
__ashldi3(DWtype u, shift_count_type b)
{
if (b == 0)
return u;
const DWunion uu = {.ll = u};
const shift_count_type bm = W_TYPE_SIZE - b;
DWunion w;
if (bm <= 0) {
w.s.low = 0;
w.s.high = (UWtype)uu.s.low << -bm;
} else {
const UWtype carries = (UWtype) uu.s.low >> bm;
w.s.low = (UWtype)uu.s.low << b;
w.s.high = ((UWtype)uu.s.high << b) | carries;
}
return w.ll;
}
DWtype
__ashrdi3(DWtype u, shift_count_type b)
{
if (b == 0)
return u;
const DWunion uu = {.ll = u};
const shift_count_type bm = W_TYPE_SIZE - b;
DWunion w;
if (bm <= 0) {
/* w.s.high = 1..1 or 0..0 */
w.s.high = uu.s.high >> (W_TYPE_SIZE - 1);
w.s.low = uu.s.high >> -bm;
} else {
const UWtype carries = (UWtype) uu.s.high << bm;
w.s.high = uu.s.high >> b;
w.s.low = ((UWtype)uu.s.low >> b) | carries;
}
return w.ll;
}
DWtype
__lshrdi3(DWtype u, shift_count_type b)
{
if (b == 0)
return u;
const DWunion uu = {.ll = u};
const shift_count_type bm = W_TYPE_SIZE - b;
DWunion w;
if (bm <= 0) {
w.s.high = 0;
w.s.low = (UWtype)uu.s.high >> -bm;
} else {
const UWtype carries = (UWtype)uu.s.high << bm;
w.s.high = (UWtype)uu.s.high >> b;
w.s.low = ((UWtype)uu.s.low >> b) | carries;
}
return w.ll;
}
unsigned long
udivmodsi4(unsigned long num, unsigned long den, int modwanted)
{
unsigned long bit = 1;
unsigned long res = 0;
while (den < num && bit && !(den & (1L<<31))) {
den <<= 1;
bit <<= 1;
}
while (bit) {
if (num >= den) {
num -= den;
res |= bit;
}
bit >>= 1;
den >>= 1;
}
if (modwanted)
return num;
return res;
}
long
__divsi3(long a, long b)
{
int neg = 0;
long res;
if (a < 0) {
a = -a;
neg = !neg;
}
if (b < 0) {
b = -b;
neg = !neg;
}
res = udivmodsi4(a, b, 0);
if (neg)
res = -res;
return res;
}
long
__modsi3(long a, long b)
{
int neg = 0;
long res;
if (a < 0) {
a = -a;
neg = 1;
}
if (b < 0)
b = -b;
res = udivmodsi4(a, b, 1);
if (neg)
res = -res;
return res;
}
long
__udivsi3(long a, long b)
{
return udivmodsi4(a, b, 0);
}
long
__umodsi3(long a, long b)
{
return udivmodsi4(a, b, 1);
}
UDWtype
__udivmoddi4(UDWtype n, UDWtype d, UDWtype *rp)
{
UDWtype q = 0, r = n, y = d;
UWtype lz1, lz2, i, k;
/*
* Implements align divisor shift dividend method. This algorithm
* aligns the divisor under the dividend and then perform number of
* test-subtract iterations which shift the dividend left. Number of
* iterations is k + 1 where k is the number of bit positions the
* divisor must be shifted left to align it under the dividend.
* quotient bits can be saved in the rightmost positions of the
* dividend as it shifts left on each test-subtract iteration.
*/
if (y <= r) {
lz1 = __builtin_clzll(d);
lz2 = __builtin_clzll(n);
k = lz1 - lz2;
y = (y << k);
/*
* Dividend can exceed 2 ^ (width - 1) - 1 but still be less
* than the aligned divisor. Normal iteration can drops the
* high order bit of the dividend. Therefore, first
* test-subtract iteration is a special case, saving its
* quotient bit in a separate location and not shifting
* the dividend.
*/
if (r >= y) {
r = r - y;
q = (1ULL << k);
}
if (k > 0) {
y = y >> 1;
/*
* k additional iterations where k regular test
* subtract shift dividend iterations are done.
*/
i = k;
do {
if (r >= y)
r = ((r - y) << 1) + 1;
else
r = (r << 1);
i = i - 1;
} while (i != 0);
/*
* First quotient bit is combined with the quotient
* bits resulting from the k regular iterations.
*/
q = q + r;
r = r >> k;
q = q - (r << k);
}
}
if (rp)
*rp = r;
return q;
}
UDWtype
__udivdi3(UDWtype n, UDWtype d)
{
return __udivmoddi4(n, d, (UDWtype *)0);
}

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 1989-2013 Free Software Foundation, Inc.
*/
#ifndef __ASM_LIBGCC_H
#define __ASM_LIBGCC_H
#define UNITS_PER_WORD 4 /* for ARC */
#define BITS_PER_UNIT 8 /* for ARC */
#define W_TYPE_SIZE (4 * BITS_PER_UNIT)
#define MIN_UNITS_PER_WORD UNITS_PER_WORD
/* Work out the largest "word" size that we can deal with on this target. */
#if MIN_UNITS_PER_WORD > 4
# define LIBGCC2_MAX_UNITS_PER_WORD 8
#elif (MIN_UNITS_PER_WORD > 2 \
|| (MIN_UNITS_PER_WORD > 1 && __SIZEOF_LONG_LONG__ > 4))
# define LIBGCC2_MAX_UNITS_PER_WORD 4
#else
# define LIBGCC2_MAX_UNITS_PER_WORD MIN_UNITS_PER_WORD
#endif
/* Work out what word size we are using for this compilation.
The value can be set on the command line. */
#ifndef LIBGCC2_UNITS_PER_WORD
#define LIBGCC2_UNITS_PER_WORD LIBGCC2_MAX_UNITS_PER_WORD
#endif
typedef int QItype __attribute__ ((mode (QI)));
typedef unsigned int UQItype __attribute__ ((mode (QI)));
typedef int HItype __attribute__ ((mode (HI)));
typedef unsigned int UHItype __attribute__ ((mode (HI)));
#if MIN_UNITS_PER_WORD > 1
/* These typedefs are usually forbidden on dsp's with UNITS_PER_WORD 1. */
typedef int SItype __attribute__ ((mode (SI)));
typedef unsigned int USItype __attribute__ ((mode (SI)));
#if __SIZEOF_LONG_LONG__ > 4
/* These typedefs are usually forbidden on archs with UNITS_PER_WORD 2. */
typedef int DItype __attribute__ ((mode (DI)));
typedef unsigned int UDItype __attribute__ ((mode (DI)));
#if MIN_UNITS_PER_WORD > 4
/* These typedefs are usually forbidden on archs with UNITS_PER_WORD 4. */
typedef int TItype __attribute__ ((mode (TI)));
typedef unsigned int UTItype __attribute__ ((mode (TI)));
#endif
#endif
#endif
#if LIBGCC2_UNITS_PER_WORD == 8
#define W_TYPE_SIZE (8 * BITS_PER_UNIT)
#define Wtype DItype
#define UWtype UDItype
#define HWtype DItype
#define UHWtype UDItype
#define DWtype TItype
#define UDWtype UTItype
#ifdef LIBGCC2_GNU_PREFIX
#define __NW(a,b) __gnu_ ## a ## di ## b
#define __NDW(a,b) __gnu_ ## a ## ti ## b
#else
#define __NW(a,b) __ ## a ## di ## b
#define __NDW(a,b) __ ## a ## ti ## b
#endif
#elif LIBGCC2_UNITS_PER_WORD == 4
#define W_TYPE_SIZE (4 * BITS_PER_UNIT)
#define Wtype SItype
#define UWtype USItype
#define HWtype SItype
#define UHWtype USItype
#define DWtype DItype
#define UDWtype UDItype
#ifdef LIBGCC2_GNU_PREFIX
#define __NW(a,b) __gnu_ ## a ## si ## b
#define __NDW(a,b) __gnu_ ## a ## di ## b
#else
#define __NW(a,b) __ ## a ## si ## b
#define __NDW(a,b) __ ## a ## di ## b
#endif
#elif LIBGCC2_UNITS_PER_WORD == 2
#define W_TYPE_SIZE (2 * BITS_PER_UNIT)
#define Wtype HItype
#define UWtype UHItype
#define HWtype HItype
#define UHWtype UHItype
#define DWtype SItype
#define UDWtype USItype
#ifdef LIBGCC2_GNU_PREFIX
#define __NW(a,b) __gnu_ ## a ## hi ## b
#define __NDW(a,b) __gnu_ ## a ## si ## b
#else
#define __NW(a,b) __ ## a ## hi ## b
#define __NDW(a,b) __ ## a ## si ## b
#endif
#else
#define W_TYPE_SIZE BITS_PER_UNIT
#define Wtype QItype
#define UWtype UQItype
#define HWtype QItype
#define UHWtype UQItype
#define DWtype HItype
#define UDWtype UHItype
#ifdef LIBGCC2_GNU_PREFIX
#define __NW(a,b) __gnu_ ## a ## qi ## b
#define __NDW(a,b) __gnu_ ## a ## hi ## b
#else
#define __NW(a,b) __ ## a ## qi ## b
#define __NDW(a,b) __ ## a ## hi ## b
#endif
#endif
typedef int shift_count_type __attribute__((mode (__libgcc_shift_count__)));
#if __BYTE_ORDER__ != __ORDER_LITTLE_ENDIAN__
struct DWstruct {Wtype high, low;};
#else
struct DWstruct {Wtype low, high;};
#endif
/* We need this union to unpack/pack DImode values, since we don't have
any arithmetic yet. Incoming DImode parameters are stored into the
`ll' field, and the unpacked result is read from the struct `s'. */
typedef union {
struct DWstruct s;
DWtype ll;
} DWunion;
#endif /* __ASM_LIBGCC_H */

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#include <common.h>
#include <elf.h>
#include <asm-generic/sections.h>
extern ulong __image_copy_start;
extern ulong __ivt_start;
extern ulong __ivt_end;
extern ulong __text_end;
DECLARE_GLOBAL_DATA_PTR;
int copy_uboot_to_ram(void)
{
size_t len = (size_t)&__image_copy_end - (size_t)&__image_copy_start;
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
memcpy((void *)gd->relocaddr, (void *)&__image_copy_start, len);
return 0;
}
int clear_bss(void)
{
ulong dst_addr = (ulong)&__bss_start + gd->reloc_off;
size_t len = (size_t)&__bss_end - (size_t)&__bss_start;
memset((void *)dst_addr, 0x00, len);
return 0;
}
/*
* Base functionality is taken from x86 version with added ARC-specifics
*/
int do_elf_reloc_fixups(void)
{
Elf32_Rela *re_src = (Elf32_Rela *)(&__rel_dyn_start);
Elf32_Rela *re_end = (Elf32_Rela *)(&__rel_dyn_end);
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
debug("Section .rela.dyn is located at %08x-%08x\n",
(unsigned int)re_src, (unsigned int)re_end);
Elf32_Addr *offset_ptr_rom;
Elf32_Addr *offset_ptr_ram;
do {
/* Get the location from the relocation entry */
offset_ptr_rom = (Elf32_Addr *)re_src->r_offset;
/* Check that the location of the relocation is in .text */
if (offset_ptr_rom >= (Elf32_Addr *)&__image_copy_start &&
offset_ptr_rom < (Elf32_Addr *)&__image_copy_end) {
unsigned int val, do_swap = 0;
/* Switch to the in-RAM version */
offset_ptr_ram = (Elf32_Addr *)((ulong)offset_ptr_rom +
gd->reloc_off);
#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if (((u32)offset_ptr_rom >= (u32)&__text_start &&
(u32)offset_ptr_rom <= (u32)&__text_end)
#if defined(__ARC700__) || defined(__ARC600__)
|| ((u32)offset_ptr_rom >= (u32)&__ivt_start &&
(u32)offset_ptr_rom <= (u32)&__ivt_end)
#endif
)
do_swap = 1;
#endif
debug("Patching value @ %08x (relocated to %08x)%s\n",
(unsigned int)offset_ptr_rom,
(unsigned int)offset_ptr_ram,
do_swap ? ", middle-endian encoded" : "");
/*
* Use "memcpy" because target location might be
* 16-bit aligned on ARC so we may need to read
* byte-by-byte. On attempt to read entire word by
* CPU throws an exception
*/
memcpy(&val, offset_ptr_ram, sizeof(int));
if (do_swap)
val = (val << 16) | (val >> 16);
/* Check that the target points into executable */
if (val < (unsigned int)&__image_copy_start ||
val > (unsigned int)&__image_copy_end) {
/* TODO: Use panic() instead of debug()
*
* For some reason GCC might generate
* fake relocation even for LD/SC of constant
* inderectly. See an example below:
* ----------------------->8--------------------
* static int setup_mon_len(void)
* {
* gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
* return 0;
* }
* ----------------------->8--------------------
*
* And that's what we get in the binary:
* ----------------------->8--------------------
* 10005cb4 <setup_mon_len>:
* 10005cb4: 193c 3f80 0003 2f80 st 0x32f80,[r25,60]
* 10005cb8: R_ARC_RELATIVE *ABS*-0x10000000
* 10005cbc: 7fe0 j_s.d [blink]
* 10005cbe: 700c mov_s r0,0
* ----------------------->8--------------------
*/
debug("Relocation target %08x points outside of image\n",
val);
}
val += gd->reloc_off;
if (do_swap)
val = (val << 16) | (val >> 16);
memcpy(offset_ptr_ram, &val, sizeof(int));
}
} while (++re_src < re_end);
return 0;
}

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#include <command.h>
#include <common.h>
__weak void reset_cpu(ulong addr)
{
/* Stop debug session here */
__builtin_arc_brk();
}
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
printf("Resetting the board...\n");
reset_cpu(0);
return 0;
}

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#include <asm-offsets.h>
#include <config.h>
#include <linux/linkage.h>
#include <asm/arcregs.h>
ENTRY(_start)
/* Setup interrupt vector base that matches "__text_start" */
sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
; Disable/enable I-cache according to configuration
lr r5, [ARC_BCR_IC_BUILD]
breq r5, 0, 1f ; I$ doesn't exist
lr r5, [ARC_AUX_IC_CTRL]
#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
bclr r5, r5, 0 ; 0 - Enable, 1 is Disable
#else
bset r5, r5, 0 ; I$ exists, but is not used
#endif
sr r5, [ARC_AUX_IC_CTRL]
mov r5, 1
sr r5, [ARC_AUX_IC_IVIC]
; As per ARC HS databook (see chapter 5.3.3.2)
; it is required to add 3 NOPs after each write to IC_IVIC.
nop
nop
nop
1:
; Disable/enable D-cache according to configuration
lr r5, [ARC_BCR_DC_BUILD]
breq r5, 0, 1f ; D$ doesn't exist
lr r5, [ARC_AUX_DC_CTRL]
bclr r5, r5, 6 ; Invalidate (discard w/o wback)
#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
bclr r5, r5, 0 ; Enable (+Inv)
#else
bset r5, r5, 0 ; Disable (+Inv)
#endif
sr r5, [ARC_AUX_DC_CTRL]
mov r5, 1
sr r5, [ARC_AUX_DC_IVDC]
1:
#ifdef CONFIG_ISA_ARCV2
; Disable System-Level Cache (SLC)
lr r5, [ARC_BCR_SLC]
breq r5, 0, 1f ; SLC doesn't exist
lr r5, [ARC_AUX_SLC_CTRL]
bclr r5, r5, 6 ; Invalidate (discard w/o wback)
bclr r5, r5, 0 ; Enable (+Inv)
sr r5, [ARC_AUX_SLC_CTRL]
1:
#endif
#ifdef __ARC_UNALIGNED__
/*
* Enable handling of unaligned access in the CPU as by default
* this HW feature is disabled while GCC starting from 8.1.0
* unconditionally uses it for ARC HS cores.
*/
flag 1 << STATUS_AD_BIT
#endif
/* Establish C runtime stack and frame */
mov %sp, CONFIG_SYS_INIT_SP_ADDR
mov %fp, %sp
/* Allocate reserved area from current top of stack */
mov %r0, %sp
bl board_init_f_alloc_reserve
/* Set stack below reserved area, adjust frame pointer accordingly */
mov %sp, %r0
mov %fp, %sp
/* Initialize reserved area - note: r0 already contains address */
bl board_init_f_init_reserve
#ifdef CONFIG_DEBUG_UART
/* Earliest point to set up early debug uart */
bl debug_uart_init
#endif
/* Zero the one and only argument of "board_init_f" */
mov_s %r0, 0
bl board_init_f
/* We only get here if relocation is disabled by GD_FLG_SKIP_RELOC */
/* Make sure we don't lose GD overwritten by zero new GD */
mov %r0, %r25
mov %r1, 0
bl board_init_r
ENDPROC(_start)
/*
* void board_init_f_r_trampoline(stack-pointer address)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
* r0 = new stack-pointer
*/
ENTRY(board_init_f_r_trampoline)
/* Set up the stack- and frame-pointers */
mov %sp, %r0
mov %fp, %sp
/* Update position of intterupt vector table */
lr %r0, [ARC_AUX_INTR_VEC_BASE]
ld %r1, [%r25, GD_RELOC_OFF]
add %r0, %r0, %r1
sr %r0, [ARC_AUX_INTR_VEC_BASE]
/* Re-enter U-Boot by calling board_init_f_r */
j board_init_f_r
ENDPROC(board_init_f_r_trampoline)

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menu "ARM debug"
config DEBUG_LL
bool "Low-level debugging functions"
depends on !ARM64
help
Say Y here to include definitions of printascii, printch, printhex
in U-Boot. This is helpful if you are debugging code that
executes before the console is initialized.
choice
prompt "Low-level debugging port"
depends on DEBUG_LL
config DEBUG_LL_UART_8250
bool "Low-level debugging via 8250 UART"
help
Say Y here if you wish the debug print routes to direct
their output to an 8250 UART. You can use this option
to provide the parameters for the 8250 UART rather than
selecting one of the platform specific options above if
you know the parameters for the port.
This option is preferred over the platform specific
options; the platform specific options are deprecated
and will be soon removed.
endchoice
config DEBUG_LL_INCLUDE
string
depends on DEBUG_LL
default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
default "mach/debug-macro.S"
# Compatibility options for 8250
config DEBUG_UART_8250
bool
config DEBUG_UART_PHYS
hex "Physical base address of debug UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
# This is not used in U-Boot
config DEBUG_UART_VIRT
hex
default DEBUG_UART_PHYS
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
config DEBUG_UART_8250_SHIFT
int "Register offset shift for the 8250 debug UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
default 2
config DEBUG_UART_8250_WORD
bool "Use 32-bit accesses for 8250 UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
depends on DEBUG_UART_8250_SHIFT >= 2
config DEBUG_UART_8250_FLOW_CONTROL
bool "Enable flow control for 8250 UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
endmenu

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# SPDX-License-Identifier: GPL-2.0+
ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TEGRA),yy)
CONFIG_CPU_V7A=
CONFIG_CPU_ARM720T=y
endif
# This selects which instruction set is used.
arch-$(CONFIG_CPU_ARM720T) =-march=armv4
arch-$(CONFIG_CPU_ARM920T) =-march=armv4t
arch-$(CONFIG_CPU_ARM926EJS) =-march=armv5te
arch-$(CONFIG_CPU_ARM946ES) =-march=armv5te
arch-$(CONFIG_CPU_SA1100) =-march=armv4
arch-$(CONFIG_CPU_PXA) =
arch-$(CONFIG_CPU_ARM1136) =-march=armv5t
arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \
$(call cc-option, -march=armv7))
arch-$(CONFIG_CPU_V7M) =-march=armv7-m
arch-$(CONFIG_CPU_V7R) =-march=armv7-r
ifneq ($(CONFIG_REALTEK_10G_PON),y)
arch-$(CONFIG_ARM64) =-march=armv8-a
endif
# On Tegra systems we must build SPL for the armv4 core on the device
# but otherwise we can use the value in CONFIG_SYS_ARM_ARCH
ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TEGRA),yy)
arch-y += -D__LINUX_ARM_ARCH__=4
else
arch-y += -D__LINUX_ARM_ARCH__=$(CONFIG_SYS_ARM_ARCH)
endif
# Evaluate arch cc-option calls now
arch-y := $(arch-y)
# This selects how we optimise for the processor.
tune-$(CONFIG_CPU_ARM720T) =-mtune=arm7tdmi
tune-$(CONFIG_CPU_ARM920T) =
tune-$(CONFIG_CPU_ARM926EJS) =
tune-$(CONFIG_CPU_ARM946ES) =
tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100
tune-$(CONFIG_CPU_PXA) =-mcpu=xscale
tune-$(CONFIG_CPU_ARM1136) =
tune-$(CONFIG_CPU_ARM1176) =
tune-$(CONFIG_CPU_V7A) =-mtune=generic-armv7-a
tune-$(CONFIG_CPU_V7R) =
tune-$(CONFIG_ARM64) =
# Evaluate tune cc-option calls now
tune-y := $(tune-y)
PLATFORM_CPPFLAGS += $(arch-y) $(tune-y)
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
machine-$(CONFIG_ARCH_ASPEED) += aspeed
machine-$(CONFIG_ARCH_AT91) += at91
machine-$(CONFIG_ARCH_BCM283X) += bcm283x
machine-$(CONFIG_ARCH_BCMSTB) += bcmstb
machine-$(CONFIG_ARCH_DAVINCI) += davinci
machine-$(CONFIG_ARCH_EXYNOS) += exynos
machine-$(CONFIG_ARCH_HIGHBANK) += highbank
machine-$(CONFIG_ARCH_K3) += k3
machine-$(CONFIG_ARCH_KEYSTONE) += keystone
# TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
machine-$(CONFIG_KIRKWOOD) += kirkwood
machine-$(CONFIG_ARCH_MEDIATEK) += mediatek
machine-$(CONFIG_ARCH_MESON) += meson
machine-$(CONFIG_ARCH_MVEBU) += mvebu
# TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
# TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
machine-$(CONFIG_ORION5X) += orion5x
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_OWL) += owl
machine-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx
machine-$(CONFIG_ARCH_SUNXI) += sunxi
machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon
machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
machine-$(CONFIG_ARCH_RMOBILE) += rmobile
machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip
machine-$(CONFIG_STM32) += stm32
machine-$(CONFIG_ARCH_STM32MP) += stm32mp
machine-$(CONFIG_TEGRA) += tegra
machine-$(CONFIG_ARCH_UNIPHIER) += uniphier
machine-$(CONFIG_ARCH_ZYNQ) += zynq
machine-$(CONFIG_ARCH_ZYNQMP) += zynqmp
machine-$(CONFIG_ARCH_VERSAL) += versal
machine-$(CONFIG_ARCH_ZYNQMP_R5) += zynqmp-r5
machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
PLATFORM_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs))
libs-y += $(machdirs)
head-y := arch/arm/cpu/$(CPU)/start.o
ifeq ($(CONFIG_SPL_BUILD),y)
ifneq ($(CONFIG_SPL_START_S_PATH),)
head-y := $(CONFIG_SPL_START_S_PATH:"%"=%)/start.o
endif
endif
libs-y += arch/arm/cpu/$(CPU)/
libs-y += arch/arm/cpu/
libs-y += arch/arm/lib/
ifeq ($(CONFIG_SPL_BUILD),y)
ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5 mx6 mx7 mx35 imx8m imx8))
libs-y += arch/arm/mach-imx/
endif
else
ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx7ulp mx31 mx35 mxs imx8m imx8 vf610))
libs-y += arch/arm/mach-imx/
endif
endif
ifneq (,$(filter $(SOC), kirkwood))
libs-y += arch/arm/mach-mvebu/
endif
# deprecated
-include $(machdirs)/config.mk

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# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
ifndef CONFIG_STANDALONE_LOAD_ADDR
ifneq ($(CONFIG_ARCH_OMAP2PLUS),)
CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
else
CONFIG_STANDALONE_LOAD_ADDR = 0xc100000
endif
endif
CFLAGS_NON_EFI := -fno-pic -ffixed-r9 -ffunction-sections -fdata-sections
CFLAGS_EFI := -fpic -fshort-wchar
LDFLAGS_FINAL += --gc-sections
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \
-fno-common -ffixed-r9
PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \
$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
# LLVM support
LLVM_RELFLAGS := $(call cc-option,-mllvm,) \
$(call cc-option,-mno-movt,)
PLATFORM_RELFLAGS += $(LLVM_RELFLAGS)
PLATFORM_CPPFLAGS += -D__ARM__
ifdef CONFIG_ARM64
PLATFORM_ELFFLAGS += -B aarch64 -O elf64-littleaarch64
else
PLATFORM_ELFFLAGS += -B arm -O elf32-littlearm
endif
# Choose between ARM/Thumb instruction sets
ifeq ($(CONFIG_$(SPL_)SYS_THUMB_BUILD),y)
AFLAGS_IMPLICIT_IT := $(call as-option,-Wa$(comma)-mimplicit-it=always)
PF_CPPFLAGS_ARM := $(AFLAGS_IMPLICIT_IT) \
$(call cc-option, -mthumb -mthumb-interwork,\
$(call cc-option,-marm,)\
$(call cc-option,-mno-thumb-interwork,)\
)
else
PF_CPPFLAGS_ARM := $(call cc-option,-marm,) \
$(call cc-option,-mno-thumb-interwork,)
endif
# Only test once
ifeq ($(CONFIG_$(SPL_)SYS_THUMB_BUILD),y)
archprepare: checkthumb checkgcc6
checkthumb:
@if test "$(call cc-name)" = "gcc" -a \
"$(call cc-version)" -lt "0404"; then \
echo -n '*** Your GCC does not produce working '; \
echo 'binaries in THUMB mode.'; \
echo '*** Your board is configured for THUMB mode.'; \
false; \
fi
else
archprepare: checkgcc6
endif
checkgcc6:
@if test "$(call cc-name)" = "gcc" -a \
"$(call cc-version)" -lt "0500"; then \
echo '*** Your GCC is older than 5.0 and is not supported'; \
false; \
fi
# @if test "$(call cc-name)" = "gcc" -a \
"$(call cc-version)" -lt "0600"; then \
echo '*** Your GCC is older than 6.0 and is not supported'; \
false; \
fi
# Try if EABI is supported, else fall back to old API,
# i. e. for example:
# - with ELDK 4.2 (EABI supported), use:
# -mabi=aapcs-linux
# - with ELDK 4.1 (gcc 4.x, no EABI), use:
# -mabi=apcs-gnu
# - with ELDK 3.1 (gcc 3.x), use:
# -mapcs-32
PF_CPPFLAGS_ABI := $(call cc-option,\
-mabi=aapcs-linux,\
$(call cc-option,\
-mapcs-32,\
$(call cc-option,\
-mabi=apcs-gnu,\
)\
)\
)
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARM) $(PF_CPPFLAGS_ABI)
# For EABI, make sure to provide raise()
ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS)))
# This file is parsed many times, so the string may get added multiple
# times. Also, the prefix needs to be different based on whether
# CONFIG_SPL_BUILD is defined or not. 'filter-out' the existing entry
# before adding the correct one.
PLATFORM_LIBS := arch/arm/lib/eabi_compat.o \
$(filter-out arch/arm/lib/eabi_compat.o, $(PLATFORM_LIBS))
endif
# needed for relocation
LDFLAGS_u-boot += -pie
#
# FIXME: binutils versions < 2.22 have a bug in the assembler where
# branches to weak symbols can be incorrectly optimized in thumb mode
# to a short branch (b.n instruction) that won't reach when the symbol
# gets preempted
#
# http://sourceware.org/bugzilla/show_bug.cgi?id=12532
#
ifeq ($(CONFIG_$(SPL_)SYS_THUMB_BUILD),y)
ifeq ($(GAS_BUG_12532),)
export GAS_BUG_12532:=$(shell if [ $(call binutils-version) -lt 0222 ] ; \
then echo y; else echo n; fi)
endif
ifeq ($(GAS_BUG_12532),y)
PLATFORM_RELFLAGS += -fno-optimize-sibling-calls
endif
endif
ifneq ($(CONFIG_SPL_BUILD),y)
# Check that only R_ARM_RELATIVE relocations are generated.
ALL-y += checkarmreloc
# The movt / movw can hardcode 16 bit parts of the addresses in the
# instruction. Relocation is not supported for that case, so disable
# such usage by requiring word relocations.
PLATFORM_CPPFLAGS += $(call cc-option, -mword-relocations)
PLATFORM_CPPFLAGS += $(call cc-option, -fno-pic)
endif
# limit ourselves to the sections we want in the .bin.
ifdef CONFIG_ARM64
OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .data \
-j .u_boot_list -j .rela.dyn -j .got -j .got.plt \
-j .binman_sym_table -j .text_rest
else
OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data -j .rodata -j .hash \
-j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn \
-j .binman_sym_table -j .text_rest
endif
# if a dtb section exists we always have to include it
# there are only two cases where it is generated
# 1) OF_EMBEDED is turned on
# 2) unit tests include device tree blobs
OBJCOPYFLAGS += -j .dtb.init.rodata
ifdef CONFIG_EFI_LOADER
OBJCOPYFLAGS += -j .efi_runtime -j .efi_runtime_rel
endif
ifneq ($(CONFIG_IMX_CONFIG),)
ifdef CONFIG_SPL
ifndef CONFIG_SPL_BUILD
ALL-y += SPL
endif
else
ifeq ($(CONFIG_OF_SEPARATE),y)
ALL-y += u-boot-dtb.imx
else
ALL-y += u-boot.imx
endif
endif
ifneq ($(CONFIG_VF610),)
ALL-y += u-boot.vyb
endif
endif
EFI_LDS := elf_arm_efi.lds
EFI_CRT0 := crt0_arm_efi.o
EFI_RELOC := reloc_arm_efi.o

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# SPDX-License-Identifier: GPL-2.0+
obj- += dummy.o

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# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
obj-y = cpu.o
ifneq ($(CONFIG_SPL_BUILD),y)
obj-$(CONFIG_EFI_LOADER) += sctlr.o
endif

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// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2004 Texas Insturments
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*/
/*
* CPU specific code
*/
#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <irq_func.h>
#include <asm/system.h>
static void cache_flush(void);
int cleanup_before_linux (void)
{
/*
* this function is called just before we call linux
* it prepares the processor for linux
*
* we turn off caches etc ...
*/
disable_interrupts();
/* turn off I/D-cache */
icache_disable();
dcache_disable();
/* flush I/D-cache */
cache_flush();
return 0;
}
static void cache_flush(void)
{
unsigned long i = 0;
/* clean entire data cache */
asm volatile("mcr p15, 0, %0, c7, c10, 0" : : "r" (i));
/* invalidate both caches and flush btb */
asm volatile("mcr p15, 0, %0, c7, c7, 0" : : "r" (i));
/* mem barrier to sync things */
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (i));
}
#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
void invalidate_dcache_all(void)
{
asm volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
}
void flush_dcache_all(void)
{
asm volatile("mcr p15, 0, %0, c7, c10, 0" : : "r" (0));
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
}
void invalidate_dcache_range(unsigned long start, unsigned long stop)
{
if (!check_cache_range(start, stop))
return;
while (start < stop) {
asm volatile("mcr p15, 0, %0, c7, c6, 1" : : "r" (start));
start += CONFIG_SYS_CACHELINE_SIZE;
}
}
void flush_dcache_range(unsigned long start, unsigned long stop)
{
if (!check_cache_range(start, stop))
return;
while (start < stop) {
asm volatile("mcr p15, 0, %0, c7, c14, 1" : : "r" (start));
start += CONFIG_SYS_CACHELINE_SIZE;
}
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
}
#else /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */
void invalidate_dcache_all(void)
{
}
void flush_dcache_all(void)
{
}
#endif /* #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */
#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
void enable_caches(void)
{
#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
icache_enable();
#endif
#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
dcache_enable();
#endif
}
#endif

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Routines to access the system control register
*
* Copyright (c) 2019 Heinrich Schuchardt
*/
#include <linux/linkage.h>
/*
* void allow_unaligned(void) - allow unaligned access
*
* This routine sets the enable unaligned data support flag and clears the
* aligned flag in the system control register.
* After calling this routine unaligned access does no longer leads to a
* data abort or undefined behavior but is handled by the CPU.
* For details see the "ARM Architecture Reference Manual" for ARMv6.
*/
ENTRY(allow_unaligned)
mrc p15, 0, r0, c1, c0, 0 @ load system control register
orr r0, r0, #1 << 22 @ set unaligned data support flag
bic r0, r0, #2 @ clear aligned flag
mcr p15, 0, r0, c1, c0, 0 @ write system control register
bx lr @ return
ENDPROC(allow_unaligned)

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# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
extra-y = start.o
obj-y += ../arm11/
obj-$(CONFIG_MX31) += mx31/
obj-$(CONFIG_MX35) += mx35/

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# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
obj-y += generic.o
obj-y += timer.o
obj-y += devices.o
obj-y += relocate.o

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// SPDX-License-Identifier: GPL-2.0+
/*
*
* (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
*
* (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
*/
#include <common.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
void mx31_uart1_hw_init(void)
{
/* setup pins for UART1 */
mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX);
mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX);
mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
mx31_gpio_mux(MUX_CTS1__UART1_CTS_B);
}
void mx31_uart2_hw_init(void)
{
/* setup pins for UART2 */
mx31_gpio_mux(MUX_RXD2__UART2_RXD_MUX);
mx31_gpio_mux(MUX_TXD2__UART2_TXD_MUX);
mx31_gpio_mux(MUX_RTS2__UART2_RTS_B);
mx31_gpio_mux(MUX_CTS2__UART2_CTS_B);
}
#ifdef CONFIG_MXC_SPI
/*
* Note: putting several spi setups here makes no sense as they may differ
* at board level (physical pin SS0 of CSPI2 may aswell be used as SS0 of CSPI3)
*/
void mx31_spi2_hw_init(void)
{
/* SPI2 */
mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B);
mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK);
mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B);
mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI);
mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO);
mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B);
mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B);
/* start SPI2 clock */
__REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
}
#endif

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// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*/
#include <common.h>
#include <div64.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
static u32 mx31_decode_pll(u32 reg, u32 infreq)
{
u32 mfi = GET_PLL_MFI(reg);
s32 mfn = GET_PLL_MFN(reg);
u32 mfd = GET_PLL_MFD(reg);
u32 pd = GET_PLL_PD(reg);
mfi = mfi <= 5 ? 5 : mfi;
mfn = mfn >= 512 ? mfn - 1024 : mfn;
mfd += 1;
pd += 1;
return lldiv(2 * (u64)infreq * (mfi * mfd + mfn),
mfd * pd);
}
static u32 mx31_get_mpl_dpdgck_clk(void)
{
u32 infreq;
if ((readl(CCM_CCMR) & CCMR_PRCS_MASK) == CCMR_FPM)
infreq = MXC_CLK32 * 1024;
else
infreq = MXC_HCLK;
return mx31_decode_pll(readl(CCM_MPCTL), infreq);
}
static u32 mx31_get_mcu_main_clk(void)
{
/* For now we assume mpl_dpdgck_clk == mcu_main_clk
* which should be correct for most boards
*/
return mx31_get_mpl_dpdgck_clk();
}
static u32 mx31_get_ipg_clk(void)
{
u32 freq = mx31_get_mcu_main_clk();
u32 pdr0 = readl(CCM_PDR0);
freq /= GET_PDR0_MAX_PODF(pdr0) + 1;
freq /= GET_PDR0_IPG_PODF(pdr0) + 1;
return freq;
}
/* hsp is the clock for the ipu */
static u32 mx31_get_hsp_clk(void)
{
u32 freq = mx31_get_mcu_main_clk();
u32 pdr0 = readl(CCM_PDR0);
freq /= GET_PDR0_HSP_PODF(pdr0) + 1;
return freq;
}
void mx31_dump_clocks(void)
{
u32 cpufreq = mx31_get_mcu_main_clk();
printf("mx31 cpu clock: %dMHz\n", cpufreq / 1000000);
printf("ipg clock : %dHz\n", mx31_get_ipg_clk());
printf("hsp clock : %dHz\n", mx31_get_hsp_clk());
}
unsigned int mxc_get_clock(enum mxc_clock clk)
{
switch (clk) {
case MXC_ARM_CLK:
return mx31_get_mcu_main_clk();
case MXC_IPG_CLK:
case MXC_IPG_PERCLK:
case MXC_CSPI_CLK:
case MXC_UART_CLK:
case MXC_ESDHC_CLK:
case MXC_I2C_CLK:
return mx31_get_ipg_clk();
case MXC_IPU_CLK:
return mx31_get_hsp_clk();
}
return -1;
}
u32 imx_get_uartclk(void)
{
return mxc_get_clock(MXC_UART_CLK);
}
void mx31_gpio_mux(unsigned long mode)
{
unsigned long reg, shift, tmp;
reg = IOMUXC_BASE + (mode & 0x1fc);
shift = (~mode & 0x3) * 8;
tmp = readl(reg);
tmp &= ~(0xff << shift);
tmp |= ((mode >> IOMUX_MODE_POS) & 0xff) << shift;
writel(tmp, reg);
}
void mx31_set_pad(enum iomux_pins pin, u32 config)
{
u32 field, l, reg;
pin &= IOMUX_PADNUM_MASK;
reg = (IOMUXC_BASE + 0x154) + (pin + 2) / 3 * 4;
field = (pin + 2) % 3;
l = readl(reg);
l &= ~(0x1ff << (field * 10));
l |= config << (field * 10);
writel(l, reg);
}
void mx31_set_gpr(enum iomux_gp_func gp, char en)
{
u32 l;
struct iomuxc_regs *iomuxc = (struct iomuxc_regs *)IOMUXC_BASE;
l = readl(&iomuxc->gpr);
if (en)
l |= gp;
else
l &= ~gp;
writel(l, &iomuxc->gpr);
}
void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
{
struct mx31_weim *weim = (struct mx31_weim *) WEIM_BASE;
struct mx31_weim_cscr *cscr = &weim->cscr[cs];
writel(weimcs->upper, &cscr->upper);
writel(weimcs->lower, &cscr->lower);
writel(weimcs->additional, &cscr->additional);
}
struct mx3_cpu_type mx31_cpu_type[] = {
{ .srev = 0x00, .v = 0x10 },
{ .srev = 0x10, .v = 0x11 },
{ .srev = 0x11, .v = 0x11 },
{ .srev = 0x12, .v = 0x1F },
{ .srev = 0x13, .v = 0x1F },
{ .srev = 0x14, .v = 0x12 },
{ .srev = 0x15, .v = 0x12 },
{ .srev = 0x28, .v = 0x20 },
{ .srev = 0x29, .v = 0x20 },
};
u32 get_cpu_rev(void)
{
u32 i, srev;
/* read SREV register from IIM module */
struct iim_regs *iim = (struct iim_regs *)MX31_IIM_BASE_ADDR;
srev = readl(&iim->iim_srev);
for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
if (srev == mx31_cpu_type[i].srev)
return mx31_cpu_type[i].v | (MXC_CPU_MX31 << 12);
return srev | 0x8000;
}
static char *get_reset_cause(void)
{
/* read RCSR register from CCM module */
struct clock_control_regs *ccm =
(struct clock_control_regs *)CCM_BASE;
u32 cause = readl(&ccm->rcsr) & 0x07;
switch (cause) {
case 0x0000:
return "POR";
case 0x0001:
return "RST";
case 0x0002:
return "WDOG";
case 0x0006:
return "JTAG";
case 0x0007:
return "ARM11P power gating";
default:
return "unknown reset";
}
}
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
u32 srev = get_cpu_rev();
printf("CPU: Freescale i.MX31 rev %d.%d%s at %d MHz.\n",
(srev & 0xF0) >> 4, (srev & 0x0F),
((srev & 0x8000) ? " unknown" : ""),
mx31_get_mcu_main_clk() / 1000000);
printf("Reset cause: %s\n", get_reset_cause());
return 0;
}
#endif

22
sources/uboot-gp3000/arch/arm/cpu/arm1136/mx31/relocate.S Normal file
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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* relocate - i.MX31-specific vector relocation
*
* Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net>
*/
#include <linux/linkage.h>
/*
* The i.MX31 SoC is very specific with respect to exceptions: it
* does not provide RAM at the high vectors address (0xFFFF0000),
* thus only the low address (0x00000000) is useable; but that is
* in ROM, so let's avoid relocating the vectors.
*/
.section .text.relocate_vectors,"ax",%progbits
ENTRY(relocate_vectors)
bx lr
ENDPROC(relocate_vectors)

44
sources/uboot-gp3000/arch/arm/cpu/arm1136/mx31/timer.c Normal file
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// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2007
* Sascha Hauer, Pengutronix
*/
#include <common.h>
#include <asm/arch/imx-regs.h>
#include <asm/io.h>
#define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
/* General purpose timers registers */
#define GPTCR __REG(TIMER_BASE) /* Control register */
#define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */
#define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */
#define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */
/* General purpose timers bitfields */
#define GPTCR_SWR (1 << 15) /* Software reset */
#define GPTCR_FRR (1 << 9) /* Freerun / restart */
#define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */
#define GPTCR_TEN 1 /* Timer enable */
/* The 32768Hz 32-bit timer overruns in 131072 seconds */
int timer_init(void)
{
int i;
/* setup GP Timer 1 */
GPTCR = GPTCR_SWR;
for (i = 0; i < 100; i++)
GPTCR = 0; /* We have no udelay by now */
GPTPR = 0; /* 32Khz */
/* Freerun Mode, PERCLK1 input */
GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
return 0;
}
unsigned long timer_read_counter(void)
{
return GPTCNT;
}

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