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Update RTL8218B.md

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@ -25,6 +25,17 @@ Page | Register | Bits | MAC SerDes 0 - page 0 | Description
0x404 | 0x14 | 02:02 | CFG_EN_LINK_FIB1G |
0x404 | 0x14 | 01:01 | CFG_EN_LINK_SGM |
0x404 | 0x14 | 00:00 | CFG_SGM_CK_SEL |
**Page** | **Register** | **Bits** | **MAC SerDes 0 - page 7** | **Description**
0x404 | 0x17 | 15:15 | CFG_8B10B_NO_CREXT |
0x404 | 0x17 | 14:14 | CFG_NEG_CLKWR_A2D |
0x404 | 0x17 | 13:13 | CFG_MIIXF_TS1K |
0x404 | 0x17 | 12:12 | CFG_DLY_PRE8 |
0x404 | 0x17 | 11:11 | CFG_GRXD_SEL |
0x404 | 0x17 | 10:10 | CFG_LPI_CMD_MII |
0x404 | 0x17 | 09:09 | CFG_MARK_RXSCR_ERR |
0x404 | 0x17 | 08:08 | CFG_MARK_TXSCR_ERR |
0x404 | 0x17 | 07:04 | BYP_START |
0x404 | 0x17 | 03:00 | BYP_END |
**Page** | **Register** | **Bits** | **MAC SerDes 1 - page 0** | **Description**
0x424 | 0x10 | 15:15 | DIS_RENWAY |
0x424 | 0x10 | 14:14 | BYP_8B10B |
@ -49,4 +60,14 @@ Page | Register | Bits | MAC SerDes 0 - page 0 | Description
0x424 | 0x14 | 02:02 | CFG_EN_LINK_FIB1G |
0x424 | 0x14 | 01:01 | CFG_EN_LINK_SGM |
0x424 | 0x14 | 00:00 | CFG_SGM_CK_SEL |
**Page** | **Register** | **Bits** | **MAC SerDes 0 - page 7** | **Description**
0x424 | 0x17 | 15:15 | CFG_8B10B_NO_CREXT |
0x424 | 0x17 | 14:14 | CFG_NEG_CLKWR_A2D |
0x424 | 0x17 | 13:13 | CFG_MIIXF_TS1K |
0x424 | 0x17 | 12:12 | CFG_DLY_PRE8 |
0x424 | 0x17 | 11:11 | CFG_GRXD_SEL |
0x424 | 0x17 | 10:10 | CFG_LPI_CMD_MII |
0x424 | 0x17 | 09:09 | CFG_MARK_RXSCR_ERR |
0x424 | 0x17 | 08:08 | CFG_MARK_TXSCR_ERR |
0x424 | 0x17 | 07:04 | BYP_START |
0x424 | 0x17 | 03:00 | BYP_END |