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@ -26,10 +26,10 @@ Page | Register | Bits | Feature | Documentation
**Page** | **Register** | **Bits** | **unknown** | **Page** | **Register** | **Bits** | **unknown** |
0xa43 | 0x1B | 15:00 | PATCH_ADDRESS | patch step 3, 5, 7, .. write address to be patched 0xa43 | 0x1B | 15:00 | PATCH_ADDRESS | patch step 3, 5, 7, .. write address to be patched
0xa43 | 0x1C | 15:00 | PATCH_VALUE | patch step 4, 6, 8, ... write value to be patched at address 0xa43 | 0x1C | 15:00 | PATCH_VALUE | patch step 4, 6, 8, ... write value to be patched at address
**Page** | **Register** | **Bits** | **unknown** | **Page** | **Register** | **Bits** | **PHYCR3** | **PHY specific control register 3**
0xa44 | 0x11 | 09:09 | RETRY_DOWN_SPEED_500 0xa44 | 0x11 | 09:09 | RETRY_DOWN_SPEED_500
0xa44 | 0x11 | 05:05 | UTP_DOWN_SPEED | 0 = 100MBit 0xa44 | 0x11 | 05:05 | THR_RETRY_SPDN | 0 = 7 times, 1 = 3 times
0xa44 | 0x11 | 03:03 | UTP_DOWN_SPEED_ENABLE 0xa44 | 0x11 | 03:03 | EN_RETRY_SPEED_DOW
0xa44 | 0x11 | 02:02 | 2PAIR_AUTO_DOWNSPEED 0xa44 | 0x11 | 02:02 | 2PAIR_AUTO_DOWNSPEED
**Page** | **Register** | **Bits** | **unknown** | **Page** | **Register** | **Bits** | **unknown** |
0xb80 | 0x10 | 04:04 | PATCH_READY | patch step 2: wait for 1 to start patching, go over to 0xa43:0x1b 0xb80 | 0x10 | 04:04 | PATCH_READY | patch step 2: wait for 1 to start patching, go over to 0xa43:0x1b