mirror of
https://github.com/plappermaul/realtek-doc.git
synced 2025-12-09 23:34:40 +01:00
Update RTL8218B.md
This commit is contained in:
parent
4bd01c7482
commit
54589ff0af
1 changed files with 9 additions and 0 deletions
|
|
@ -190,6 +190,15 @@ Page | Register | Bits | Feature | Documentation
|
||||||
0x44e | 0x11 | 15:00 | | Some unknown register for fiber jitter on RTL8214FC
|
0x44e | 0x11 | 15:00 | | Some unknown register for fiber jitter on RTL8214FC
|
||||||
**Page** | **Register** | **Bits** | **Unknown filter register** | **Absolute 0x2310**
|
**Page** | **Register** | **Bits** | **Unknown filter register** | **Absolute 0x2310**
|
||||||
0x462 | 0x10 | 13:12 | OFFSET_CALIBRATION
|
0x462 | 0x10 | 13:12 | OFFSET_CALIBRATION
|
||||||
|
**Page** | **Register** | **Bits** | **Unknown analog** | **Absolute 0x2315**
|
||||||
|
0x462 | 0x15 | 15:15 | ISTANK_SEL_HS_TG_1
|
||||||
|
0x462 | 0x15 | 14:14 | ISTANK_SEL_HS_TG_0
|
||||||
|
0x462 | 0x15 | 13:12 | CMU_SEL_CP_TG
|
||||||
|
0x462 | 0x15 | 11:10 | CMU_SELPREDIV_TG
|
||||||
|
0x462 | 0x15 | 09:08 | CMU_LOOP_DIV4_TG
|
||||||
|
0x462 | 0x15 | 07:04 | CMU_ICP_SEL_TG
|
||||||
|
0x462 | 0x15 | 03:03 | CMU_SEL_R_TG_3
|
||||||
|
0x462 | 0x15 | 02:00 | CMU_SEL_R_TG_2_0
|
||||||
**Page** | **Register** | **Bits** | **Analog register** | **Absolute 0x2322**
|
**Page** | **Register** | **Bits** | **Analog register** | **Absolute 0x2322**
|
||||||
0x464 | 0x12 | 15:11 | FILTER_OUT0
|
0x464 | 0x12 | 15:11 | FILTER_OUT0
|
||||||
0x464 | 0x12 | 10:07 | EQ_SELREG
|
0x464 | 0x12 | 10:07 | EQ_SELREG
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue