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@ -9,7 +9,7 @@ Page | Register | Bits | Feature | Documentation
**Page** | **Register** | **Bits** | **unknown** |
0xa42 | 0x14 | 07:07 | 500M_EEE_ABILITY
These additional/internal registers are organized in pages of 8. Each page knows registers 0x10-0x17
These additional/internal registers are organized in pages of 8. Each page knows registers 0x10-0x17. Their "absoulte" address can be calucalted by the formula page * 8 + (register - 16)
Page | Register | Bits | Feature | Documentation
--- | --- | --- | --- | ---
@ -75,6 +75,8 @@ Page | Register | Bits | Feature | Documentation
0x404 | 0x17 | 08:08 | CFG_MARK_TXSCR_ERR |
0x404 | 0x17 | 07:04 | BYP_START |
0x404 | 0x17 | 03:00 | BYP_END |
**Page** | **Register** | **Bits** | **MAC SerDes 0 - page unknown** | **Absolute 0x2120**
0x40c | 0x11 | 15:00 | | This is some unknown PLL register - write 0x4000 to diable ring PLL
**Page** | **Register** | **Bits** | **MAC SerDes 1 - page 0** | **Absolute 0x2120**
0x424 | 0x10 | 15:15 | DIS_RENWAY |
0x424 | 0x10 | 14:14 | BYP_8B10B |
@ -120,8 +122,14 @@ Page | Register | Bits | Feature | Documentation
0x424 | 0x17 | 08:08 | CFG_MARK_TXSCR_ERR |
0x424 | 0x17 | 07:04 | BYP_START |
0x424 | 0x17 | 03:00 | BYP_END |
**Page** | **Register** | **Bits** | **MAC SerDes 1 - page unknown** | **Absolute 0x2161**
0x42c | 0x11 | 15:00 | | This is some unknown PLL register - write 0x4000 to diable ring PLL
**Page** | **Register** | **Bits** | **MAC SerDes 1 - page unknown** | **Absolute 0x2162**
0x42c | 0x12 | 15:00 |
**Page** | **Register** | **Bits** | **MAC SerDes 1 - page unknown** | **Absolute 0x2169**
0x42d | 0x11 | 00:00 | ANA_RESET
**Page** | **Register** | **Bits** | **MAC SerDes 1 - page unknown** | **Absolute 0x2171**
0x42e | 0x11 | 15:00 |
**Page** | **Register** | **Bits** | **Unknown filter register** | **Absolute 0x2322**
0x464 | 0x12 | 15:11 | FILTER_0
0x464 | 0x12 | 10:07 | FORCE