From 4009e2cff83deaea42abdf35bb5c0e682856dd78 Mon Sep 17 00:00:00 2001 From: plappermaul Date: Thu, 26 Jun 2025 17:19:15 +0200 Subject: [PATCH] Update RTL8218B.md --- RTL8218B.md | 86 ++++++++++++++++++++++++++++++----------------------- 1 file changed, 49 insertions(+), 37 deletions(-) diff --git a/RTL8218B.md b/RTL8218B.md index 0a4e3c74..4443d85b 100644 --- a/RTL8218B.md +++ b/RTL8218B.md @@ -1,40 +1,52 @@ RTL8218B Register Layout -``` -SerDes 0 (to Mac) -0x404 0x10 16:16 RESERVED -0x404 0x10 15:15 DIS_RENWAY -0x404 0x10 14:14 BYP_8B10B -0x404 0x10 13:12 CDET -0x404 0x10 11:11 DIS_TMR_CMA -0x404 0x10 10:10 DIS_APX -0x404 0x10 09:09 INV_HSI -0x404 0x10 08:08 INV_HSO -0x404 0x10 07:06 SDS_SDET_DEG -0x404 0x10 05:05 CODEC_LPK -0x404 0x10 04:04 AFE_LPK -0x404 0x10 03:03 REMOTE_LPK -0x404 0x10 02:02 SDS_TX_DOWN -0x404 0x10 01:01 SDS_EN_RX -0x404 0x10 00:00 SDS_EN_TX -SerDes 1 (to Mac) -0x424 0x10 16:16 RESERVED -0x424 0x10 15:15 DIS_RENWAY -0x424 0x10 14:14 BYP_8B10B -0x424 0x10 13:12 CDET -0x424 0x10 11:11 DIS_TMR_CMA -0x424 0x10 10:10 DIS_APX -0x424 0x10 09:09 INV_HSI -0x424 0x10 08:08 INV_HSO -0x424 0x10 07:06 SDS_SDET_DEG -0x424 0x10 05:05 CODEC_LPK -0x424 0x10 04:04 AFE_LPK -0x424 0x10 03:03 REMOTE_LPK -0x424 0x10 02:02 SDS_TX_DOWN -0x424 0x10 01:01 SDS_EN_RX -0x424 0x10 00:00 SDS_EN_TX -``` +Page | Register | Bits | MAC SerDes 0 - page 0 | Description +--- | --- | --- | --- | --- +0x404 | 0x10 | 15:15 | DIS_RENWAY | +0x404 | 0x10 | 14:14 | BYP_8B10B | +0x404 | 0x10 | 13:12 | CDET | +0x404 | 0x10 | 11:11 | DIS_TMR_CMA | +0x404 | 0x10 | 10:10 | DIS_APX | +0x404 | 0x10 | 09:09 | INV_HSI | +0x404 | 0x10 | 08:08 | INV_HSO | +0x404 | 0x10 | 07:06 | SDS_SDET_DEG | +0x404 | 0x10 | 05:05 | CODEC_LPK | +0x404 | 0x10 | 04:04 | AFE_LPK | +0x404 | 0x10 | 03:03 | REMOTE_LPK | +0x404 | 0x10 | 02:02 | SDS_TX_DOWN | +0x404 | 0x10 | 01:01 | SDS_EN_RX | +0x404 | 0x10 | 00:00 | SDS_EN_TX | +**Page** | **Register** | **Bits** | **MAC SerDes 0 - page 4** | **Description** +0x404 | 0x14 | 15:13 | CFG_FRC_SDS_MODE | 0x6 = QSGMII +0x404 | 0x14 | 12:12 | CFG_FRC_SDS_MODE_EN | Enable SerDes forced mode +0x404 | 0x14 | 11:08 | CFG_UPD_RXD | +0x404 | 0x14 | 07:04 | CFG_UPD_TXD | +0x404 | 0x14 | 03:03 | CFG_UPD_RXD_DYN | +0x404 | 0x14 | 02:02 | CFG_EN_LINK_FIB1G | +0x404 | 0x14 | 01:01 | CFG_EN_LINK_SGM | +0x404 | 0x14 | 00:00 | CFG_SGM_CK_SEL | +**Page** | **Register** | **Bits** | **MAC SerDes 1 - page 0** | **Description** +0x424 | 0x10 | 15:15 | DIS_RENWAY | +0x424 | 0x10 | 14:14 | BYP_8B10B | +0x424 | 0x10 | 13:12 | CDET | +0x424 | 0x10 | 11:11 | DIS_TMR_CMA | +0x424 | 0x10 | 10:10 | DIS_APX | +0x424 | 0x10 | 09:09 | INV_HSI | +0x424 | 0x10 | 08:08 | INV_HSO | +0x424 | 0x10 | 07:06 | SDS_SDET_DEG | +0x424 | 0x10 | 05:05 | CODEC_LPK | +0x424 | 0x10 | 04:04 | AFE_LPK | +0x424 | 0x10 | 03:03 | REMOTE_LPK | +0x424 | 0x10 | 02:02 | SDS_TX_DOWN | +0x424 | 0x10 | 01:01 | SDS_EN_RX | +0x424 | 0x10 | 00:00 | SDS_EN_TX | +**Page** | **Register** | **Bits** | **MAC SerDes 1 - page 4** | **Description** +0x424 | 0x14 | 15:13 | CFG_FRC_SDS_MODE | +0x424 | 0x14 | 12:12 | CFG_FRC_SDS_MODE_EN | +0x424 | 0x14 | 11:08 | CFG_UPD_RXD | +0x424 | 0x14 | 07:04 | CFG_UPD_TXD | +0x424 | 0x14 | 03:03 | CFG_UPD_RXD_DYN | +0x424 | 0x14 | 02:02 | CFG_EN_LINK_FIB1G | +0x424 | 0x14 | 01:01 | CFG_EN_LINK_SGM | +0x424 | 0x14 | 00:00 | CFG_SGM_CK_SEL | -Attempt | #1 | #2 | #3 | #4 | #5 | #6 | #7 | #8 | #9 | #10 | #11 ---- | --- | --- | --- |--- |--- |--- |--- |--- |--- |--- |--- -Seconds | 301 | 283 | 290 | 286 | 289 | 285 | 287 | 287 | 272 | 276 | 269