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Add the AR9003 initvals, and update the checksums.txt list

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We're up to 100 initvals now :)

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
This commit is contained in:
Luis R. Rodriguez 2010-04-13 18:07:32 -07:00
parent c6aac86ec7
commit d47ca2307c
4 changed files with 1842 additions and 1 deletions
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2
Makefile
View file

@ -1,4 +1,4 @@
initvals: ar5008_initvals.h ar9001_initvals.h ar9002_initvals.h initvals.c
initvals: ar5008_initvals.h ar9001_initvals.h ar9002_initvals.h ar9003_initvals.h initvals.c
gcc -o $@ $@.c
all: initvals

1793
ar9003_initvals.h Normal file
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File diff suppressed because it is too large Load diff

20
checksums.txt
View file

@ -78,3 +78,23 @@
0x00000000e2eb2b6e ar9271Modes_9271_ANI_reg
0x00000000ccc87e67 ar9271Modes_normal_power_tx_gain_9271
0x000000006d89f2b4 ar9271Modes_high_power_tx_gain_9271
0x000000005a76829d ar9300_2p0_radio_postamble
0x000000009e93c877 ar9300Modes_lowest_ob_db_tx_gain_table_2p0
0x00000000e0bc2c84 ar9300Modes_fast_clock_2p0
0x00000000852fca34 ar9300_2p0_radio_core
0x0000000000000000 ar9300Common_rx_gain_table_merlin_2p0
0x0000000078658fb5 ar9300_2p0_mac_postamble
0x0000000022235332 ar9300_2p0_soc_postamble
0x0000000054d41904 ar9200_merlin_2p0_radio_core
0x0000000061845bda ar9300_2p0_baseband_postamble
0x00000000caa590a4 ar9300_2p0_baseband_core
0x000000002befd945 ar9300Modes_high_power_tx_gain_table_2p0
0x000000002fc9db47 ar9300Modes_high_ob_db_tx_gain_table_2p0
0x000000001f318700 ar9300Common_rx_gain_table_2p0
0x000000009a93c877 ar9300Modes_low_ob_db_tx_gain_table_2p0
0x00000000c9d66d40 ar9300_2p0_mac_core
0x0000000039139500 ar9300Common_wo_xlna_rx_gain_table_2p0
0x00000000a0c54980 ar9300_2p0_soc_preamble
0x00000000292e2544 ar9300PciePhy_pll_on_clkreq_disable_L1_2p0
0x000000002d3e2544 ar9300PciePhy_clkreq_enable_L1_2p0
0x00000000293e2544 ar9300PciePhy_clkreq_disable_L1_2p0

28
initvals.c
View file

@ -10,6 +10,7 @@
#include "ar5008_initvals.h"
#include "ar9001_initvals.h"
#include "ar9002_initvals.h"
#include "ar9003_initvals.h"
#define INI_CHECK(_array, _cols) \
do { \
@ -154,12 +155,39 @@ static ar9002_hw_check_initvals(void)
INI_CHECK(ar9271Modes_high_power_tx_gain_9271, 6);
}
static ar9003_hw_check_initvals(void)
{
u64 chksum;
INI_CHECK(ar9300_2p0_radio_postamble, 5);
INI_CHECK(ar9300Modes_lowest_ob_db_tx_gain_table_2p0, 5);
INI_CHECK(ar9300Modes_fast_clock_2p0, 3);
INI_CHECK(ar9300_2p0_radio_core, 2);
INI_CHECK(ar9300Common_rx_gain_table_merlin_2p0, 2);
INI_CHECK(ar9300_2p0_mac_postamble, 5);
INI_CHECK(ar9300_2p0_soc_postamble, 5);
INI_CHECK(ar9200_merlin_2p0_radio_core, 2);
INI_CHECK(ar9300_2p0_baseband_postamble, 5);
INI_CHECK(ar9300_2p0_baseband_core, 2);
INI_CHECK(ar9300Modes_high_power_tx_gain_table_2p0, 5);
INI_CHECK(ar9300Modes_high_ob_db_tx_gain_table_2p0, 5);
INI_CHECK(ar9300Common_rx_gain_table_2p0, 2);
INI_CHECK(ar9300Modes_low_ob_db_tx_gain_table_2p0, 5);
INI_CHECK(ar9300_2p0_mac_core, 2);
INI_CHECK(ar9300Common_wo_xlna_rx_gain_table_2p0, 2);
INI_CHECK(ar9300_2p0_soc_preamble, 2);
INI_CHECK(ar9300PciePhy_pll_on_clkreq_disable_L1_2p0, 2);
INI_CHECK(ar9300PciePhy_clkreq_enable_L1_2p0, 2);
INI_CHECK(ar9300PciePhy_clkreq_disable_L1_2p0, 2);
}
int main(void)
{
ar5008_hw_check_initvals();
ar9001_hw_check_initvals();
ar9002_hw_check_initvals();
ar9003_hw_check_initvals();
return 0;
}