mirror of
https://github.com/qca/qca-swiss-army-knife.git
synced 2026-01-27 17:07:18 +01:00
Add support for the AR9003 2.2 initvals
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
This commit is contained in:
Luis R. Rodriguez
parent
bdd7c0656e
commit
7b66e3362b
2 changed files with 115 additions and 14 deletions
1
Makefile
1
Makefile
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@ -1,6 +1,7 @@
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ifdef ATHEROS
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CFLAGS += -DATHEROS
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ATHEROS_DEPS += ar9300_osprey20.ini
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ATHEROS_DEPS += ar9300_osprey22.ini
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endif
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initvals: ar5008_initvals.h ar9001_initvals.h ar9002_initvals.h ar9003_initvals.h $(ATHEROS_DEPS) initvals.c
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128
initvals.c
128
initvals.c
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@ -21,6 +21,8 @@
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#else
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/* This is what these are called on the Atheros HAL */
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/* AR9003 2.0 */
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#define ar9300_osprey_2p0_radio_postamble ar9300_2p0_radio_postamble
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#define ar9300Modes_lowest_ob_db_tx_gain_table_osprey_2p0 ar9300Modes_lowest_ob_db_tx_gain_table_2p0
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#define ar9300Modes_fast_clock_osprey_2p0 ar9300Modes_fast_clock_2p0
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@ -44,6 +46,30 @@
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#include "ar9300_osprey20.ini"
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/* AR9003 2.2 */
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#define ar9300_osprey_2p2_radio_postamble ar9300_2p2_radio_postamble
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#define ar9300Modes_lowest_ob_db_tx_gain_table_osprey_2p2 ar9300Modes_lowest_ob_db_tx_gain_table_2p2
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#define ar9300Modes_fast_clock_osprey_2p2 ar9300Modes_fast_clock_2p2
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#define ar9300_osprey_2p2_radio_core ar9300_2p2_radio_core
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#define ar9300Common_rx_gain_table_merlin_2p2 ar9300Common_rx_gain_table_merlin_2p2
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#define ar9300_osprey_2p2_mac_postamble ar9300_2p2_mac_postamble
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#define ar9300_osprey_2p2_soc_postamble ar9300_2p2_soc_postamble
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#define ar9200_merlin_2p2_radio_core ar9200_merlin_2p2_radio_core
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#define ar9300_osprey_2p2_baseband_postamble ar9300_2p2_baseband_postamble
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#define ar9300_osprey_2p2_baseband_core ar9300_2p2_baseband_core
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#define ar9300Modes_high_power_tx_gain_table_osprey_2p2 ar9300Modes_high_power_tx_gain_table_2p2
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#define ar9300Modes_high_ob_db_tx_gain_table_osprey_2p2 ar9300Modes_high_ob_db_tx_gain_table_2p2
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#define ar9300Common_rx_gain_table_osprey_2p2 ar9300Common_rx_gain_table_2p2
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#define ar9300Modes_low_ob_db_tx_gain_table_osprey_2p2 ar9300Modes_low_ob_db_tx_gain_table_2p2
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#define ar9300_osprey_2p2_mac_core ar9300_2p2_mac_core
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#define ar9300Common_wo_xlna_rx_gain_table_osprey_2p2 ar9300Common_wo_xlna_rx_gain_table_2p2
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#define ar9300_osprey_2p2_soc_preamble ar9300_2p2_soc_preamble
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#define ar9300PciePhy_pll_on_clkreq_disable_L1_osprey_2p2 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2
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#define ar9300PciePhy_clkreq_enable_L1_osprey_2p2 ar9300PciePhy_clkreq_enable_L1_2p2
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#define ar9300PciePhy_clkreq_disable_L1_osprey_2p2 ar9300PciePhy_clkreq_disable_L1_2p2
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#include "ar9300_osprey22.ini"
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#endif /* ATHEROS */
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#define INI_CHECK(_array, _cols) \
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@ -263,7 +289,7 @@ static void ar9002_hw_check_initvals(void)
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}
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#endif /* ATHEROS */
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static void ar9003_hw_check_initvals(void)
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static void ar9003_2p0_hw_check_initvals(void)
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{
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u64 chksum;
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@ -289,6 +315,32 @@ static void ar9003_hw_check_initvals(void)
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INI_CHECK(ar9300PciePhy_clkreq_disable_L1_2p0, 2);
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}
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static void ar9003_2p2_hw_check_initvals(void)
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{
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u64 chksum;
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INI_CHECK(ar9300_2p2_radio_postamble, 5);
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INI_CHECK(ar9300Modes_lowest_ob_db_tx_gain_table_2p2, 5);
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INI_CHECK(ar9300Modes_fast_clock_2p2, 3);
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INI_CHECK(ar9300_2p2_radio_core, 2);
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INI_CHECK(ar9300Common_rx_gain_table_merlin_2p2, 2);
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INI_CHECK(ar9300_2p2_mac_postamble, 5);
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INI_CHECK(ar9300_2p2_soc_postamble, 5);
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INI_CHECK(ar9200_merlin_2p2_radio_core, 2);
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INI_CHECK(ar9300_2p2_baseband_postamble, 5);
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INI_CHECK(ar9300_2p2_baseband_core, 2);
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INI_CHECK(ar9300Modes_high_power_tx_gain_table_2p2, 5);
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INI_CHECK(ar9300Modes_high_ob_db_tx_gain_table_2p2, 5);
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INI_CHECK(ar9300Common_rx_gain_table_2p2, 2);
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INI_CHECK(ar9300Modes_low_ob_db_tx_gain_table_2p2, 5);
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INI_CHECK(ar9300_2p2_mac_core, 2);
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INI_CHECK(ar9300Common_wo_xlna_rx_gain_table_2p2, 2);
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INI_CHECK(ar9300_2p2_soc_preamble, 2);
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INI_CHECK(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2, 2);
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INI_CHECK(ar9300PciePhy_clkreq_enable_L1_2p2, 2);
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INI_CHECK(ar9300PciePhy_clkreq_disable_L1_2p2, 2);
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}
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#ifndef ATHEROS
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static void ar5008_hw_print_initvals(void)
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{
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@ -405,7 +457,7 @@ static void ar9002_hw_print_initvals(void)
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}
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#endif /* ATHEROS */
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static void ar9003_hw_print_initvals(void)
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static void ar9003_2p0_hw_print_initvals(void)
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{
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u64 chksum;
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@ -431,15 +483,41 @@ static void ar9003_hw_print_initvals(void)
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INI_PRINT(ar9300PciePhy_clkreq_disable_L1_2p0, 2);
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}
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static void ar9003_2p2_hw_print_initvals(void)
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{
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u64 chksum;
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INI_PRINT(ar9300_2p2_radio_postamble, 5);
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INI_PRINT(ar9300Modes_lowest_ob_db_tx_gain_table_2p2, 5);
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INI_PRINT(ar9300Modes_fast_clock_2p2, 3);
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INI_PRINT(ar9300_2p2_radio_core, 2);
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INI_PRINT(ar9300Common_rx_gain_table_merlin_2p2, 2);
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INI_PRINT(ar9300_2p2_mac_postamble, 5);
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INI_PRINT(ar9300_2p2_soc_postamble, 5);
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INI_PRINT(ar9200_merlin_2p2_radio_core, 2);
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INI_PRINT(ar9300_2p2_baseband_postamble, 5);
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INI_PRINT(ar9300_2p2_baseband_core, 2);
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INI_PRINT(ar9300Modes_high_power_tx_gain_table_2p2, 5);
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INI_PRINT(ar9300Modes_high_ob_db_tx_gain_table_2p2, 5);
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INI_PRINT(ar9300Common_rx_gain_table_2p2, 2);
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INI_PRINT(ar9300Modes_low_ob_db_tx_gain_table_2p2, 5);
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INI_PRINT(ar9300_2p2_mac_core, 2);
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INI_PRINT(ar9300Common_wo_xlna_rx_gain_table_2p2, 2);
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INI_PRINT(ar9300_2p2_soc_preamble, 2);
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INI_PRINT(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2, 2);
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INI_PRINT(ar9300PciePhy_clkreq_enable_L1_2p2, 2);
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INI_PRINT(ar9300PciePhy_clkreq_disable_L1_2p2, 2);
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}
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#ifndef ATHEROS
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static void usage()
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{
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printf("Usage: initvals [-w ] [-f ar5008 | ar9001 | ar9002 | ar9003 ]\n");
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printf("Usage: initvals [-w ] [-f ar5008 | ar9001 | ar9002 | ar9003-2p0 | ar9003-2p2 ]\n");
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}
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#else
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static void usage()
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{
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printf("Usage: initvals [-w ] [-f ar9003 ]\n");
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printf("Usage: initvals [-w ] [-f ar9003-2p0 | ar9003-2p2 ]\n");
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}
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#endif
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@ -454,14 +532,22 @@ print_initvals_family(char *family)
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ar9001_hw_print_initvals();
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else if (strncmp(family, "ar9002", 6) == 0)
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ar9002_hw_print_initvals();
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else if (strncmp(family, "ar9003", 6) == 0) {
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else if (strncmp(family, "ar9003-2p0", 10) == 0) {
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printf("#ifndef INITVALS_9003_H\n");
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printf("#define INITVALS_9003_H\n");
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printf("\n");
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printf("/* AR9003 2.0 */\n");
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printf("\n");
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ar9003_hw_print_initvals();
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ar9003_2p0_hw_print_initvals();
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printf("#endif /* INITVALS_9003_H */\n");
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} else if (strncmp(family, "ar9003-2p2", 10) == 0) {
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printf("#ifndef INITVALS_9003_2P2_H\n");
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printf("#define INITVALS_9003_2P2_H\n");
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printf("\n");
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printf("/* AR9003 2.2 */\n");
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printf("\n");
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ar9003_2p2_hw_print_initvals();
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printf("#endif /* INITVALS_9003_2P2_H */\n");
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}
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}
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#else
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@ -469,14 +555,22 @@ print_initvals_family(char *family)
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{
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print_license();
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if (strncmp(family, "ar9003", 6) == 0) {
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if (strncmp(family, "ar9003-2p0", 10) == 0) {
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printf("#ifndef INITVALS_9003_H\n");
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printf("#define INITVALS_9003_H\n");
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printf("\n");
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printf("/* AR9003 2.0 */\n");
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printf("\n");
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ar9003_hw_print_initvals();
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ar9003_2p0_hw_print_initvals();
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printf("#endif /* INITVALS_9003_H */\n");
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} else if (strncmp(family, "ar9003-2p2", 10) == 0) {
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printf("#ifndef INITVALS_9003_2P2_H\n");
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printf("#define INITVALS_9003_2P2_H\n");
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printf("\n");
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printf("/* AR9003 2.2 */\n");
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printf("\n");
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ar9003_2p2_hw_print_initvals();
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printf("#endif /* INITVALS_9003_2P2_H */\n");
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}
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}
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#endif /* ATHEROS */
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@ -490,14 +584,18 @@ check_initvals_family(char *family)
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ar9001_hw_check_initvals();
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else if (strncmp(family, "ar9002", 6) == 0)
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ar9002_hw_check_initvals();
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else if (strncmp(family, "ar9003", 6) == 0)
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ar9003_hw_check_initvals();
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else if (strncmp(family, "ar9003-2p0", 10) == 0)
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ar9003_2p0_hw_check_initvals();
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else if (strncmp(family, "ar9003-2p2", 10) == 0)
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ar9003_2p2_hw_check_initvals();
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}
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#else
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check_initvals_family(char *family)
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{
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if (strncmp(family, "ar9003", 6) == 0)
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ar9003_hw_check_initvals();
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if (strncmp(family, "ar9003-2p0", 10) == 0)
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ar9003_2p0_hw_check_initvals();
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else if (strncmp(family, "ar9003-2p2", 10) == 0)
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ar9003_2p2_hw_check_initvals();
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}
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#endif /* ATHEROS */
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@ -512,7 +610,8 @@ int main(int argc, void *argv[])
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ar5008_hw_print_initvals();
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ar9001_hw_print_initvals();
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ar9002_hw_print_initvals();
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ar9003_hw_print_initvals();
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ar9003_2p0_hw_print_initvals();
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ar9003_2p2_hw_print_initvals();
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return 0;
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}
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@ -538,7 +637,8 @@ int main(int argc, void *argv[])
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ar5008_hw_check_initvals();
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ar9001_hw_check_initvals();
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ar9002_hw_check_initvals();
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ar9003_hw_check_initvals();
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ar9003_2p0_hw_check_initvals();
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ar9003_2p2_hw_check_initvals();
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return 0;
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}
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