mirror of
https://github.com/qca/qca-swiss-army-knife.git
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Update checksums.txt based on new checksum changes
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
This commit is contained in:
Luis R. Rodriguez
parent
dd08b7ab9d
commit
67ed531f8c
1 changed files with 110 additions and 120 deletions
230
checksums.txt
230
checksums.txt
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@ -1,120 +1,110 @@
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0x00000000aba6d9ad ar5416Modes
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0x0000000009dee10c ar5416Common
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0x000000005715c550 ar5416Bank0
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0x0000000000007900 ar5416BB_RfGain
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0x000000001084295c ar5416Bank1
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0x0000000073fb3750 ar5416Bank2
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0x00000000401880f0 ar5416Bank3
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0x00000000e6c52dd0 ar5416Bank6
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0x0000000096ec74d0 ar5416Bank6TPC
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0x00000000000d96cc ar5416Bank7
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0x000000000000c550 ar5416Addac
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0x00000000aba6d9ad ar5416Modes_9100
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0x0000000009dee10c ar5416Common_9100
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0x000000005715c550 ar5416Bank0_9100
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0x0000000000007900 ar5416BB_RfGain_9100
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0x000000001084295c ar5416Bank1_9100
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0x0000000073fb3750 ar5416Bank2_9100
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0x00000000401880f0 ar5416Bank3_9100
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0x00000000e6c52dd0 ar5416Bank6_9100
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0x0000000096ec74d0 ar5416Bank6TPC_9100
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0x00000000000d96cc ar5416Bank7_9100
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0x000000000000c550 ar5416Addac_9100
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0x0000000041965d22 ar5416Modes_9160
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0x00000000cc5d34b0 ar5416Common_9160
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0x000000005715c550 ar5416Bank0_9160
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0x0000000000007900 ar5416BB_RfGain_9160
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0x000000001084295c ar5416Bank1_9160
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0x0000000073fb3750 ar5416Bank2_9160
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0x00000000401880f0 ar5416Bank3_9160
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0x00000000e60ce4d0 ar5416Bank6_9160
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0x0000000096ec74d0 ar5416Bank6TPC_9160
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0x00000000000d96cc ar5416Bank7_9160
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0x0000000000000e50 ar5416Addac_9160
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0x0000000000000150 ar5416Addac_9160_1_1
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0x00000000cb866a3e ar9280Modes_9280
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0x0000000088ae3e2c ar9280Common_9280
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0x00000000207e71f6 ar9280Modes_9280_2
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0x0000000066bd788c ar9280Common_9280_2
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0x00000000e2bf2bb0 ar9280Modes_fast_clock_9280_2
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0x0000000084f541df ar9280Modes_backoff_23db_rxgain_9280_2
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0x00000000c8778f93 ar9280Modes_original_rxgain_9280_2
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0x0000000077f1b62c ar9280Modes_backoff_13db_rxgain_9280_2
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0x00000000cad75a6b ar9280Modes_high_power_tx_gain_9280_2
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0x000000003264116c ar9280Modes_original_tx_gain_9280_2
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0x00000000f7ad9304 ar9280PciePhy_clkreq_off_L1_9280
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0x00000000f7ad9204 ar9280PciePhy_clkreq_always_on_L1_9280
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0x00000000c5e81575 ar9285Modes_9285
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0x000000004cd69910 ar9285Common_9285
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0x00000000f7ad9204 ar9285PciePhy_clkreq_always_on_L1_9285
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0x00000000f7ad9304 ar9285PciePhy_clkreq_off_L1_9285
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0x000000005c3b55ca ar9285Modes_9285_1_2
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0x00000000e13c8d20 ar9285Common_9285_1_2
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0x00000000fdbea729 ar9285Modes_high_power_tx_gain_9285_1_2
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0x00000000d5606979 ar9285Modes_original_tx_gain_9285_1_2
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0x00000000b3b80e95 ar9285Modes_XE2_0_normal_power
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0x000000009b6700c5 ar9285Modes_XE2_0_high_power
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0x00000000f7ad9204 ar9285PciePhy_clkreq_always_on_L1_9285_1_2
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0x00000000f7ad9304 ar9285PciePhy_clkreq_off_L1_9285_1_2
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0x000000005d0518d6 ar9287Modes_9287_1_0
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0x00000000bf7a1ea8 ar9287Common_9287_1_0
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0x00000000c1b6c7bd ar9287Modes_tx_gain_9287_1_0
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0x0000000000003000 ar9287Modes_rx_gain_9287_1_0
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0x00000000f7ad9204 ar9287PciePhy_clkreq_always_on_L1_9287_1_0
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0x00000000f7ad9304 ar9287PciePhy_clkreq_off_L1_9287_1_0
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0x000000006d0518d6 ar9287Modes_9287_1_1
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0x000000002a016358 ar9287Common_9287_1_1
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0x00000000956386f0 ar9287Common_normal_cck_fir_coeff_9287_1_1
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0x000000006d2b4ef0 ar9287Common_japan_2484_cck_fir_coeff_9287_1_1
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0x0000000093f6d5ef ar9287Modes_tx_gain_9287_1_1
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0x0000000000003000 ar9287Modes_rx_gain_9287_1_1
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0x00000000f7ad9204 ar9287PciePhy_clkreq_always_on_L1_9287_1_1
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0x00000000f7ad9304 ar9287PciePhy_clkreq_off_L1_9287_1_1
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0x00000000572beff2 ar9271Modes_9271
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0x00000000d2419960 ar9271Common_9271
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0x00000000956386f0 ar9271Common_normal_cck_fir_coeff_9271
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0x000000006d2b4ef0 ar9271Common_japan_2484_cck_fir_coeff_9271
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0x0000000009122228 ar9271Modes_9271_1_0_only
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0x00000000e2eb2b6e ar9271Modes_9271_ANI_reg
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0x00000000ccc87e67 ar9271Modes_normal_power_tx_gain_9271
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0x000000006d8992b4 ar9271Modes_high_power_tx_gain_9271
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0x00000000c2bfa7d5 ar9300_2p0_radio_postamble
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0x00000000ada2b114 ar9300Modes_lowest_ob_db_tx_gain_table_2p0
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0x00000000e0bc2c84 ar9300Modes_fast_clock_2p0
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0x00000000056eaf74 ar9300_2p0_radio_core
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0x0000000000000000 ar9300Common_rx_gain_table_merlin_2p0
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0x0000000078658fb5 ar9300_2p0_mac_postamble
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0x0000000023235333 ar9300_2p0_soc_postamble
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0x0000000054d41904 ar9200_merlin_2p0_radio_core
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0x00000000748572cf ar9300_2p0_baseband_postamble
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0x000000009aa5a0a4 ar9300_2p0_baseband_core
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0x000000003df9a326 ar9300Modes_high_power_tx_gain_table_2p0
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0x000000001cfba124 ar9300Modes_high_ob_db_tx_gain_table_2p0
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0x0000000011302700 ar9300Common_rx_gain_table_2p0
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0x00000000e3eab114 ar9300Modes_low_ob_db_tx_gain_table_2p0
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0x00000000c9d66d40 ar9300_2p0_mac_core
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0x000000001e1d0800 ar9300Common_wo_xlna_rx_gain_table_2p0
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0x00000000a0c54980 ar9300_2p0_soc_preamble
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0x00000000292e2544 ar9300PciePhy_pll_on_clkreq_disable_L1_2p0
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0x000000002d3e2544 ar9300PciePhy_clkreq_enable_L1_2p0
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0x00000000293e2544 ar9300PciePhy_clkreq_disable_L1_2p0
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0x00000000c2bfa7d5 ar9300_2p2_radio_postamble
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0x00000000ada2b114 ar9300Modes_lowest_ob_db_tx_gain_table_2p2
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0x00000000e0bc2c84 ar9300Modes_fast_clock_2p2
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0x00000000056eaf74 ar9300_2p2_radio_core
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0x0000000000000000 ar9300Common_rx_gain_table_merlin_2p2
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0x0000000078658fb5 ar9300_2p2_mac_postamble
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0x0000000023235333 ar9300_2p2_soc_postamble
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0x0000000054d41904 ar9200_merlin_2p2_radio_core
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0x000000008475a084 ar9300_2p2_baseband_postamble
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0x000000009aaafd90 ar9300_2p2_baseband_core
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0x000000003df9a326 ar9300Modes_high_power_tx_gain_table_2p2
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0x000000001cfba124 ar9300Modes_high_ob_db_tx_gain_table_2p2
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0x0000000011302700 ar9300Common_rx_gain_table_2p2
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0x00000000a9a2b114 ar9300Modes_low_ob_db_tx_gain_table_2p2
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0x00000000a9d66d40 ar9300_2p2_mac_core
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0x000000001e1d0800 ar9300Common_wo_xlna_rx_gain_table_2p2
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0x00000000a0c531c8 ar9300_2p2_soc_preamble
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0x00000000292e2544 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2
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0x000000002d3e2544 ar9300PciePhy_clkreq_enable_L1_2p2
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0x00000000293e2544 ar9300PciePhy_clkreq_disable_L1_2p2
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0x00000000aa44d980 ar5416Modes
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0x000000004d845983 ar5416Common
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0x0000000057312aa7 ar5416Bank0
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0x00000000ffc1da40 ar5416BB_RfGain
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0x00000000109efeb3 ar5416Bank1
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0x00000000741fdca7 ar5416Bank2
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0x000000000f02c1cb ar5416Bank3
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0x00000000a6f45c2b ar5416Bank6
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0x000000009645fd2b ar5416Bank6TPC
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0x000000000051b016 ar5416Bank7
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0x00000000009fa667 ar5416Addac
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0x000000004ea199d9 ar5416Modes_9100
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0x000000000cc793b6 ar5416Common_9100
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0x0000000057312aa7 ar5416Bank0_9100
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0x00000000ffc1da40 ar5416BB_RfGain_9100
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0x00000000109efeb3 ar5416Bank1_9100
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0x00000000741fdca7 ar5416Bank2_9100
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0x000000000f02c1cb ar5416Bank3_9100
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0x00000000a63d952b ar5416Bank6_9100
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0x000000009612ac2b ar5416Bank6TPC_9100
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0x000000000051b016 ar5416Bank7_9100
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0x0000000001de3e90 ar5416Addac_9100
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0x0000000086b2261a ar5416Modes_9160
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0x00000000562fd26b ar5416Common_9160
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0x0000000057312aa7 ar5416Bank0_9160
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0x00000000ffc1da40 ar5416BB_RfGain_9160
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0x00000000109efeb3 ar5416Bank1_9160
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0x00000000741fdca7 ar5416Bank2_9160
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0x000000000f02c1cb ar5416Bank3_9160
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0x00000000a6f45c2b ar5416Bank6_9160
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0x000000009612ac2b ar5416Bank6TPC_9160
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0x000000000051b016 ar5416Bank7_9160
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0x0000000001da9190 ar5416Addac_9160
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0x0000000001d97a90 ar5416Addac_9160_1_1
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0x000000000abc5152 ar9280Modes_9280_2
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0x000000004dc8a628 ar9280Common_9280_2
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0x00000000226e5e43 ar9280Modes_fast_clock_9280_2
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0x00000000f2e2c7dd ar9280Modes_backoff_23db_rxgain_9280_2
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0x00000000d614296f ar9280Modes_original_rxgain_9280_2
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0x000000008e31ecdc ar9280Modes_backoff_13db_rxgain_9280_2
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0x00000000cd93b099 ar9280Modes_high_power_tx_gain_9280_2
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0x00000000af993cc4 ar9280Modes_original_tx_gain_9280_2
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0x00000000f460afc3 ar9280PciePhy_clkreq_off_L1_9280
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0x00000000f460aec3 ar9280PciePhy_clkreq_always_on_L1_9280
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0x00000000f460aec3 ar9285PciePhy_clkreq_always_on_L1_9285
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0x00000000f460afc3 ar9285PciePhy_clkreq_off_L1_9285
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0x000000005f7f5b54 ar9285Modes_9285_1_2
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0x000000000c4d0fa4 ar9285Common_9285_1_2
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0x0000000073b3f987 ar9285Modes_high_power_tx_gain_9285_1_2
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0x00000000d2b051e9 ar9285Modes_original_tx_gain_9285_1_2
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0x0000000021c180bd ar9285Modes_XE2_0_normal_power
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0x0000000080c368d3 ar9285Modes_XE2_0_high_power
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0x00000000f460aec3 ar9285PciePhy_clkreq_always_on_L1_9285_1_2
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0x00000000f460afc3 ar9285PciePhy_clkreq_off_L1_9285_1_2
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0x00000000de5d2e50 ar9287Modes_9287_1_1
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0x00000000fa3c6ef3 ar9287Common_9287_1_1
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0x0000000069bdf132 ar9287Common_normal_cck_fir_coeff_9287_1_1
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0x000000006d9eb532 ar9287Common_japan_2484_cck_fir_coeff_9287_1_1
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0x0000000093ed410f ar9287Modes_tx_gain_9287_1_1
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0x00000000dec2bdba ar9287Modes_rx_gain_9287_1_1
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0x00000000f460aec3 ar9287PciePhy_clkreq_always_on_L1_9287_1_1
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0x00000000f460afc3 ar9287PciePhy_clkreq_off_L1_9287_1_1
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0x000000000c8141c4 ar9271Modes_9271
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0x00000000cbf1cf53 ar9271Common_9271
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0x0000000069bdf132 ar9271Common_normal_cck_fir_coeff_9271
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0x000000006d9eb532 ar9271Common_japan_2484_cck_fir_coeff_9271
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0x0000000082001b7a ar9271Modes_9271_1_0_only
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0x00000000acddbca0 ar9271Modes_9271_ANI_reg
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0x000000005e37c1cf ar9271Modes_normal_power_tx_gain_9271
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0x0000000096049828 ar9271Modes_high_power_tx_gain_9271
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0x000000004a488fc7 ar9300_2p0_radio_postamble
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0x0000000091bf70ea ar9300Modes_lowest_ob_db_tx_gain_table_2p0
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0x00000000f6e26c1f ar9300Modes_fast_clock_2p0
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0x0000000037ac0ee8 ar9300_2p0_radio_core
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0x00000000047a7700 ar9300Common_rx_gain_table_merlin_2p0
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0x0000000003f783bb ar9300_2p0_mac_postamble
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0x00000000301fc841 ar9300_2p0_soc_postamble
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0x000000005ec8075f ar9200_merlin_2p0_radio_core
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0x000000009fb0b767 ar9300_2p0_baseband_postamble
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0x00000000b57ba74f ar9300_2p0_baseband_core
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0x00000000e932a418 ar9300Modes_high_power_tx_gain_table_2p0
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0x00000000c834a2da ar9300Modes_high_ob_db_tx_gain_table_2p0
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0x000000003a326c00 ar9300Common_rx_gain_table_2p0
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0x00000000dff770ea ar9300Modes_low_ob_db_tx_gain_table_2p0
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0x00000000d974fd78 ar9300_2p0_mac_core
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0x000000003521a300 ar9300Common_wo_xlna_rx_gain_table_2p0
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0x00000000a1313043 ar9300_2p0_soc_preamble
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0x0000000029734396 ar9300PciePhy_pll_on_clkreq_disable_L1_2p0
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0x000000002d834396 ar9300PciePhy_clkreq_enable_L1_2p0
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0x0000000029834396 ar9300PciePhy_clkreq_disable_L1_2p0
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0x000000004a488fc7 ar9300_2p2_radio_postamble
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0x00000000173f70ea ar9300Modes_lowest_ob_db_tx_gain_table_2p2
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0x00000000f6e26c1f ar9300Modes_fast_clock_2p2
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0x0000000037ac0ee8 ar9300_2p2_radio_core
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0x00000000047a7700 ar9300Common_rx_gain_table_merlin_2p2
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0x0000000003f783bb ar9300_2p2_mac_postamble
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0x00000000301fc841 ar9300_2p2_soc_postamble
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0x000000005ec8075f ar9200_merlin_2p2_radio_core
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0x00000000864f96b2 ar9300_2p2_baseband_postamble
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0x00000000b31bdec3 ar9300_2p2_baseband_core
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0x00000000e932a418 ar9300Modes_high_power_tx_gain_table_2p2
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0x00000000c834a2da ar9300Modes_high_ob_db_tx_gain_table_2p2
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0x000000003a326c00 ar9300Common_rx_gain_table_2p2
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0x00000000133f70ea ar9300Modes_low_ob_db_tx_gain_table_2p2
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0x00000000b974fd78 ar9300_2p2_mac_core
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0x000000003521a300 ar9300Common_wo_xlna_rx_gain_table_2p2
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0x00000000a15ccf1b ar9300_2p2_soc_preamble
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0x0000000029734396 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2
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0x000000002d834396 ar9300PciePhy_clkreq_enable_L1_2p2
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0x0000000029834396 ar9300PciePhy_clkreq_disable_L1_2p2
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Loading…
Add table
Reference in a new issue